emu_nes, branch HEAD

add incomplete ppu

2024-09-01T23:48:33Z

commit efefe2acc2819adc7378d6ee33a4500442536d9f parent e14776a4739f525ac2c5531fca94142454683563 Author: Vineet Kumar Date: Sun, 1 Sep 2024 19:48:33 -0400 add incomplete ppu

add basic implementation of ppu write registers

2024-09-01T23:44:40Z

commit e14776a4739f525ac2c5531fca94142454683563 parent 2084552c536a8299a3578c8b9b687cff98e6d9a3 Author: vin Date: Sun, 1 Sep 2024 19:44:40 -0400 add basic implementation of ppu write registers

add basic ppu register reading

2024-09-01T19:39:32Z

commit 2084552c536a8299a3578c8b9b687cff98e6d9a3 parent f591b4adf2cfe5d7cde5ecccf95879bfe09cf57a Author: vin Date: Sun, 1 Sep 2024 15:39:32 -0400 add basic ppu register reading

start working on ppu

2024-09-01T02:25:12Z

commit f591b4adf2cfe5d7cde5ecccf95879bfe09cf57a parent 279478f16f8ea4fcc3c8765ff964954368664106 Author: vin Date: Sat, 31 Aug 2024 22:25:12 -0400 start working on ppu

add preliminary apu register support

2024-09-01T02:24:33Z

commit 279478f16f8ea4fcc3c8765ff964954368664106 parent c0679b404d3bd9c20133a1868113f200eae2cf9f Author: vin Date: Sat, 31 Aug 2024 22:24:33 -0400 add preliminary apu register support

add shell.nix to get dependencies easily

2024-09-01T02:24:05Z

commit c0679b404d3bd9c20133a1868113f200eae2cf9f parent 27b9d4c1206d2d6c10186359340570ba8fd5befb Author: vin Date: Sat, 31 Aug 2024 22:24:05 -0400 add shell.nix to get dependencies easily

added snippet explaining the NES's 6502 variant and long-term goal for the project

2024-08-21T21:46:30Z

commit 27b9d4c1206d2d6c10186359340570ba8fd5befb parent 97332c8a381eb026c8009a32a75a423e9ba92993 Author: vin Date: Wed, 21 Aug 2024 17:46:30 -0400 added snippet explaining the NES's 6502 variant and long-term goal for the project

update README

2024-08-21T17:31:29Z

commit 97332c8a381eb026c8009a32a75a423e9ba92993 parent 362341eac334ada91de79360d98924c48061a657 Author: vin Date: Wed, 21 Aug 2024 13:31:29 -0400 update README

rename struct Rom to struct rom

2024-07-21T18:48:29Z

commit 362341eac334ada91de79360d98924c48061a657 parent 7d148924e2fee1a2692d2c49a01e6770b630f906 Author: vin Date: Sun, 21 Jul 2024 14:48:29 -0400 rename struct Rom to struct rom

start implementing PPU

2024-07-21T17:53:04Z

commit 7d148924e2fee1a2692d2c49a01e6770b630f906 parent 2df7df5f5b0f325864f92c5a58f3c132cfff989e Author: vin Date: Sun, 21 Jul 2024 13:53:04 -0400 start implementing PPU

add CFLAGS

2024-07-21T17:52:48Z

commit 2df7df5f5b0f325864f92c5a58f3c132cfff989e parent 85c6a414f9f14e388cc9a5e1ee36ffc0e1d93273 Author: vin Date: Sun, 21 Jul 2024 13:52:48 -0400 add CFLAGS

fix rest of logging format issues

2024-07-21T01:39:04Z

commit 85c6a414f9f14e388cc9a5e1ee36ffc0e1d93273 parent 81575946ae0d3e61d45b9c4a34785bf203955cee Author: vin Date: Sat, 20 Jul 2024 21:39:04 -0400 fix rest of logging format issues Now the format perfectly matches nestest.log. The only mismatch is now at the unimplemented APU memory addresses.

fix status flag bug in ASL and ROL

2024-07-21T01:18:11Z

commit 81575946ae0d3e61d45b9c4a34785bf203955cee parent 70937cd61f63e159d5de226fa640d102c8fb0d14 Author: vin Date: Sat, 20 Jul 2024 21:18:11 -0400 fix status flag bug in ASL and ROL

replace tabs with spaces to better match nestest.log

2024-07-21T00:27:55Z

commit 70937cd61f63e159d5de226fa640d102c8fb0d14 parent ca5a09cd94a5fc92e727cd69fb89f58760f34176 Author: vin Date: Sat, 20 Jul 2024 20:27:55 -0400 replace tabs with spaces to better match nestest.log

fix warnings and move cpu registers+flags to header

2024-07-07T17:04:10Z

commit ca5a09cd94a5fc92e727cd69fb89f58760f34176 parent 3e0563ce059172001d06688809096972696f83a4 Author: vin Date: Sun, 7 Jul 2024 13:04:10 -0400 fix warnings and move cpu registers+flags to header

add nestest.nes and log that was used for testing the CPU

2024-07-04T19:19:45Z

commit 3e0563ce059172001d06688809096972696f83a4 parent e1cdd7386807050bdd7db7debb902425a78e2970 Author: vin Date: Thu, 4 Jul 2024 15:19:45 -0400 add nestest.nes and log that was used for testing the CPU

implement all of the nestest unofficial opcodes and fix branch cycles

2024-07-04T19:06:15Z

commit e1cdd7386807050bdd7db7debb902425a78e2970 parent 4ccf9f5cee97c8c2191660a5632ab2da60757f97 Author: vin Date: Thu, 4 Jul 2024 15:06:15 -0400 implement all of the nestest unofficial opcodes and fix branch cycles

add preliminary implementation of the unofficial opcodes

2024-07-04T18:17:40Z

commit 4ccf9f5cee97c8c2191660a5632ab2da60757f97 parent c4fc40a036293a8f5899800ad3ecb1d24ba77bc4 Author: vin Date: Thu, 4 Jul 2024 14:17:40 -0400 add preliminary implementation of the unofficial opcodes

start implementing unofficial opcodes

2024-07-04T16:11:53Z

commit c4fc40a036293a8f5899800ad3ecb1d24ba77bc4 parent 5cd467eaf6b4f15f28b98c5fa49ab788dac945b3 Author: vin Date: Thu, 4 Jul 2024 12:11:53 -0400 start implementing unofficial opcodes

achieve cycle accuracy for official opcodes

2024-07-04T15:18:38Z

commit 5cd467eaf6b4f15f28b98c5fa49ab788dac945b3 parent d57acb77c7d617fbfe4e0c2fb6d19e1b60723a97 Author: vin Date: Thu, 4 Jul 2024 11:18:38 -0400 achieve cycle accuracy for official opcodes Now, the unofficial opcodes can be implemented, and then the PPU and APU.

finalize trace logging to match nestest.log minus PPU cycles

2024-07-04T01:02:34Z

commit d57acb77c7d617fbfe4e0c2fb6d19e1b60723a97 parent 4fcc8d48f4dd3f7be37d917826a148c02701d0e3 Author: vin Date: Wed, 3 Jul 2024 21:02:34 -0400 finalize trace logging to match nestest.log minus PPU cycles

improve branching cycle accuracy

2024-07-04T00:40:57Z

commit 4fcc8d48f4dd3f7be37d917826a148c02701d0e3 parent 2236e79556053d9d59a613634433848f1f7cf513 Author: vin Date: Wed, 3 Jul 2024 20:40:57 -0400 improve branching cycle accuracy

fix SBC bug in the rewrite and improve logging

2024-07-03T23:49:21Z

commit 2236e79556053d9d59a613634433848f1f7cf513 parent d8bb5a5ccf96fed7e8084cf691c987ce56a8c995 Author: vin Date: Wed, 3 Jul 2024 19:49:21 -0400 fix SBC bug in the rewrite and improve logging

call opcode function pointer instead of using switch case

2024-07-03T22:52:15Z

commit d8bb5a5ccf96fed7e8084cf691c987ce56a8c995 parent a4b39966aed8d41ad4ddc6700683c4779e8d1cb2 Author: vin Date: Wed, 3 Jul 2024 18:52:15 -0400 call opcode function pointer instead of using switch case Also improve logging.

start refactoring opcode defs into an array

2024-06-30T23:10:29Z

commit a4b39966aed8d41ad4ddc6700683c4779e8d1cb2 parent f28733401ebfe5457a4a79a37fbd5d2001de90bd Author: vin Date: Sun, 30 Jun 2024 19:10:29 -0400 start refactoring opcode defs into an array

combine macro for updating N and Z status flags

2024-06-30T19:46:18Z

commit f28733401ebfe5457a4a79a37fbd5d2001de90bd parent 47b8fac273d980f8d0893b2f6f4b363a9989070f Author: vin Date: Sun, 30 Jun 2024 15:46:18 -0400 combine macro for updating N and Z status flags

fix alignment of logging with ABS_X and ZP_X

2024-06-30T19:19:52Z

commit 47b8fac273d980f8d0893b2f6f4b363a9989070f parent 4525490beb4d4aa3c4359060db177c06ff09b3a1 Author: vin Date: Sun, 30 Jun 2024 15:19:52 -0400 fix alignment of logging with ABS_X and ZP_X

fix indirect JMP bug where the high byte does not increment out of page

2024-06-30T19:14:38Z

commit 4525490beb4d4aa3c4359060db177c06ff09b3a1 parent 718f89c9c56ea059f114edbdda098408ec3a6e8f Author: vin Date: Sun, 30 Jun 2024 15:14:38 -0400 fix indirect JMP bug where the high byte does not increment out of page https://old.reddit.com/r/EmuDev/comments/15plfes/having_an_issue_with_nestest_on_my_6502_emulator/jvyck7k/ With this, it seems that all official opcodes run as nestest expects. Now, it's the unofficial opcodes that need to be implemented.

fix incorrect argument for INC

2024-06-30T13:54:05Z

commit 718f89c9c56ea059f114edbdda098408ec3a6e8f parent 30fe238d42957a7bb9c055ff9d1f4b3ba9dc3e0e Author: vin Date: Sun, 30 Jun 2024 09:54:05 -0400 fix incorrect argument for INC Perhaps a refactor is in order for the arguments to the opcodes.

rename README to README.md

2024-06-30T13:37:31Z

commit 30fe238d42957a7bb9c055ff9d1f4b3ba9dc3e0e parent 45c231297657ad4a89e24bf0ee95478dd6fc78df Author: vin Date: Sun, 30 Jun 2024 09:37:31 -0400 rename README to README.md

fix incorrect argument for ASL and LSR

2024-06-30T12:58:06Z

commit 45c231297657ad4a89e24bf0ee95478dd6fc78df parent 99082b55287ecd0378935d31a289c05e1110c7b8 Author: vin Date: Sun, 30 Jun 2024 08:58:06 -0400 fix incorrect argument for ASL and LSR

fix JSR, RTS, and RTI

2024-06-30T11:56:08Z

commit 99082b55287ecd0378935d31a289c05e1110c7b8 parent 5535e5de70684dd8406e53d6ce928faf9011336c Author: vin Date: Sun, 30 Jun 2024 07:56:08 -0400 fix JSR, RTS, and RTI JSR was pushing 1 too high PC and RTS was 1 too low RTI was only pulling the low byte of PC

change SBC to be ADC with one's complement instead of two's

2024-06-30T10:28:41Z

commit 5535e5de70684dd8406e53d6ce928faf9011336c parent 4b7fae00103c9fbaeeba45a78a7d0c910d243dc0 Author: vin Date: Sun, 30 Jun 2024 06:28:41 -0400 change SBC to be ADC with one's complement instead of two's It seems that is what was expected when run with nestest.

fix status flag ordering shenanigans

2024-06-29T13:51:49Z

commit 4b7fae00103c9fbaeeba45a78a7d0c910d243dc0 parent 5d36aeb8856fa17d491b0c8c18d6593a9ec4997a Author: vin Date: Sat, 29 Jun 2024 09:51:49 -0400 fix status flag ordering shenanigans

fix ADC bug where V is calculated with new A instead of old A

2024-06-29T13:51:12Z

commit 5d36aeb8856fa17d491b0c8c18d6593a9ec4997a parent f16ab6cb6dce3a64ead1d0f0bc99f3d034a005b2 Author: vin Date: Sat, 29 Jun 2024 09:51:12 -0400 fix ADC bug where V is calculated with new A instead of old A

fix status register to match nestest

2024-06-28T18:44:16Z

commit f16ab6cb6dce3a64ead1d0f0bc99f3d034a005b2 parent 3977ab2a5d41c939f480d91265328ca62ba7be1d Author: vin Date: Fri, 28 Jun 2024 14:44:16 -0400 fix status register to match nestest

improve logging and JMP indirect

2024-06-28T18:33:47Z

commit 3977ab2a5d41c939f480d91265328ca62ba7be1d parent c1a42045e69797987ffa654da8dc76d577ac2629 Author: vin Date: Fri, 28 Jun 2024 14:33:47 -0400 improve logging and JMP indirect

fix more bugs

2024-06-28T14:28:53Z

commit c1a42045e69797987ffa654da8dc76d577ac2629 parent 09692f45f62a76ce0418bbf4762885990d9860ef Author: vin Date: Fri, 28 Jun 2024 10:28:53 -0400 fix more bugs

fix JSR and RTS bug

2024-06-28T14:18:01Z

commit 09692f45f62a76ce0418bbf4762885990d9860ef parent 3ebdeab784d8ecd6d6d3a531693ad285577f32e0 Author: vin Date: Fri, 28 Jun 2024 10:18:01 -0400 fix JSR and RTS bug The stack's PUSH and PULL weren't proper and JSR was reading wrong argument it seems.

start logging instructions as nestest.log has done

2024-06-28T13:51:55Z

commit 3ebdeab784d8ecd6d6d3a531693ad285577f32e0 parent 6a5b0b728e522cd4e90a2ae775666ad6c36d3c5a Author: vin Date: Fri, 28 Jun 2024 09:51:55 -0400 start logging instructions as nestest.log has done

start fixing bugs with memory access

2024-06-17T09:41:45Z

commit 6a5b0b728e522cd4e90a2ae775666ad6c36d3c5a parent 77d37dd455f804c79969979eb39d525b3c5ddfe7 Author: vin Date: Mon, 17 Jun 2024 15:11:45 +0530 start fixing bugs with memory access So this is why tests should be written while writing the program and instructions instead of all at once later. If this were all to be rewritten (which it probably will), I should add tests for each opcode instead of waiting until the end for ROM loading support.

implement basic iNES and Mapper 0 ROM loading

2024-06-17T09:16:00Z

commit 77d37dd455f804c79969979eb39d525b3c5ddfe7 parent 1f6e3b054cd7a35c5eb8d908525a261ea83d44e7 Author: vin Date: Mon, 17 Jun 2024 14:46:00 +0530 implement basic iNES and Mapper 0 ROM loading It seems like the test ROM loads fine but the instructions are not, but that's exactly what the test ROM is for I suppose.

replace bit comparisons with 0 from greater than to not equal

2024-06-16T11:41:51Z

commit 1f6e3b054cd7a35c5eb8d908525a261ea83d44e7 parent 745496ccd1a4483cc0955ec0c34acd800991cff3 Author: vin Date: Sun, 16 Jun 2024 17:11:51 +0530 replace bit comparisons with 0 from greater than to not equal They're both the same and the compiler might have already optimized it away. It also conveys the message better in my opinion.

add memory mirroring for system and ppu memory

2024-06-11T10:08:58Z

commit 745496ccd1a4483cc0955ec0c34acd800991cff3 parent 44273e69b97b179f632db43702579b3eb66d3fec Author: vin Date: Tue, 11 Jun 2024 15:38:58 +0530 add memory mirroring for system and ppu memory

add separate implied/accumulator functions for certain opcodes

2024-06-11T09:38:53Z

commit 44273e69b97b179f632db43702579b3eb66d3fec parent 142e35ff696d00b5ecd00be7ecd233bb9cec3be3 Author: vin Date: Tue, 11 Jun 2024 15:08:53 +0530 add separate implied/accumulator functions for certain opcodes

remove opcode json converter helper scripts

2024-06-11T09:13:41Z

commit 142e35ff696d00b5ecd00be7ecd233bb9cec3be3 parent a3189d90af2c675086e6dd629cfa071e4d75d4c9 Author: vin Date: Tue, 11 Jun 2024 14:43:41 +0530 remove opcode json converter helper scripts They were only used to automate writing the boilerplate for each instruction. They're not needed at the moment and they were using 65c02 instructions instead of 6502 anyways.

add jsr, rti, rts

2024-06-10T17:55:49Z

commit a3189d90af2c675086e6dd629cfa071e4d75d4c9 parent 3412a03a5ec20e1d3fb5dbd38888cf0c0eae09fc Author: vin Date: Mon, 10 Jun 2024 23:25:49 +0530 add jsr, rti, rts

implement untested most of stack-related opcodes

2024-06-10T17:26:06Z

commit 3412a03a5ec20e1d3fb5dbd38888cf0c0eae09fc parent dbb952a52b1b7168b4d1e98e9819d632ad16e087 Author: vin Date: Mon, 10 Jun 2024 22:56:06 +0530 implement untested most of stack-related opcodes

add lsr, rol, ror

2024-06-10T08:57:53Z

commit dbb952a52b1b7168b4d1e98e9819d632ad16e087 parent ebdf50cdf3a357a0e37a5751fd9d78ae975979a0 Author: vin Date: Mon, 10 Jun 2024 14:27:53 +0530 add lsr, rol, ror

implement tay, txa, tya

2024-06-10T07:25:40Z

commit ebdf50cdf3a357a0e37a5751fd9d78ae975979a0 parent 454276a50c5843e3401f9bc54d80cb7dda40b782 Author: vin Date: Mon, 10 Jun 2024 12:55:40 +0530 implement tay, txa, tya

implement sta, stx, sty

2024-06-10T07:24:05Z

commit 454276a50c5843e3401f9bc54d80cb7dda40b782 parent e07d5917a1625e207d1ba96b7e0d1e1c493040b2 Author: vin Date: Mon, 10 Jun 2024 12:54:05 +0530 implement sta, stx, sty

implement se?() opcodes and remove extra 65c02 opcodes

2024-06-10T07:20:00Z

commit e07d5917a1625e207d1ba96b7e0d1e1c493040b2 parent 23008662cea16d4ad2a3253d883a634258378d60 Author: vin Date: Mon, 10 Jun 2024 12:50:00 +0530 implement se?() opcodes and remove extra 65c02 opcodes

implement more instructions

2024-06-09T17:20:33Z

commit 23008662cea16d4ad2a3253d883a634258378d60 parent 68ecbce235295884ea2f593f1dbe5cc76683e5cc Author: vin Date: Sun, 9 Jun 2024 22:50:33 +0530 implement more instructions

add opcode_mem() function to return memory address and not pre-peek

2024-06-09T16:45:21Z

commit 68ecbce235295884ea2f593f1dbe5cc76683e5cc parent c417bf2276dc1427d0fb747b66baa9aba22c235f Author: vin Date: Sun, 9 Jun 2024 22:15:21 +0530 add opcode_mem() function to return memory address and not pre-peek Of course all of these opcodes need to be tested later...

add memory writing functions

2024-06-09T10:37:09Z

commit c417bf2276dc1427d0fb747b66baa9aba22c235f parent 4db0a8163e6641923466da99ff84d34dfdca44fa Author: vin Date: Sun, 9 Jun 2024 16:07:09 +0530 add memory writing functions

implement some more instructions and branching?

2024-06-09T10:32:04Z

commit 4db0a8163e6641923466da99ff84d34dfdca44fa parent 858cbfba48145ff9303a4127cb73911fc8904462 Author: vin Date: Sun, 9 Jun 2024 16:02:04 +0530 implement some more instructions and branching?

fix potential adc overflow flag bug

2024-06-09T10:05:31Z

commit 858cbfba48145ff9303a4127cb73911fc8904462 parent 76b9059b2e299dca5a96cf94f21038002f4dad3a Author: vin Date: Sun, 9 Jun 2024 15:35:31 +0530 fix potential adc overflow flag bug

add blank todo opcode functions based on opcode json

2024-06-09T07:41:05Z

commit 76b9059b2e299dca5a96cf94f21038002f4dad3a parent 207c6903f57f2364770c466dbe9807581ef96dc5 Author: vin Date: Sun, 9 Jun 2024 13:11:05 +0530 add blank todo opcode functions based on opcode json

programmatically create switch cases for opcodes based on opcode json

2024-06-09T07:26:13Z

commit 207c6903f57f2364770c466dbe9807581ef96dc5 parent 72e29b3d25bfe93810b3faf3133dfc3c15f15e14 Author: vin Date: Sun, 9 Jun 2024 12:56:13 +0530 programmatically create switch cases for opcodes based on opcode json The JSON is from https://github.com/ericTheEchidna/65C02-JSON/ and saved me a lot of time from writing the cases for each opcode by hand.

move addressing mode parsing into separate function

2024-06-08T16:38:51Z

commit 72e29b3d25bfe93810b3faf3133dfc3c15f15e14 parent 1ac30a026b7877ca6b295c661d91b20eaddb01c9 Author: vin Date: Sat, 8 Jun 2024 22:08:51 +0530 move addressing mode parsing into separate function

add adc and actually fix peek/16

2024-06-08T12:11:06Z

commit 1ac30a026b7877ca6b295c661d91b20eaddb01c9 parent bd85b80ba7a7919a80ce6fd742b37d3e183f2e3a Author: vin Date: Sat, 8 Jun 2024 17:41:06 +0530 add adc and actually fix peek/16

fix peek

2024-06-04T12:18:34Z

commit bd85b80ba7a7919a80ce6fd742b37d3e183f2e3a parent 36a8eefd000ab79a4e1226db4ce0b61fb4454807 Author: vin Date: Tue, 4 Jun 2024 17:48:34 +0530 fix peek

shorten addressing mode enum names

2024-06-04T10:46:11Z

commit 36a8eefd000ab79a4e1226db4ce0b61fb4454807 parent 7245191e86e4c8da9fe18788e3daae9b30005812 Author: vin Date: Tue, 4 Jun 2024 16:16:11 +0530 shorten addressing mode enum names

add peek(), peek16(), and finish lda()

2024-06-04T10:24:09Z

commit 7245191e86e4c8da9fe18788e3daae9b30005812 parent 10567e0be8402bae1cd5d267b5739e9962ea028a Author: vin Date: Tue, 4 Jun 2024 15:54:09 +0530 add peek(), peek16(), and finish lda()

load program rom into proper offset in memory

2024-05-24T07:25:44Z

commit 10567e0be8402bae1cd5d267b5739e9962ea028a parent 8493837ef921880196c29f0b766bebe9d2bf33ad Author: vin Date: Fri, 24 May 2024 12:55:44 +0530 load program rom into proper offset in memory

implement tax and inx and print status each time

2024-05-24T06:50:04Z

commit 8493837ef921880196c29f0b766bebe9d2bf33ad parent 24ca08a83d8b420d337d29c87d672b624890b5bf Author: vin Date: Fri, 24 May 2024 12:20:04 +0530 implement tax and inx and print status each time

add lda immediate and brk

2024-05-24T06:20:08Z

commit 24ca08a83d8b420d337d29c87d672b624890b5bf parent dd757c4324f856c8f91d79a4f741d8bb6477064a Author: vin Date: Fri, 24 May 2024 11:50:08 +0530 add lda immediate and brk

start working on 6502 cpu

2024-05-20T14:09:19Z

commit dd757c4324f856c8f91d79a4f741d8bb6477064a parent 5fcf579ad42a4fce332bbc04bb4ea364e0034c70 Author: vin Date: Mon, 20 May 2024 19:39:19 +0530 start working on 6502 cpu

initial commit

2024-05-20T13:21:56Z

commit 5fcf579ad42a4fce332bbc04bb4ea364e0034c70 Author: vin Date: Mon, 20 May 2024 18:51:56 +0530 initial commit