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authorCayetano Santos <csantosb@inventati.org>2025-02-17 14:50:28 +0100
committerLudovic Courtès <ludovic.courtes@inria.fr>2025-02-24 17:37:52 +0100
commite6953ee8dbe61883a7801ea8a7bf2a95e509fdfc (patch)
tree519ca0814d9d1dacbfc9c2e2ffba0e785910d8af
parent5a672c0deb0391c4420663d7725d8b73940d004a (diff)
electronics: Add python-pyvhdlmodel.
* guix-science/packages/electronics.scm (python-pyvhdlmodel): New variable. Signed-off-by: Ludovic Courtès <ludovic.courtes@inria.fr>
-rw-r--r--guix-science/packages/electronics.scm38
1 files changed, 37 insertions, 1 deletions
diff --git a/guix-science/packages/electronics.scm b/guix-science/packages/electronics.scm
index 2025d6a..6a4b3b3 100644
--- a/guix-science/packages/electronics.scm
+++ b/guix-science/packages/electronics.scm
@@ -17,16 +17,20 @@
17 #:use-module ((guix licenses) #:prefix license:) 17 #:use-module ((guix licenses) #:prefix license:)
18 #:use-module (guix gexp) 18 #:use-module (guix gexp)
19 #:use-module (gnu packages bootstrap) 19 #:use-module (gnu packages bootstrap)
20 #:use-module (gnu packages check)
20 #:use-module (gnu packages elf) 21 #:use-module (gnu packages elf)
21 #:use-module (gnu packages fpga) 22 #:use-module (gnu packages fpga)
22 #:use-module (gnu packages gcc) 23 #:use-module (gnu packages gcc)
23 #:use-module (gnu packages llvm) 24 #:use-module (gnu packages llvm)
24 #:use-module (gnu packages tcl) 25 #:use-module (gnu packages tcl)
26 #:use-module (gnu packages python-build)
27 #:use-module (gnu packages python-xyz)
25 #:use-module (gnu packages readline) 28 #:use-module (gnu packages readline)
26 #:use-module (guix packages) 29 #:use-module (guix packages)
27 #:use-module (guix download) 30 #:use-module (guix download)
28 #:use-module (guix git-download) 31 #:use-module (guix git-download)
29 #:use-module (guix build-system gnu)) 32 #:use-module (guix build-system gnu)
33 #:use-module (guix build-system pyproject))
30 34
31(define-public gnat 35(define-public gnat
32 (package 36 (package
@@ -211,3 +215,35 @@ used as an experimental synthesizer backend.")
211 (description 215 (description
212 "This plugin provides a shared library module for Yosys to implement logical synthesis of VHDL designs.") 216 "This plugin provides a shared library module for Yosys to implement logical synthesis of VHDL designs.")
213 (license license:gpl3+)))) 217 (license license:gpl3+))))
218
219(define-public python-pyvhdlmodel
220 (package
221 (name "python-pyvhdlmodel")
222 (version "0.30.0")
223 (source
224 (origin
225 (method git-fetch)
226 (uri (git-reference
227 (url "https://github.com/VHDL/pyvhdlmodel/")
228 (commit (string-append "v" version))))
229 (file-name (git-file-name name version))
230 (sha256
231 (base32 "0w9wbcpa306hlv366qk6xma12z5z0c01mqcd33asg42hfjyhq1qb"))))
232 (build-system pyproject-build-system)
233 (arguments
234 '(#:phases (modify-phases %standard-phases
235 (replace 'check
236 (lambda* (#:key tests? #:allow-other-keys)
237 (when tests?
238 (invoke "pytest" "tests" "-vv")))))))
239 (native-inputs (list python-setuptools
240 python-wheel
241 ;; testing
242 python-pytest))
243 (propagated-inputs (list ghdl-clang python-pytooling))
244 (home-page "https://vhdl.github.io/pyVHDLModel/")
245 (synopsis "High level API for GHDL")
246 (description
247 "@code{pyVHDLModel} provides an unified abstract language model for VHDL
248written in Python.")
249 (license license:asl2.0)))