power.txt (2017B)
1 Time to Sleep 2 ============= 3 USB suspend no activity on USB line for 3ms 4 No Interaction no user interaction 5 matrix has no change 6 matrix has no switch on 7 8 9 AVR Power Management 10 ==================== 11 12 V-USB suspend 13 USB suspend 14 http://vusb.wikidot.com/examples 15 16 MCUSR MCU Status Register 17 WDRF Watchdog Reset Flag 18 BORF 19 EXTRF 20 PORF Power-on Reset Flag 21 22 SMCR Sleep Mode Control Register 23 SE Sleep Enable 24 SM2:0 25 #define set_sleep_mode(mode) \ 26 #define SLEEP_MODE_IDLE (0) 27 #define SLEEP_MODE_ADC _BV(SM0) 28 #define SLEEP_MODE_PWR_DOWN _BV(SM1) 29 #define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1)) 30 #define SLEEP_MODE_STANDBY (_BV(SM1) | _BV(SM2)) 31 #define SLEEP_MODE_EXT_STANDBY (_BV(SM0) | _BV(SM1) | _BV(SM2)) 32 33 34 ACSR Analog Comparator Control and Status Register 35 To disable Analog Comparator 36 ACSR = 0x80; 37 or 38 ACSR &= ~_BV(ACIE); 39 ACSR |= _BV(ACD); 40 41 ACD: Analog Comparator Disable 42 When this bit is written logic one, the power to the Analog Comparator is 43 switched off. This bit can be set at any time to turn off the Analog 44 Comparator. This will reduce power consumption in Active and Idle mode. 45 When changing the ACD bit, the Analog Comparator Interrupt must be disabled 46 by clearing the ACIE bit in ACSR. Otherwise an interrupt can occur when 47 the bit is changed. 48 49 DIDR1 Digital Input Disable Register 1 50 AIN1D 51 AIN0D 52 When this bit is written logic one, the digital input buffer on the AIN1/0 pin is disabled. The corresponding PIN Register bit will always read as zero when this bit is set. When an analog signal is applied to the AIN1/0 pin and the digital input from this pin is not needed, this bit should be written logic one to reduce power consumption in the digital input buffer. 53 54 55 PRR Power Reduction Register 56 PRTWI 57 PRTIM2 58 PRTIM0 59 PRTIM1 60 PRSPI 61 PRUSART0 62 PRADC