matrix.c (2605B)
1 /** 2 * matrix.c 3 */ 4 5 #include "matrix.h" 6 #include "tca6424.h" 7 #include "m20add.h" 8 9 static const uint16_t col_pins[MATRIX_COLS] = MATRIX_M20_COL_PINS; 10 11 void matrix_init_custom(void) 12 { 13 tca6424_init(); 14 // set port0 15 tca6424_write_config(TCA6424_PORT0, 0); 16 // set port1 17 tca6424_write_config(TCA6424_PORT1, 0); 18 // set port2 19 tca6424_write_config(TCA6424_PORT2, 0xF5); 20 21 // clear output 22 tca6424_write_port(TCA6424_PORT0, 0); 23 tca6424_write_port(TCA6424_PORT1, 0); 24 tca6424_write_port(TCA6424_PORT2, 0); 25 } 26 27 28 static uint8_t row_mask[] = {ROW1_MASK,ROW2_MASK,ROW3_MASK,ROW4_MASK,ROW5_MASK,ROW6_MASK}; 29 static uint8_t col_mask[] = {COL1_MASK, COL2_MASK, COL3_MASK, COL4_MASK, COL5_MASK, COL6_MASK, COL7_MASK, COL8_MASK, COL9_MASK, COL10_MASK, COL11_MASK, COL12_MASK, COL13_MASK, COL14_MASK, COL15_MASK, COL16_MASK}; 30 31 bool matrix_scan_custom(matrix_row_t current_matrix[]) 32 { 33 bool changed = false; 34 uint8_t p0_data = tca6424_read_port(TCA6424_PORT0); 35 36 for (int col = 0; col < MATRIX_COLS; col++) { 37 // Select col and wait for col selecton to stabilize 38 switch(col) { 39 case 0: 40 set_pin(col_pins[col]); 41 break; 42 case 1 ... 8: 43 tca6424_write_port(TCA6424_PORT1, col_mask[col]); 44 break; 45 default: 46 tca6424_write_port(TCA6424_PORT0, col_mask[col]|(p0_data&0x01)); 47 break; 48 } 49 matrix_io_delay(); 50 51 // read row port for all rows 52 uint8_t row_value = tca6424_read_port(ROW_PORT); 53 for (uint8_t row = 0; row < MATRIX_ROWS; row++) { 54 uint8_t tmp = row; 55 // Store last value of row prior to reading 56 matrix_row_t last_row_value = current_matrix[tmp]; 57 58 // Check row pin state 59 if (row_value & row_mask[row]) { 60 // Pin HI, set col bit 61 current_matrix[tmp] |= (1 << col); 62 } else { 63 // Pin LOW, clear col bit 64 current_matrix[tmp] &= ~(1 << col); 65 } 66 67 // Determine if the matrix changed state 68 if ((last_row_value != current_matrix[tmp]) && !(changed)) { 69 changed = true; 70 } 71 } 72 // Unselect col 73 switch(col) { 74 case 0: 75 clear_pin(col_pins[col]); 76 break; 77 case 8: 78 tca6424_write_port(TCA6424_PORT1, 0); 79 break; 80 case 15: 81 tca6424_write_port(TCA6424_PORT0, p0_data&0x01); 82 break; 83 default: 84 break; 85 } 86 } 87 88 return changed; 89 }