qmk_firmware

QMK firmware for my keyboards (Corne, Sweep Ferris) and trackball (Ploopy Adept)
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board.h (7227B)


      1 /*
      2     ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
      3     ChibiOS - Copyright (C) 2023..2025 HorrorTroll
      4     ChibiOS - Copyright (C) 2023..2025 Zhaqian
      5 
      6     Licensed under the Apache License, Version 2.0 (the "License");
      7     you may not use this file except in compliance with the License.
      8     You may obtain a copy of the License at
      9 
     10         http://www.apache.org/licenses/LICENSE-2.0
     11 
     12     Unless required by applicable law or agreed to in writing, software
     13     distributed under the License is distributed on an "AS IS" BASIS,
     14     WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     15     See the License for the specific language governing permissions and
     16     limitations under the License.
     17 */
     18 
     19 #ifndef _BOARD_H_
     20 #define _BOARD_H_
     21 
     22 /*===========================================================================*/
     23 /* Driver constants.                                                         */
     24 /*===========================================================================*/
     25 
     26 /*
     27  * Setup for a Generic AT32F415 board.
     28  */
     29 
     30 /*
     31  * Board identifier.
     32  */
     33 #define BOARD_GENERIC_AT32_F415XX
     34 #define BOARD_NAME                  "GENERIC AT32F415 board"
     35 
     36 /*
     37  * Board oscillators-related settings.
     38  */
     39 #if !defined(AT32_LEXTCLK)
     40 #define AT32_LEXTCLK                32768
     41 #endif
     42 
     43 #if !defined(AT32_HEXTCLK)
     44 #define AT32_HEXTCLK                8000000
     45 #endif
     46 
     47 /*
     48  * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.
     49  */
     50 #define AT32F415KB
     51 
     52 /*
     53  * GPIO settings, allow unused GPIO for smaller chip packages.
     54  */
     55 #if defined(AT32F415KB) || defined(AT32F415KC)
     56 #define AT32_HAS_GPIOC              TRUE
     57 #define AT32_HAS_GPIOF              TRUE
     58 #endif
     59 
     60 /*
     61  * IO pins assignments.
     62  */
     63 #define GPIOA_PIN0                  0U
     64 #define GPIOA_PIN1                  1U
     65 #define GPIOA_PIN2                  2U
     66 #define GPIOA_PIN3                  3U
     67 #define GPIOA_PIN4                  4U
     68 #define GPIOA_PIN5                  5U
     69 #define GPIOA_PIN6                  6U
     70 #define GPIOA_PIN7                  7U
     71 #define GPIOA_PIN8                  8U
     72 #define GPIOA_PIN9                  9U
     73 #define GPIOA_PIN10                 10U
     74 #define GPIOA_PIN11                 11U
     75 #define GPIOA_PIN12                 12U
     76 #define GPIOA_SWDIO                 13U
     77 #define GPIOA_SWCLK                 14U
     78 #define GPIOA_PIN15                 15U
     79 
     80 #define GPIOB_PIN0                  0U
     81 #define GPIOB_PIN1                  1U
     82 #define GPIOB_PIN2                  2U
     83 #define GPIOB_PIN3                  3U
     84 #define GPIOB_PIN4                  4U
     85 #define GPIOB_PIN5                  5U
     86 #define GPIOB_PIN6                  6U
     87 #define GPIOB_PIN7                  7U
     88 #define GPIOB_PIN8                  8U
     89 #define GPIOB_PIN9                  9U
     90 #define GPIOB_PIN10                 10U
     91 #define GPIOB_PIN11                 11U
     92 #define GPIOB_PIN12                 12U
     93 #define GPIOB_PIN13                 13U
     94 #define GPIOB_PIN14                 14U
     95 #define GPIOB_PIN15                 15U
     96 
     97 #define GPIOC_PIN0                  0U
     98 #define GPIOC_PIN1                  1U
     99 #define GPIOC_PIN2                  2U
    100 #define GPIOC_PIN3                  3U
    101 #define GPIOC_PIN4                  4U
    102 #define GPIOC_PIN5                  5U
    103 #define GPIOC_PIN6                  6U
    104 #define GPIOC_PIN7                  7U
    105 #define GPIOC_PIN8                  8U
    106 #define GPIOC_PIN9                  9U
    107 #define GPIOC_PIN10                 10U
    108 #define GPIOC_PIN11                 11U
    109 #define GPIOC_PIN12                 12U
    110 #define GPIOC_PIN13                 13U
    111 #define GPIOC_PIN14                 14U
    112 #define GPIOC_PIN15                 15U
    113 
    114 #define GPIOD_HEXT_IN               0U
    115 #define GPIOD_HEXT_OUT              1U
    116 #define GPIOD_PIN2                  2U
    117 
    118 #define GPIOF_PIN4                  4U
    119 #define GPIOF_PIN5                  5U
    120 #define GPIOF_PIN6                  6U
    121 #define GPIOF_PIN7                  7U
    122 
    123 /*===========================================================================*/
    124 /* Driver pre-compile time settings.                                         */
    125 /*===========================================================================*/
    126 
    127 /*===========================================================================*/
    128 /* Derived constants and error checks.                                       */
    129 /*===========================================================================*/
    130 
    131 /*===========================================================================*/
    132 /* Driver data structures and types.                                         */
    133 /*===========================================================================*/
    134 
    135 /*===========================================================================*/
    136 /* Driver macros.                                                            */
    137 /*===========================================================================*/
    138 
    139 /*
    140  * I/O ports initial setup, this configuration is established soon after reset
    141  * in the initialization code.
    142  *
    143  * The digits have the following meaning:
    144  *   0 - Analog input.
    145  *   1 - Push Pull output 10MHz.
    146  *   2 - Push Pull output 2MHz.
    147  *   3 - Push Pull output 50MHz.
    148  *   4 - Digital input.
    149  *   5 - Open Drain output 10MHz.
    150  *   6 - Open Drain output 2MHz.
    151  *   7 - Open Drain output 50MHz.
    152  *   8 - Digital input with Pull-Up or Pull-Down resistor depending on ODT.
    153  *   9 - Multiplexing Push Pull output 10MHz.
    154  *   A - Multiplexing Push Pull output 2MHz.
    155  *   B - Multiplexing Push Pull output 50MHz.
    156  *   C - Reserved.
    157  *   D - Multiplexing Open Drain output 10MHz.
    158  *   E - Multiplexing Open Drain output 2MHz.
    159  *   F - Multiplexing Open Drain output 50MHz.
    160  * Please refer to the AT32 Reference Manual for details.
    161  */
    162 
    163 /*
    164  * Port A setup.
    165  */
    166 #define VAL_GPIOACFGLR          0x88888888      /*  PA7...PA0 */
    167 #define VAL_GPIOACFGHR          0x88888888      /* PA15...PA8 */
    168 #define VAL_GPIOAODT            0xFFFFFFFF
    169 
    170 /*
    171  * Port B setup.
    172  */
    173 #define VAL_GPIOBCFGLR          0x88888888      /*  PB7...PB0 */
    174 #define VAL_GPIOBCFGHR          0x88888888      /* PB15...PB8 */
    175 #define VAL_GPIOBODT            0xFFFFFFFF
    176 
    177 /*
    178  * Port C setup.
    179  */
    180 #define VAL_GPIOCCFGLR          0x88888888      /*  PC7...PC0 */
    181 #define VAL_GPIOCCFGHR          0x88888888      /* PC15...PC8 */
    182 #define VAL_GPIOCODT            0xFFFFFFFF
    183 
    184 /*
    185  * Port D setup.
    186  * Everything input with pull-up except:
    187  * PD0  - Normal input              (GPIOD_HEXT_IN).
    188  * PD1  - Normal input              (GPIOD_HEXT_OUT).
    189  */
    190 #define VAL_GPIODCFGLR          0x88888844      /*  PD7...PD0 */
    191 #define VAL_GPIODCFGHR          0x88888888      /* PD15...PD8 */
    192 #define VAL_GPIODODT            0xFFFFFFFF
    193 
    194 /*
    195  * Port F setup.
    196  */
    197 #define VAL_GPIOFCFGLR          0x88888888      /*  PF7...PF0 */
    198 #define VAL_GPIOFCFGHR          0x88888888      /* PF15...PF8 */
    199 #define VAL_GPIOFODT            0xFFFFFFFF
    200 
    201 /*===========================================================================*/
    202 /* External declarations.                                                    */
    203 /*===========================================================================*/
    204 
    205 #if !defined(_FROM_ASM_)
    206 #ifdef __cplusplus
    207 extern "C" {
    208 #endif
    209   void boardInit(void);
    210 #ifdef __cplusplus
    211 }
    212 #endif
    213 #endif /* _FROM_ASM_ */
    214 
    215 #endif /* _BOARD_H_ */