qmk_firmware

QMK firmware for my keyboards (Corne, Sweep Ferris) and trackball (Ploopy Adept)
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board.h (4618B)


      1 /* Copyright 2020 Nick Brassel (tzarc)
      2  *
      3  *  This program is free software: you can redistribute it and/or modify
      4  *  it under the terms of the GNU General Public License as published by
      5  *  the Free Software Foundation, either version 3 of the License, or
      6  *  (at your option) any later version.
      7  *
      8  *  This program is distributed in the hope that it will be useful,
      9  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
     10  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     11  *  GNU General Public License for more details.
     12  *
     13  *  You should have received a copy of the GNU General Public License
     14  *  along with this program.  If not, see <https://www.gnu.org/licenses/>.
     15  */
     16 #pragma once
     17 
     18 #include_next <board.h>
     19 
     20 // Force B9 as input to align with qmk defaults
     21 #undef VAL_GPIOB_MODER
     22 #define VAL_GPIOB_MODER             (PIN_MODE_INPUT(GPIOB_PIN0) |           \
     23                                      PIN_MODE_INPUT(GPIOB_PIN1) |           \
     24                                      PIN_MODE_INPUT(GPIOB_PIN2) |           \
     25                                      PIN_MODE_ALTERNATE(GPIOB_SWO) |        \
     26                                      PIN_MODE_INPUT(GPIOB_PIN4) |           \
     27                                      PIN_MODE_INPUT(GPIOB_PIN5) |           \
     28                                      PIN_MODE_INPUT(GPIOB_LSM303DLHC_SCL) | \
     29                                      PIN_MODE_INPUT(GPIOB_PIN7) |           \
     30                                      PIN_MODE_INPUT(GPIOB_PIN8) |           \
     31                                      PIN_MODE_INPUT(GPIOB_LSM303DLHC_SDA) | \
     32                                      PIN_MODE_ALTERNATE(GPIOB_MP45DT02_CLK_IN) |\
     33                                      PIN_MODE_INPUT(GPIOB_PIN11) |          \
     34                                      PIN_MODE_INPUT(GPIOB_PIN12) |          \
     35                                      PIN_MODE_INPUT(GPIOB_PIN13) |          \
     36                                      PIN_MODE_INPUT(GPIOB_PIN14) |          \
     37                                      PIN_MODE_INPUT(GPIOB_PIN15))
     38 
     39 #undef VAL_GPIOB_PUPDR
     40 #define VAL_GPIOB_PUPDR             (PIN_PUPDR_PULLUP(GPIOB_PIN0) |         \
     41                                      PIN_PUPDR_PULLUP(GPIOB_PIN1) |         \
     42                                      PIN_PUPDR_PULLUP(GPIOB_PIN2) |         \
     43                                      PIN_PUPDR_PULLUP(GPIOB_SWO) |          \
     44                                      PIN_PUPDR_PULLUP(GPIOB_PIN4) |         \
     45                                      PIN_PUPDR_PULLUP(GPIOB_PIN5) |         \
     46                                      PIN_PUPDR_PULLUP(GPIOB_LSM303DLHC_SCL) |\
     47                                      PIN_PUPDR_PULLUP(GPIOB_PIN7) |         \
     48                                      PIN_PUPDR_PULLUP(GPIOB_PIN8) |         \
     49                                      PIN_PUPDR_PULLUP(GPIOB_LSM303DLHC_SDA) |\
     50                                      PIN_PUPDR_FLOATING(GPIOB_MP45DT02_CLK_IN) |\
     51                                      PIN_PUPDR_PULLUP(GPIOB_PIN11) |        \
     52                                      PIN_PUPDR_PULLUP(GPIOB_PIN12) |        \
     53                                      PIN_PUPDR_PULLUP(GPIOB_PIN13) |        \
     54                                      PIN_PUPDR_PULLUP(GPIOB_PIN14) |        \
     55                                      PIN_PUPDR_PULLUP(GPIOB_PIN15))
     56 
     57 #undef VAL_GPIOB_AFRL
     58 #define VAL_GPIOB_AFRL              (PIN_AFIO_AF(GPIOB_PIN0, 0U) |          \
     59                                      PIN_AFIO_AF(GPIOB_PIN1, 0U) |          \
     60                                      PIN_AFIO_AF(GPIOB_PIN2, 0U) |          \
     61                                      PIN_AFIO_AF(GPIOB_SWO, 0U) |           \
     62                                      PIN_AFIO_AF(GPIOB_PIN4, 0U) |          \
     63                                      PIN_AFIO_AF(GPIOB_PIN5, 0U) |          \
     64                                      PIN_AFIO_AF(GPIOB_LSM303DLHC_SCL, 0) | \
     65                                      PIN_AFIO_AF(GPIOB_PIN7, 0U))
     66 
     67 #undef VAL_GPIOB_AFRH
     68 #define VAL_GPIOB_AFRH              (PIN_AFIO_AF(GPIOB_PIN8, 0U) |          \
     69                                      PIN_AFIO_AF(GPIOB_LSM303DLHC_SDA, 0) | \
     70                                      PIN_AFIO_AF(GPIOB_MP45DT02_CLK_IN, 5U) |\
     71                                      PIN_AFIO_AF(GPIOB_PIN11, 0U) |         \
     72                                      PIN_AFIO_AF(GPIOB_PIN12, 0U) |         \
     73                                      PIN_AFIO_AF(GPIOB_PIN13, 0U) |         \
     74                                      PIN_AFIO_AF(GPIOB_PIN14, 0U) |         \
     75                                      PIN_AFIO_AF(GPIOB_PIN15, 0U))
     76 
     77 #undef STM32_HSE_BYPASS