From 2236e79556053d9d59a613634433848f1f7cf513 Mon Sep 17 00:00:00 2001 From: vin Date: Wed, 3 Jul 2024 19:49:21 -0400 Subject: [PATCH] fix SBC bug in the rewrite and improve logging --- cpu.c | 89 ++++++---------- opcodes.h | 305 +++++++++++++++++++++++++++--------------------------- 2 files changed, 182 insertions(+), 212 deletions(-) diff --git a/cpu.c b/cpu.c index 6e44c7f..df9c852 100644 --- a/cpu.c +++ b/cpu.c @@ -99,55 +99,6 @@ memwrite16(uint16_t addr, uint16_t word) memory[addr + 1] = (word & 0xFF00) >> 8; } -static uint8_t -opcode_arg(enum addressing_mode mode) -{ - uint16_t arg, val; - - if (mode != AM_ABS && mode != AM_ABS_X && mode != AM_ABS_Y) { - arg = peek(regs.pc++); - } else { - arg = peek16(regs.pc); - regs.pc += 2; - } - - switch (mode) { - case AM_IMM: - case AM_REL: - val = arg; - break; - case AM_ZP: - val = peek(arg % 256); - break; - case AM_ZP_X: - val = peek((arg + regs.x) % 256); - break; - case AM_ZP_Y: - val = peek((arg + regs.y) % 256); - break; - case AM_ABS: - val = peek16(arg); - break; - case AM_ABS_X: - val = peek16(arg + regs.x); - break; - case AM_ABS_Y: - val = peek16(arg + regs.y); - break; - case AM_IND_X: - val = peek(peek((arg + regs.x) % 256) + peek((arg + regs.x + 1) % 256) * 256); - break; - case AM_IND_Y: - val = peek(peek(arg) + peek((arg + 1) % 256) * 256 + regs.y); - break; - default: - fprintf(stderr, "INVALID ADDRESSING MODE %i\n", mode); - abort(); - } - - return val; -} - static uint16_t opcode_mem(enum addressing_mode mode) { @@ -193,7 +144,7 @@ opcode_mem(enum addressing_mode mode) val = peek(arg) + peek((arg + 1) % 256) * 256 + regs.y; break; default: - fprintf(stderr, "opcode_mem INVALID ADDRESSING MODE %i\n", mode); + fprintf(stderr, "INVALID ADDRESSING MODE %i\n", mode); abort(); } @@ -271,7 +222,8 @@ BEQ(uint16_t arg) void BIT(uint16_t arg) { - uint8_t tmp = peek(arg); + uint8_t tmp = arg; + regs.status.zero = (regs.a & tmp) == 0; regs.status.overflow = (tmp & (1 << 6)) != 0; STATUS_UPDATE_NEGATIVE(tmp); @@ -628,8 +580,18 @@ RTS(uint16_t arg) void SBC(uint16_t arg) { - /* SBC is described online as ADC with argument as two's complement */ - ADC(~(uint8_t)arg); + uint8_t tmp = arg & 0xFF; + uint16_t diff; + + diff = regs.a - tmp - !regs.status.carry; + + regs.status.carry = diff > 0xFF; + regs.status.carry = !regs.status.carry; + /* overflow flag formula: https://stackoverflow.com/a/29224684 */ + regs.status.overflow = ((regs.a ^ arg) & (regs.a ^ diff) & 0x80) != 0; + regs.a = diff & 0xFF; + + STATUS_UPDATE_NZ(regs.a); } void @@ -759,10 +721,10 @@ interpret(void) printf("$%04X", arg); break; case AM_ABS_X: - printf("$%04X,X", arg); + printf("$%04X,X @ %04X", arg - regs.x, arg); break; case AM_ABS_Y: - printf("$%04X,Y", arg); + printf("$%04X,Y @ %04X", arg - regs.y, arg); break; case AM_IND: printf("($%04X) = %04X\t\t", arg, peek16(arg)); @@ -776,13 +738,20 @@ interpret(void) break; } - if (opcodes[op].didmemory) printf(" = %02X", peek(arg)); - printf("\t\t\t"); + if (opcodes[op].memread || opcodes[op].memwrite) + printf(" = %02X", peek(arg)); - printf("A:%02X X:%02X Y:%02X P:%02X SP:%02X CYC:%d %08b\n", - regs.a, regs.x, regs.y, STATUS_TO_INT(), regs.sp, cycles, STATUS_TO_INT()); + if (mode != AM_ABS_X && mode != AM_ABS_Y) + putchar('\t'); + printf("\t\t"); - opcodes[op].instr(arg); + printf("A:%02X X:%02X Y:%02X P:%02X SP:%02X CYC:%d\n", + regs.a, regs.x, regs.y, STATUS_TO_INT(), regs.sp, cycles); + + if (opcodes[op].memread) + opcodes[op].instr(peek(arg)); + else + opcodes[op].instr(arg); cycles += opcodes[op].cycles; } loop_exit: diff --git a/opcodes.h b/opcodes.h index ef57ab0..02b30e7 100644 --- a/opcodes.h +++ b/opcodes.h @@ -26,161 +26,162 @@ struct opcode { void (*instr)(uint16_t arg); uint8_t bytes; uint8_t cycles; - bool didmemory; + bool memread; + bool memwrite; enum addressing_mode mode; }; struct opcode opcodes[0x100] = { /* official opcodes */ - [0x69] = { "ADC", ADC, 2, 2, false, AM_IMM }, - [0x65] = { "ADC", ADC, 2, 3, false, AM_ZP }, - [0x75] = { "ADC", ADC, 2, 4, false, AM_ZP_X }, - [0x6D] = { "ADC", ADC, 3, 4, false, AM_ABS }, - [0x7D] = { "ADC", ADC, 3, 4, false, AM_ABS_X }, - [0x79] = { "ADC", ADC, 3, 4, false, AM_ABS_Y }, - [0x61] = { "ADC", ADC, 2, 6, false, AM_IND_X }, - [0x71] = { "ADC", ADC, 2, 5, false, AM_IND_Y }, - [0x29] = { "AND", AND, 2, 2, false, AM_IMM }, - [0x25] = { "AND", AND, 2, 3, false, AM_ZP }, - [0x35] = { "AND", AND, 2, 4, false, AM_ZP_X }, - [0x2D] = { "AND", AND, 3, 4, false, AM_ABS }, - [0x3D] = { "AND", AND, 3, 4, false, AM_ABS_X }, - [0x39] = { "AND", AND, 3, 4, false, AM_ABS_Y }, - [0x21] = { "AND", AND, 2, 6, false, AM_IND_X }, - [0x31] = { "AND", AND, 2, 5, false, AM_IND_Y }, - [0x0A] = { "ASL", ASL_acc, 1, 2, false, AM_ACC }, - [0x06] = { "ASL", ASL, 2, 5, true, AM_ZP }, - [0x16] = { "ASL", ASL, 2, 6, true, AM_ZP_X }, - [0x0E] = { "ASL", ASL, 3, 6, true, AM_ABS }, - [0x1E] = { "ASL", ASL, 3, 7, true, AM_ABS_X }, - [0x90] = { "BCC", BCC, 2, 2, false, AM_REL }, - [0xB0] = { "BCS", BCS, 2, 2, false, AM_REL }, - [0xF0] = { "BEQ", BEQ, 2, 2, false, AM_REL }, - [0x24] = { "BIT", BIT, 2, 3, true, AM_ZP }, - [0x2C] = { "BIT", BIT, 3, 4, true, AM_ABS }, - [0x30] = { "BMI", BMI, 2, 2, false, AM_REL }, - [0xD0] = { "BNE", BNE, 2, 2, false, AM_REL }, - [0x10] = { "BPL", BPL, 2, 2, false, AM_REL }, - [0x00] = { "BRK", BRK, 1, 7, false, AM_NONE }, - [0x50] = { "BVC", BVC, 2, 2, false, AM_REL }, - [0x70] = { "BVS", BVS, 2, 2, false, AM_REL }, - [0x18] = { "CLC", CLC, 1, 2, false, AM_NONE }, - [0xD8] = { "CLD", CLD, 1, 2, false, AM_NONE }, - [0x58] = { "CLI", CLI, 1, 2, false, AM_NONE }, - [0xB8] = { "CLV", CLV, 1, 2, false, AM_NONE }, - [0xC9] = { "CMP", CMP, 2, 2, false, AM_IMM }, - [0xC5] = { "CMP", CMP, 2, 3, false, AM_ZP }, - [0xD5] = { "CMP", CMP, 2, 4, false, AM_ZP_X }, - [0xCD] = { "CMP", CMP, 3, 4, false, AM_ABS }, - [0xDD] = { "CMP", CMP, 3, 4, false, AM_ABS_X }, - [0xD9] = { "CMP", CMP, 3, 4, false, AM_ABS_Y }, - [0xC1] = { "CMP", CMP, 2, 6, false, AM_IND_X }, - [0xD1] = { "CMP", CMP, 2, 5, false, AM_IND_Y }, - [0xE0] = { "CPX", CPX, 2, 2, false, AM_IMM }, - [0xE4] = { "CPX", CPX, 2, 3, false, AM_ZP }, - [0xEC] = { "CPX", CPX, 3, 4, false, AM_ABS }, - [0xC0] = { "CPY", CPY, 2, 2, false, AM_IMM }, - [0xC4] = { "CPY", CPY, 2, 3, false, AM_ZP }, - [0xCC] = { "CPY", CPY, 3, 4, false, AM_ABS }, - [0xC6] = { "DEC", DEC, 2, 5, true, AM_ZP }, - [0xD6] = { "DEC", DEC, 2, 6, true, AM_ZP_X }, - [0xCE] = { "DEC", DEC, 3, 6, true, AM_ABS }, - [0xDE] = { "DEC", DEC, 3, 7, true, AM_ABS_X }, - [0xCA] = { "DEX", DEX, 1, 2, false, AM_NONE }, - [0x88] = { "DEY", DEY, 1, 2, false, AM_NONE }, - [0x49] = { "EOR", EOR, 2, 2, false, AM_IMM }, - [0x45] = { "EOR", EOR, 2, 3, false, AM_ZP }, - [0x55] = { "EOR", EOR, 2, 4, false, AM_ZP_X }, - [0x4D] = { "EOR", EOR, 3, 4, false, AM_ABS }, - [0x5D] = { "EOR", EOR, 3, 4, false, AM_ABS_X }, - [0x59] = { "EOR", EOR, 3, 4, false, AM_ABS_Y }, - [0x41] = { "EOR", EOR, 2, 6, false, AM_IND_X }, - [0x51] = { "EOR", EOR, 2, 5, false, AM_IND_Y }, - [0xE6] = { "INC", INC, 2, 5, true, AM_ZP }, - [0xF6] = { "INC", INC, 2, 6, true, AM_ZP_X }, - [0xEE] = { "INC", INC, 3, 6, true, AM_ABS }, - [0xFE] = { "INC", INC, 3, 7, true, AM_ABS_X }, - [0xE8] = { "INX", INX, 1, 2, false, AM_NONE }, - [0xC8] = { "INY", INY, 1, 2, false, AM_NONE }, - [0x4C] = { "JMP", JMP, 3, 3, false, AM_ABS }, - [0x6C] = { "JMP", JMP, 3, 5, false, AM_IND }, - [0x20] = { "JSR", JSR, 3, 6, false, AM_ABS }, - [0xA9] = { "LDA", LDA, 2, 2, false, AM_IMM }, - [0xA5] = { "LDA", LDA, 2, 3, false, AM_ZP }, - [0xB5] = { "LDA", LDA, 2, 4, false, AM_ZP_X }, - [0xAD] = { "LDA", LDA, 3, 4, false, AM_ABS }, - [0xBD] = { "LDA", LDA, 3, 4, false, AM_ABS_X }, - [0xB9] = { "LDA", LDA, 3, 4, false, AM_ABS_Y }, - [0xA1] = { "LDA", LDA, 2, 6, false, AM_IND_X }, - [0xB1] = { "LDA", LDA, 2, 5, false, AM_IND_Y }, - [0xA2] = { "LDX", LDX, 2, 2, false, AM_IMM }, - [0xA6] = { "LDX", LDX, 2, 3, true, AM_ZP }, - [0xB6] = { "LDX", LDX, 2, 4, false, AM_ZP_Y }, - [0xAE] = { "LDX", LDX, 3, 4, true, AM_ABS }, - [0xBE] = { "LDX", LDX, 3, 4, false, AM_ABS_Y }, - [0xA0] = { "LDY", LDY, 2, 2, false, AM_IMM }, - [0xA4] = { "LDY", LDY, 2, 3, false, AM_ZP }, - [0xB4] = { "LDY", LDY, 2, 4, false, AM_ZP_X }, - [0xAC] = { "LDY", LDY, 3, 4, false, AM_ABS }, - [0xBC] = { "LDY", LDY, 3, 4, false, AM_ABS_X }, - [0x4A] = { "LSR", LSR_acc, 1, 2, false, AM_ACC }, - [0x46] = { "LSR", LSR, 2, 5, true, AM_ZP }, - [0x56] = { "LSR", LSR, 2, 6, true, AM_ZP_X }, - [0x4E] = { "LSR", LSR, 3, 6, true, AM_ABS }, - [0x5E] = { "LSR", LSR, 3, 7, true, AM_ABS_X }, - [0xEA] = { "NOP", NOP, 1, 2, false, AM_NONE }, - [0x09] = { "ORA", ORA, 2, 2, false, AM_IMM }, - [0x05] = { "ORA", ORA, 2, 3, false, AM_ZP }, - [0x15] = { "ORA", ORA, 2, 4, false, AM_ZP_X }, - [0x0D] = { "ORA", ORA, 3, 4, false, AM_ABS }, - [0x1D] = { "ORA", ORA, 3, 4, false, AM_ABS_X }, - [0x19] = { "ORA", ORA, 3, 4, false, AM_ABS_Y }, - [0x01] = { "ORA", ORA, 2, 6, false, AM_IND_X }, - [0x11] = { "ORA", ORA, 2, 5, false, AM_IND_Y }, - [0x48] = { "PHA", PHA, 1, 3, false, AM_NONE }, - [0x08] = { "PHP", PHP, 1, 3, false, AM_NONE }, - [0x68] = { "PLA", PLA, 1, 4, false, AM_NONE }, - [0x28] = { "PLP", PLP, 1, 4, false, AM_NONE }, - [0x2A] = { "ROL", ROL_acc, 1, 2, false, AM_ACC }, - [0x26] = { "ROL", ROL, 2, 5, true, AM_ZP }, - [0x36] = { "ROL", ROL, 2, 6, true, AM_ZP_X }, - [0x2E] = { "ROL", ROL, 3, 6, true, AM_ABS }, - [0x3E] = { "ROL", ROL, 3, 7, true, AM_ABS_X }, - [0x6A] = { "ROR", ROR_acc, 1, 2, false, AM_ACC }, - [0x66] = { "ROR", ROR, 2, 5, true, AM_ZP }, - [0x76] = { "ROR", ROR, 2, 6, true, AM_ZP_X }, - [0x6E] = { "ROR", ROR, 3, 6, true, AM_ABS }, - [0x7E] = { "ROR", ROR, 3, 7, true, AM_ABS_X }, - [0x40] = { "RTI", RTI, 1, 6, false, AM_NONE }, - [0x60] = { "RTS", RTS, 1, 6, false, AM_NONE }, - [0xE9] = { "SBC", SBC, 2, 2, false, AM_IMM }, - [0xE5] = { "SBC", SBC, 2, 3, false, AM_ZP }, - [0xF5] = { "SBC", SBC, 2, 4, false, AM_ZP_X }, - [0xED] = { "SBC", SBC, 3, 4, false, AM_ABS }, - [0xFD] = { "SBC", SBC, 3, 4, false, AM_ABS_X }, - [0xF9] = { "SBC", SBC, 3, 4, false, AM_ABS_Y }, - [0xE1] = { "SBC", SBC, 2, 6, false, AM_IND_X }, - [0xF1] = { "SBC", SBC, 2, 5, false, AM_IND_Y }, - [0x38] = { "SEC", SEC, 1, 2, false, AM_NONE }, - [0xF8] = { "SED", SED, 1, 2, false, AM_NONE }, - [0x78] = { "SEI", SEI, 1, 2, false, AM_NONE }, - [0x85] = { "STA", STA, 2, 3, true, AM_ZP }, - [0x95] = { "STA", STA, 2, 4, true, AM_ZP_X }, - [0x8D] = { "STA", STA, 3, 4, true, AM_ABS }, - [0x9D] = { "STA", STA, 3, 5, true, AM_ABS_X }, - [0x99] = { "STA", STA, 3, 5, true, AM_ABS_Y }, - [0x81] = { "STA", STA, 2, 6, true, AM_IND_X }, - [0x91] = { "STA", STA, 2, 6, true, AM_IND_Y }, - [0x86] = { "STX", STX, 2, 3, true, AM_ZP }, - [0x96] = { "STX", STX, 2, 4, true, AM_ZP_Y }, - [0x8E] = { "STX", STX, 3, 4, true, AM_ABS }, - [0x84] = { "STY", STY, 2, 3, true, AM_ZP }, - [0x94] = { "STY", STY, 2, 4, true, AM_ZP_X }, - [0x8C] = { "STY", STY, 3, 4, true, AM_ABS }, - [0xAA] = { "TAX", TAX, 1, 2, false, AM_NONE }, - [0xA8] = { "TAY", TAY, 1, 2, false, AM_NONE }, - [0xBA] = { "TSX", TSX, 1, 2, false, AM_NONE }, - [0x8A] = { "TXA", TXA, 1, 2, false, AM_NONE }, - [0x9A] = { "TXS", TXS, 1, 2, false, AM_NONE }, - [0x98] = { "TYA", TYA, 1, 2, false, AM_NONE }, + [0x69] = { "ADC", ADC, 2, 2, false, false, AM_IMM }, + [0x65] = { "ADC", ADC, 2, 3, false, false, AM_ZP }, + [0x75] = { "ADC", ADC, 2, 4, false, false, AM_ZP_X }, + [0x6D] = { "ADC", ADC, 3, 4, false, false, AM_ABS }, + [0x7D] = { "ADC", ADC, 3, 4, false, false, AM_ABS_X }, + [0x79] = { "ADC", ADC, 3, 4, false, false, AM_ABS_Y }, + [0x61] = { "ADC", ADC, 2, 6, false, false, AM_IND_X }, + [0x71] = { "ADC", ADC, 2, 5, false, false, AM_IND_Y }, + [0x29] = { "AND", AND, 2, 2, false, false, AM_IMM }, + [0x25] = { "AND", AND, 2, 3, false, false, AM_ZP }, + [0x35] = { "AND", AND, 2, 4, false, false, AM_ZP_X }, + [0x2D] = { "AND", AND, 3, 4, false, false, AM_ABS }, + [0x3D] = { "AND", AND, 3, 4, false, false, AM_ABS_X }, + [0x39] = { "AND", AND, 3, 4, false, false, AM_ABS_Y }, + [0x21] = { "AND", AND, 2, 6, false, false, AM_IND_X }, + [0x31] = { "AND", AND, 2, 5, false, false, AM_IND_Y }, + [0x0A] = { "ASL", ASL_acc, 1, 2, false, false, AM_ACC }, + [0x06] = { "ASL", ASL, 2, 5, false, true, AM_ZP }, + [0x16] = { "ASL", ASL, 2, 6, false, true, AM_ZP_X }, + [0x0E] = { "ASL", ASL, 3, 6, false, true, AM_ABS }, + [0x1E] = { "ASL", ASL, 3, 7, false, true, AM_ABS_X }, + [0x90] = { "BCC", BCC, 2, 2, false, false, AM_REL }, + [0xB0] = { "BCS", BCS, 2, 2, false, false, AM_REL }, + [0xF0] = { "BEQ", BEQ, 2, 2, false, false, AM_REL }, + [0x24] = { "BIT", BIT, 2, 3, true, false, AM_ZP }, + [0x2C] = { "BIT", BIT, 3, 4, true, false, AM_ABS }, + [0x30] = { "BMI", BMI, 2, 2, false, false, AM_REL }, + [0xD0] = { "BNE", BNE, 2, 2, false, false, AM_REL }, + [0x10] = { "BPL", BPL, 2, 2, false, false, AM_REL }, + [0x00] = { "BRK", BRK, 1, 7, false, false, AM_NONE }, + [0x50] = { "BVC", BVC, 2, 2, false, false, AM_REL }, + [0x70] = { "BVS", BVS, 2, 2, false, false, AM_REL }, + [0x18] = { "CLC", CLC, 1, 2, false, false, AM_NONE }, + [0xD8] = { "CLD", CLD, 1, 2, false, false, AM_NONE }, + [0x58] = { "CLI", CLI, 1, 2, false, false, AM_NONE }, + [0xB8] = { "CLV", CLV, 1, 2, false, false, AM_NONE }, + [0xC9] = { "CMP", CMP, 2, 2, false, false, AM_IMM }, + [0xC5] = { "CMP", CMP, 2, 3, false, false, AM_ZP }, + [0xD5] = { "CMP", CMP, 2, 4, false, false, AM_ZP_X }, + [0xCD] = { "CMP", CMP, 3, 4, false, false, AM_ABS }, + [0xDD] = { "CMP", CMP, 3, 4, false, false, AM_ABS_X }, + [0xD9] = { "CMP", CMP, 3, 4, false, false, AM_ABS_Y }, + [0xC1] = { "CMP", CMP, 2, 6, false, false, AM_IND_X }, + [0xD1] = { "CMP", CMP, 2, 5, false, false, AM_IND_Y }, + [0xE0] = { "CPX", CPX, 2, 2, false, false, AM_IMM }, + [0xE4] = { "CPX", CPX, 2, 3, false, false, AM_ZP }, + [0xEC] = { "CPX", CPX, 3, 4, false, false, AM_ABS }, + [0xC0] = { "CPY", CPY, 2, 2, false, false, AM_IMM }, + [0xC4] = { "CPY", CPY, 2, 3, false, false, AM_ZP }, + [0xCC] = { "CPY", CPY, 3, 4, false, false, AM_ABS }, + [0xC6] = { "DEC", DEC, 2, 5, false, true, AM_ZP }, + [0xD6] = { "DEC", DEC, 2, 6, false, true, AM_ZP_X }, + [0xCE] = { "DEC", DEC, 3, 6, false, true, AM_ABS }, + [0xDE] = { "DEC", DEC, 3, 7, false, true, AM_ABS_X }, + [0xCA] = { "DEX", DEX, 1, 2, false, false, AM_NONE }, + [0x88] = { "DEY", DEY, 1, 2, false, false, AM_NONE }, + [0x49] = { "EOR", EOR, 2, 2, false, false, AM_IMM }, + [0x45] = { "EOR", EOR, 2, 3, false, false, AM_ZP }, + [0x55] = { "EOR", EOR, 2, 4, false, false, AM_ZP_X }, + [0x4D] = { "EOR", EOR, 3, 4, false, false, AM_ABS }, + [0x5D] = { "EOR", EOR, 3, 4, false, false, AM_ABS_X }, + [0x59] = { "EOR", EOR, 3, 4, false, false, AM_ABS_Y }, + [0x41] = { "EOR", EOR, 2, 6, false, false, AM_IND_X }, + [0x51] = { "EOR", EOR, 2, 5, false, false, AM_IND_Y }, + [0xE6] = { "INC", INC, 2, 5, false, true, AM_ZP }, + [0xF6] = { "INC", INC, 2, 6, false, true, AM_ZP_X }, + [0xEE] = { "INC", INC, 3, 6, false, true, AM_ABS }, + [0xFE] = { "INC", INC, 3, 7, false, true, AM_ABS_X }, + [0xE8] = { "INX", INX, 1, 2, false, false, AM_NONE }, + [0xC8] = { "INY", INY, 1, 2, false, false, AM_NONE }, + [0x4C] = { "JMP", JMP, 3, 3, false, false, AM_ABS }, + [0x6C] = { "JMP", JMP, 3, 5, false, false, AM_IND }, + [0x20] = { "JSR", JSR, 3, 6, false, false, AM_ABS }, + [0xA9] = { "LDA", LDA, 2, 2, false, false, AM_IMM }, + [0xA5] = { "LDA", LDA, 2, 3, true, false, AM_ZP }, + [0xB5] = { "LDA", LDA, 2, 4, true, false, AM_ZP_X }, + [0xAD] = { "LDA", LDA, 3, 4, true, false, AM_ABS }, + [0xBD] = { "LDA", LDA, 3, 4, true, false, AM_ABS_X }, + [0xB9] = { "LDA", LDA, 3, 4, true, false, AM_ABS_Y }, + [0xA1] = { "LDA", LDA, 2, 6, true, false, AM_IND_X }, + [0xB1] = { "LDA", LDA, 2, 5, true, false, AM_IND_Y }, + [0xA2] = { "LDX", LDX, 2, 2, false, false, AM_IMM }, + [0xA6] = { "LDX", LDX, 2, 3, true, false, AM_ZP }, + [0xB6] = { "LDX", LDX, 2, 4, true, false, AM_ZP_Y }, + [0xAE] = { "LDX", LDX, 3, 4, true, false, AM_ABS }, + [0xBE] = { "LDX", LDX, 3, 4, true, false, AM_ABS_Y }, + [0xA0] = { "LDY", LDY, 2, 2, false, false, AM_IMM }, + [0xA4] = { "LDY", LDY, 2, 3, true, false, AM_ZP }, + [0xB4] = { "LDY", LDY, 2, 4, true, false, AM_ZP_X }, + [0xAC] = { "LDY", LDY, 3, 4, true, false, AM_ABS }, + [0xBC] = { "LDY", LDY, 3, 4, true, false, AM_ABS_X }, + [0x4A] = { "LSR", LSR_acc, 1, 2, false, false, AM_ACC }, + [0x46] = { "LSR", LSR, 2, 5, false, true, AM_ZP }, + [0x56] = { "LSR", LSR, 2, 6, false, true, AM_ZP_X }, + [0x4E] = { "LSR", LSR, 3, 6, false, true, AM_ABS }, + [0x5E] = { "LSR", LSR, 3, 7, false, true, AM_ABS_X }, + [0xEA] = { "NOP", NOP, 1, 2, false, false, AM_NONE }, + [0x09] = { "ORA", ORA, 2, 2, false, false, AM_IMM }, + [0x05] = { "ORA", ORA, 2, 3, false, false, AM_ZP }, + [0x15] = { "ORA", ORA, 2, 4, false, false, AM_ZP_X }, + [0x0D] = { "ORA", ORA, 3, 4, false, false, AM_ABS }, + [0x1D] = { "ORA", ORA, 3, 4, false, false, AM_ABS_X }, + [0x19] = { "ORA", ORA, 3, 4, false, false, AM_ABS_Y }, + [0x01] = { "ORA", ORA, 2, 6, false, false, AM_IND_X }, + [0x11] = { "ORA", ORA, 2, 5, false, false, AM_IND_Y }, + [0x48] = { "PHA", PHA, 1, 3, false, false, AM_NONE }, + [0x08] = { "PHP", PHP, 1, 3, false, false, AM_NONE }, + [0x68] = { "PLA", PLA, 1, 4, false, false, AM_NONE }, + [0x28] = { "PLP", PLP, 1, 4, false, false, AM_NONE }, + [0x2A] = { "ROL", ROL_acc, 1, 2, false, false, AM_ACC }, + [0x26] = { "ROL", ROL, 2, 5, false, true, AM_ZP }, + [0x36] = { "ROL", ROL, 2, 6, false, true, AM_ZP_X }, + [0x2E] = { "ROL", ROL, 3, 6, false, true, AM_ABS }, + [0x3E] = { "ROL", ROL, 3, 7, false, true, AM_ABS_X }, + [0x6A] = { "ROR", ROR_acc, 1, 2, false, false, AM_ACC }, + [0x66] = { "ROR", ROR, 2, 5, false, true, AM_ZP }, + [0x76] = { "ROR", ROR, 2, 6, false, true, AM_ZP_X }, + [0x6E] = { "ROR", ROR, 3, 6, false, true, AM_ABS }, + [0x7E] = { "ROR", ROR, 3, 7, false, true, AM_ABS_X }, + [0x40] = { "RTI", RTI, 1, 6, false, false, AM_NONE }, + [0x60] = { "RTS", RTS, 1, 6, false, false, AM_NONE }, + [0xE9] = { "SBC", SBC, 2, 2, false, false, AM_IMM }, + [0xE5] = { "SBC", SBC, 2, 3, false, false, AM_ZP }, + [0xF5] = { "SBC", SBC, 2, 4, false, false, AM_ZP_X }, + [0xED] = { "SBC", SBC, 3, 4, false, false, AM_ABS }, + [0xFD] = { "SBC", SBC, 3, 4, false, false, AM_ABS_X }, + [0xF9] = { "SBC", SBC, 3, 4, false, false, AM_ABS_Y }, + [0xE1] = { "SBC", SBC, 2, 6, false, false, AM_IND_X }, + [0xF1] = { "SBC", SBC, 2, 5, false, false, AM_IND_Y }, + [0x38] = { "SEC", SEC, 1, 2, false, false, AM_NONE }, + [0xF8] = { "SED", SED, 1, 2, false, false, AM_NONE }, + [0x78] = { "SEI", SEI, 1, 2, false, false, AM_NONE }, + [0x85] = { "STA", STA, 2, 3, false, true, AM_ZP }, + [0x95] = { "STA", STA, 2, 4, false, true, AM_ZP_X }, + [0x8D] = { "STA", STA, 3, 4, false, true, AM_ABS }, + [0x9D] = { "STA", STA, 3, 5, false, true, AM_ABS_X }, + [0x99] = { "STA", STA, 3, 5, false, true, AM_ABS_Y }, + [0x81] = { "STA", STA, 2, 6, false, true, AM_IND_X }, + [0x91] = { "STA", STA, 2, 6, false, true, AM_IND_Y }, + [0x86] = { "STX", STX, 2, 3, false, true, AM_ZP }, + [0x96] = { "STX", STX, 2, 4, false, true, AM_ZP_Y }, + [0x8E] = { "STX", STX, 3, 4, false, true, AM_ABS }, + [0x84] = { "STY", STY, 2, 3, false, true, AM_ZP }, + [0x94] = { "STY", STY, 2, 4, false, true, AM_ZP_X }, + [0x8C] = { "STY", STY, 3, 4, false, true, AM_ABS }, + [0xAA] = { "TAX", TAX, 1, 2, false, false, AM_NONE }, + [0xA8] = { "TAY", TAY, 1, 2, false, false, AM_NONE }, + [0xBA] = { "TSX", TSX, 1, 2, false, false, AM_NONE }, + [0x8A] = { "TXA", TXA, 1, 2, false, false, AM_NONE }, + [0x9A] = { "TXS", TXS, 1, 2, false, false, AM_NONE }, + [0x98] = { "TYA", TYA, 1, 2, false, false, AM_NONE }, };