diff --git a/cpu.c b/cpu.c index 87d68c8..8eaeff1 100644 --- a/cpu.c +++ b/cpu.c @@ -34,7 +34,6 @@ struct registers { struct registers regs; enum addressing_mode { - AM_ACC, AM_IMM, AM_ZP, AM_ZP_X, @@ -199,7 +198,7 @@ and(uint8_t arg) } static void -asl(uint8_t arg) +asl_acc(void) { uint16_t tmp; @@ -211,6 +210,19 @@ asl(uint8_t arg) STATUS_UPDATE_NEGATIVE(regs.a); } +static void +asl(uint16_t mem) +{ + uint16_t tmp; + + tmp = peek(mem) << 1; + memwrite(mem, tmp & 0xFF); + + regs.status.carry = tmp > 0xFF; + STATUS_UPDATE_ZERO(tmp); + STATUS_UPDATE_NEGATIVE(tmp); +} + static void bcc(uint8_t arg) { @@ -398,7 +410,7 @@ inx(void) } static void -iny(uint8_t arg) +iny(void) { regs.y++; @@ -454,7 +466,7 @@ ldy(uint8_t arg) } static void -lsr(uint8_t arg) +lsr_acc(void) { regs.status.carry = regs.a & 1; // bit 0 in carry regs.a >>= 1; @@ -465,7 +477,24 @@ lsr(uint8_t arg) } static void -nop(uint8_t arg) +lsr(uint16_t mem) +{ + uint8_t tmp; + + tmp = peek(mem); + + regs.status.carry = tmp & 1; // bit 0 in carry + tmp >>= 1; + tmp &= ~(1 << 7); // bit 7 cleared + + memwrite(mem, tmp); + + STATUS_UPDATE_ZERO(tmp); + STATUS_UPDATE_NEGATIVE(tmp); +} + +static void +nop(void) { return; } @@ -525,35 +554,63 @@ plp(void) } static void -rol(uint8_t arg) +rol_acc(void) { - uint8_t tmp; - tmp = (regs.a & (1 << 7)) > 0; + uint8_t carry; + carry = (regs.a & (1 << 7)) > 0; regs.a <<= 1; regs.a |= regs.status.carry; - regs.status.carry = tmp; + regs.status.carry = carry; STATUS_UPDATE_ZERO(regs.a); STATUS_UPDATE_NEGATIVE(regs.a); } static void -ror(uint8_t arg) +rol(uint16_t mem) { - uint8_t tmp; - tmp = regs.a & 1; + uint8_t carry, tmp; + carry = (peek(mem) & (1 << 7)) > 0; + + tmp = (peek(mem) << 1) | regs.status.carry; + memwrite(mem, tmp); + + regs.status.carry = carry; + STATUS_UPDATE_ZERO(tmp); + STATUS_UPDATE_NEGATIVE(tmp); +} + +static void +ror_acc(void) +{ + uint8_t carry; + carry = regs.a & 1; regs.a >>= 1; regs.a |= regs.status.carry << 7; - regs.status.carry = tmp; + regs.status.carry = carry; STATUS_UPDATE_ZERO(regs.a); STATUS_UPDATE_NEGATIVE(regs.a); } static void -rti(uint8_t arg) +ror(uint16_t mem) +{ + uint8_t carry, tmp; + carry = peek(mem) & 1; + + tmp = (peek(mem) >> 1) | (regs.status.carry << 7); + memwrite(mem, tmp); + + regs.status.carry = carry; + STATUS_UPDATE_ZERO(tmp); + STATUS_UPDATE_NEGATIVE(tmp); +} + +static void +rti(void) { plp(); regs.pc = PULL(); @@ -743,7 +800,7 @@ interpret(void) cycles += 5; break; case 0x0a: - asl(opcode_arg(AM_ACC)); + asl_acc(); cycles += 2; break; case 0x06: @@ -954,10 +1011,6 @@ interpret(void) eor(opcode_arg(AM_IND_Y)); cycles += 5; break; - case 0x1a: - inc(opcode_arg(AM_ACC)); - cycles += 2; - break; case 0xe6: inc(opcode_arg(AM_ZP)); cycles += 5; @@ -979,7 +1032,7 @@ interpret(void) cycles += 2; break; case 0xc8: - iny(opcode_arg(AM_ACC)); + iny(); cycles += 2; break; case 0x4c: @@ -1075,7 +1128,7 @@ interpret(void) cycles += 4; break; case 0x4a: - lsr(opcode_arg(AM_ACC)); + lsr_acc(); cycles += 2; break; case 0x46: @@ -1095,7 +1148,7 @@ interpret(void) cycles += 6; break; case 0xea: - nop(opcode_arg(AM_ACC)); + nop(); cycles += 2; break; case 0x09: @@ -1151,7 +1204,7 @@ interpret(void) cycles += 4; break; case 0x2a: - rol(opcode_arg(AM_ACC)); + rol_acc(); cycles += 2; break; case 0x26: @@ -1171,7 +1224,7 @@ interpret(void) cycles += 6; break; case 0x6a: - ror(opcode_arg(AM_ACC)); + ror_acc(); cycles += 2; break; case 0x66: @@ -1191,7 +1244,7 @@ interpret(void) cycles += 6; break; case 0x40: - rti(opcode_arg(AM_ACC)); + rti(); cycles += 6; break; case 0x60: