add preliminary implementation of the unofficial opcodes
This commit is contained in:
parent
c4fc40a036
commit
4ccf9f5cee
91
cpu.c
91
cpu.c
@ -128,8 +128,8 @@ opcode_mem(enum addressing_mode mode)
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break;
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case AM_REL:
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val = arg + regs.pc;
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if ((regs.pc + 1) & 0xFF00 != val & 0xFF00)
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page_crossed = true;
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if (((regs.pc + 1) & 0xFF00) != (val & 0xFF00))
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val -= 0x0100;
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break;
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case AM_IMM:
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case AM_ABS:
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@ -703,133 +703,158 @@ TYA(uint16_t arg)
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void
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AAC(uint16_t arg)
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{
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NOP(0);
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AND(arg);
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regs.status.carry = regs.status.negative;
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}
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void
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AAX(uint16_t arg)
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SAX(uint16_t arg)
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{
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NOP(0);
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uint8_t tmp = regs.x & regs.a;
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memwrite(arg, tmp);
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}
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void
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ARR(uint16_t arg)
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{
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NOP(0);
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uint8_t tmp = arg & regs.a;
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AND(arg);
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ROR_acc(0);
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if ((tmp & (1 << 5)) != 0 && (tmp & (1 << 6)) != 0)
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SEC(0), CLV(0);
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else if ((tmp & (1 << 5)) == 0 && (tmp & (1 << 6)) == 0)
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CLC(0), CLV(0);
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else if ((tmp & (1 << 5)) != 0)
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CLC(0), regs.status.overflow = 1;
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else if ((tmp & (1 << 6)) != 0)
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SEC(0), regs.status.overflow = 1;
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}
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void
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ASR(uint16_t arg)
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{
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NOP(0);
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AND(arg);
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LSR_acc(0);
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}
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void
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ATX(uint16_t arg)
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{
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NOP(0);
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AND(arg);
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TAX(0);
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}
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void
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AXA(uint16_t arg)
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{
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NOP(0);
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uint8_t tmp = regs.x & regs.a & 7;
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memwrite(arg, tmp);
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}
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void
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AXS(uint16_t arg)
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{
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NOP(0);
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regs.x &= regs.a;
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regs.x -= arg;
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regs.status.carry = arg <= regs.x;
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STATUS_UPDATE_NZ(regs.x);
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}
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void
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DCP(uint16_t arg)
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{
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NOP(0);
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}
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uint8_t tmp = peek(arg) - 1;
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memwrite(arg, tmp);
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void
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DOP(uint16_t arg)
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{
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NOP(0);
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regs.status.carry = tmp <= regs.a;
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STATUS_UPDATE_NZ(tmp);
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}
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void
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ISC(uint16_t arg)
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{
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NOP(0);
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INC(arg);
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SBC(peek(arg));
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}
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void
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KIL(uint16_t arg)
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{
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/* TODO: figure out how to stop interpret(), I guess with global bool */
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NOP(0);
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}
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void
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LAR(uint16_t arg)
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{
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NOP(0);
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regs.a = regs.x = regs.sp = regs.a & regs.sp;
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STATUS_UPDATE_NZ(regs.a);
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}
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void
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LAX(uint16_t arg)
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{
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NOP(0);
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LDA(arg);
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LDX(arg);
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}
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void
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RLA(uint16_t arg)
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{
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NOP(0);
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ROL(arg);
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AND(arg);
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}
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void
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RRA(uint16_t arg)
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{
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NOP(0);
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ROR(arg);
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ADC(peek(arg));
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}
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void
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SLO(uint16_t arg)
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{
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NOP(0);
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ASL(arg);
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ORA(arg);
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}
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void
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SRE(uint16_t arg)
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{
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NOP(0);
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LSR(arg);
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EOR(arg);
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}
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void
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SXA(uint16_t arg)
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{
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NOP(0);
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memwrite(arg, regs.x & ((arg & 0xFF00) + 1));
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}
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void
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SYA(uint16_t arg)
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{
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NOP(0);
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}
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void
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TOP(uint16_t arg)
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{
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NOP(0);
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memwrite(arg, regs.x & ((arg & 0xFF00) + 1));
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}
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void
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XAA(uint16_t arg)
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{
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/* TODO: apparently the exact operation is unknown */
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NOP(0);
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}
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void
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XAS(uint16_t arg)
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{
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NOP(0);
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regs.sp = regs.a & regs.x;
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memwrite(arg, regs.sp & ((arg & 0xFF00) + 1));
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}
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static void
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@ -877,8 +902,6 @@ interpret(void)
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printf("$%02X,Y", arg);
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break;
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case AM_REL:
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printf("$%04X", regs.pc + arg);
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break;
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case AM_ABS:
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printf("$%04X", arg);
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break;
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2
cpu.h
2
cpu.h
@ -64,7 +64,7 @@ void TYA(uint16_t arg);
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/* UNOFFICIAL OPCODES */
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void AAC(uint16_t arg);
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void AAX(uint16_t arg);
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void SAX(uint16_t arg);
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void ARR(uint16_t arg);
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void ASR(uint16_t arg);
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void ATX(uint16_t arg);
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106
opcodes.h
106
opcodes.h
@ -189,23 +189,23 @@ struct opcode opcodes[0x100] = {
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/* unofficial opcodes: https://www.nesdev.org/undocumented_opcodes.txt */
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[0x0B] = { "AAC", AAC, 2, 2, false, false, false, true, AM_IMM },
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[0x2B] = { "AAC", AAC, 2, 2, false, false, false, true, AM_IMM },
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[0x87] = { "AAX", AAX, 2, 3, false, false, false, true, AM_ZP },
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[0x97] = { "AAX", AAX, 2, 4, false, false, false, true, AM_ZP_Y },
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[0x83] = { "AAX", AAX, 2, 6, false, false, false, true, AM_IND_X },
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[0x8F] = { "AAX", AAX, 3, 4, false, false, false, true, AM_ABS },
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[0x87] = { "SAX", SAX, 2, 3, false, true, false, true, AM_ZP },
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[0x97] = { "SAX", SAX, 2, 4, false, true, false, true, AM_ZP_Y },
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[0x83] = { "SAX", SAX, 2, 6, false, true, false, true, AM_IND_X },
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[0x8F] = { "SAX", SAX, 3, 4, false, true, false, true, AM_ABS },
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[0x6B] = { "ARR", ARR, 2, 2, false, false, false, true, AM_IMM },
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[0x4B] = { "ASR", ASR, 2, 2, false, false, false, true, AM_IMM },
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[0xAB] = { "ATX", ATX, 2, 2, false, false, false, true, AM_IMM },
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[0x9F] = { "AXA", AXA, 3, 5, false, false, false, true, AM_ABS_Y },
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[0x93] = { "AXA", AXA, 2, 6, false, false, false, true, AM_IND_Y },
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[0x9F] = { "AXA", AXA, 3, 5, false, true, false, true, AM_ABS_Y },
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[0x93] = { "AXA", AXA, 2, 6, false, true, false, true, AM_IND_Y },
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[0xCB] = { "AXS", AXS, 2, 2, false, false, false, true, AM_IMM },
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[0xC7] = { "DCP", DCP, 2, 5, false, false, false, true, AM_ZP },
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[0xD7] = { "DCP", DCP, 2, 6, false, false, false, true, AM_ZP_X },
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[0xCF] = { "DCP", DCP, 3, 6, false, false, false, true, AM_ABS },
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[0xDF] = { "DCP", DCP, 3, 7, false, false, false, true, AM_ABS_X },
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[0xDB] = { "DCP", DCP, 3, 7, false, false, false, true, AM_ABS_Y },
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[0xC3] = { "DCP", DCP, 2, 8, false, false, false, true, AM_IND_X },
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[0xD3] = { "DCP", DCP, 2, 8, false, false, false, true, AM_IND_Y },
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[0xC7] = { "DCP", DCP, 2, 5, false, true, false, true, AM_ZP },
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[0xD7] = { "DCP", DCP, 2, 6, false, true, false, true, AM_ZP_X },
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[0xCF] = { "DCP", DCP, 3, 6, false, true, false, true, AM_ABS },
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[0xDF] = { "DCP", DCP, 3, 7, false, true, false, true, AM_ABS_X },
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[0xDB] = { "DCP", DCP, 3, 7, false, true, false, true, AM_ABS_Y },
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[0xC3] = { "DCP", DCP, 2, 8, false, true, false, true, AM_IND_X },
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[0xD3] = { "DCP", DCP, 2, 8, false, true, false, true, AM_IND_Y },
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[0x04] = { "NOP", NOP, 2, 3, true, false, false, true, AM_ZP },
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[0x14] = { "NOP", NOP, 2, 4, true, false, false, true, AM_ZP_X },
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[0x34] = { "NOP", NOP, 2, 4, true, false, false, true, AM_ZP_X },
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@ -217,9 +217,9 @@ struct opcode opcodes[0x100] = {
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[0x82] = { "NOP", NOP, 2, 2, false, false, false, true, AM_IMM },
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[0x89] = { "NOP", NOP, 2, 2, false, false, false, true, AM_IMM },
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[0xC2] = { "NOP", NOP, 2, 2, false, false, false, true, AM_IMM },
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[0xD4] = { "NOP", NOP, 2, 4, false, false, false, true, AM_ZP_X },
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[0xD4] = { "NOP", NOP, 2, 4, true, false, false, true, AM_ZP_X },
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[0xE2] = { "NOP", NOP, 2, 2, false, false, false, true, AM_IMM },
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[0xF4] = { "NOP", NOP, 2, 4, false, false, false, true, AM_ZP_X },
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[0xF4] = { "NOP", NOP, 2, 4, true, false, false, true, AM_ZP_X },
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[0xE7] = { "ISC", ISC, 2, 5, false, false, false, true, AM_ZP },
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[0xF7] = { "ISC", ISC, 2, 6, false, false, false, true, AM_ZP_X },
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[0xEF] = { "ISC", ISC, 3, 6, false, false, false, true, AM_ABS },
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@ -239,50 +239,50 @@ struct opcode opcodes[0x100] = {
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[0xB2] = { "KIL", KIL, 1, 0, false, false, false, true, AM_NONE },
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[0xD2] = { "KIL", KIL, 1, 0, false, false, false, true, AM_NONE },
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[0xF2] = { "KIL", KIL, 1, 0, false, false, false, true, AM_NONE },
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[0xBB] = { "LAR", LAR, 3, 4, false, false, true, true, AM_ABS_Y },
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[0xA7] = { "LAX", LAX, 2, 3, false, false, false, true, AM_ZP },
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[0xB7] = { "LAX", LAX, 2, 4, false, false, false, true, AM_ZP_Y },
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[0xAF] = { "LAX", LAX, 3, 4, false, false, false, true, AM_ABS },
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[0xBF] = { "LAX", LAX, 3, 4, false, false, true, true, AM_ABS_Y },
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[0xA3] = { "LAX", LAX, 2, 6, false, false, false, true, AM_IND_X },
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[0xB3] = { "LAX", LAX, 2, 5, false, false, true, true, AM_IND_Y },
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[0xBB] = { "LAR", LAR, 3, 4, true, false, true, true, AM_ABS_Y },
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[0xA7] = { "LAX", LAX, 2, 3, true, false, false, true, AM_ZP },
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[0xB7] = { "LAX", LAX, 2, 4, true, false, false, true, AM_ZP_Y },
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[0xAF] = { "LAX", LAX, 3, 4, true, false, false, true, AM_ABS },
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[0xBF] = { "LAX", LAX, 3, 4, true, false, true, true, AM_ABS_Y },
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[0xA3] = { "LAX", LAX, 2, 6, true, false, false, true, AM_IND_X },
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[0xB3] = { "LAX", LAX, 2, 5, true, false, true, true, AM_IND_Y },
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[0x1A] = { "NOP", NOP, 1, 2, false, false, false, true, AM_NONE },
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[0x3A] = { "NOP", NOP, 1, 2, false, false, false, true, AM_NONE },
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[0x5A] = { "NOP", NOP, 1, 2, false, false, false, true, AM_NONE },
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[0x7A] = { "NOP", NOP, 1, 2, false, false, false, true, AM_NONE },
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[0xDA] = { "NOP", NOP, 1, 2, false, false, false, true, AM_NONE },
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[0xFA] = { "NOP", NOP, 1, 2, false, false, false, true, AM_NONE },
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[0x27] = { "RLA", RLA, 2, 5, false, false, false, true, AM_ZP },
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[0x37] = { "RLA", RLA, 2, 6, false, false, false, true, AM_ZP_X },
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[0x2F] = { "RLA", RLA, 3, 6, false, false, false, true, AM_ABS },
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[0x3F] = { "RLA", RLA, 3, 7, false, false, false, true, AM_ABS_X },
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[0x3B] = { "RLA", RLA, 3, 7, false, false, false, true, AM_ABS_Y },
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[0x23] = { "RLA", RLA, 2, 8, false, false, false, true, AM_IND_X },
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[0x33] = { "RLA", RLA, 2, 8, false, false, false, true, AM_IND_Y },
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[0x67] = { "RRA", RRA, 2, 5, false, false, false, true, AM_ZP },
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[0x77] = { "RRA", RRA, 2, 6, false, false, false, true, AM_ZP_X },
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[0x6F] = { "RRA", RRA, 3, 6, false, false, false, true, AM_ABS },
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[0x7F] = { "RRA", RRA, 3, 7, false, false, false, true, AM_ABS_X },
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[0x7B] = { "RRA", RRA, 3, 7, false, false, false, true, AM_ABS_Y },
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[0x63] = { "RRA", RRA, 2, 8, false, false, false, true, AM_IND_X },
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[0x73] = { "RRA", RRA, 2, 8, false, false, false, true, AM_IND_Y },
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[0x27] = { "RLA", RLA, 2, 5, true, true, false, true, AM_ZP },
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[0x37] = { "RLA", RLA, 2, 6, true, true, false, true, AM_ZP_X },
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[0x2F] = { "RLA", RLA, 3, 6, true, true, false, true, AM_ABS },
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[0x3F] = { "RLA", RLA, 3, 7, true, true, false, true, AM_ABS_X },
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[0x3B] = { "RLA", RLA, 3, 7, true, true, false, true, AM_ABS_Y },
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[0x23] = { "RLA", RLA, 2, 8, true, true, false, true, AM_IND_X },
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[0x33] = { "RLA", RLA, 2, 8, true, true, false, true, AM_IND_Y },
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[0x67] = { "RRA", RRA, 2, 5, true, true, false, true, AM_ZP },
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[0x77] = { "RRA", RRA, 2, 6, true, true, false, true, AM_ZP_X },
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[0x6F] = { "RRA", RRA, 3, 6, true, true, false, true, AM_ABS },
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[0x7F] = { "RRA", RRA, 3, 7, true, true, false, true, AM_ABS_X },
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[0x7B] = { "RRA", RRA, 3, 7, true, true, false, true, AM_ABS_Y },
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[0x63] = { "RRA", RRA, 2, 8, true, true, false, true, AM_IND_X },
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[0x73] = { "RRA", RRA, 2, 8, true, true, false, true, AM_IND_Y },
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[0xEB] = { "SBC", SBC, 2, 2, false, false, false, true, AM_IMM },
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[0x07] = { "SLO", SLO, 2, 5, false, false, false, true, AM_ZP },
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[0x17] = { "SLO", SLO, 2, 6, false, false, false, true, AM_ZP_X },
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[0x0F] = { "SLO", SLO, 3, 6, false, false, false, true, AM_ABS },
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[0x1F] = { "SLO", SLO, 3, 7, false, false, false, true, AM_ABS_X },
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[0x1B] = { "SLO", SLO, 3, 7, false, false, false, true, AM_ABS_Y },
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[0x03] = { "SLO", SLO, 2, 8, false, false, false, true, AM_IND_X },
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[0x13] = { "SLO", SLO, 2, 8, false, false, false, true, AM_IND_Y },
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[0x47] = { "SRE", SRE, 2, 5, false, false, false, true, AM_ZP },
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[0x57] = { "SRE", SRE, 2, 6, false, false, false, true, AM_ZP_X },
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[0x4F] = { "SRE", SRE, 3, 6, false, false, false, true, AM_ABS },
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[0x5F] = { "SRE", SRE, 3, 7, false, false, false, true, AM_ABS_X },
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[0x5B] = { "SRE", SRE, 3, 7, false, false, false, true, AM_ABS_Y },
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[0x43] = { "SRE", SRE, 2, 8, false, false, false, true, AM_IND_X },
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[0x53] = { "SRE", SRE, 2, 8, false, false, false, true, AM_IND_Y },
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[0x9E] = { "SXA", SXA, 3, 5, false, false, false, true, AM_ABS_Y },
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[0x9C] = { "SYA", SYA, 3, 5, false, false, false, true, AM_ABS_X },
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[0x07] = { "SLO", SLO, 2, 5, true, true, false, true, AM_ZP },
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[0x17] = { "SLO", SLO, 2, 6, true, true, false, true, AM_ZP_X },
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[0x0F] = { "SLO", SLO, 3, 6, true, true, false, true, AM_ABS },
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[0x1F] = { "SLO", SLO, 3, 7, true, true, false, true, AM_ABS_X },
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[0x1B] = { "SLO", SLO, 3, 7, true, true, false, true, AM_ABS_Y },
|
||||
[0x03] = { "SLO", SLO, 2, 8, true, true, false, true, AM_IND_X },
|
||||
[0x13] = { "SLO", SLO, 2, 8, true, true, false, true, AM_IND_Y },
|
||||
[0x47] = { "SRE", SRE, 2, 5, true, true, false, true, AM_ZP },
|
||||
[0x57] = { "SRE", SRE, 2, 6, true, true, false, true, AM_ZP_X },
|
||||
[0x4F] = { "SRE", SRE, 3, 6, true, true, false, true, AM_ABS },
|
||||
[0x5F] = { "SRE", SRE, 3, 7, true, true, false, true, AM_ABS_X },
|
||||
[0x5B] = { "SRE", SRE, 3, 7, true, true, false, true, AM_ABS_Y },
|
||||
[0x43] = { "SRE", SRE, 2, 8, true, true, false, true, AM_IND_X },
|
||||
[0x53] = { "SRE", SRE, 2, 8, true, true, false, true, AM_IND_Y },
|
||||
[0x9E] = { "SXA", SXA, 3, 5, false, true, false, true, AM_ABS_Y },
|
||||
[0x9C] = { "SYA", SYA, 3, 5, false, true, false, true, AM_ABS_X },
|
||||
[0x0C] = { "NOP", NOP, 3, 4, true, false, false, true, AM_ABS },
|
||||
[0x1C] = { "NOP", NOP, 3, 4, true, false, true, true, AM_ABS_X },
|
||||
[0x3C] = { "NOP", NOP, 3, 4, true, false, true, true, AM_ABS_X },
|
||||
@ -291,5 +291,5 @@ struct opcode opcodes[0x100] = {
|
||||
[0xDC] = { "NOP", NOP, 3, 4, true, false, true, true, AM_ABS_X },
|
||||
[0xFC] = { "NOP", NOP, 3, 4, true, false, true, true, AM_ABS_X },
|
||||
[0x8B] = { "XAA", XAA, 2, 2, false, false, false, true, AM_IMM },
|
||||
[0x9B] = { "XAS", XAS, 3, 5, false, false, false, true, AM_ABS_Y },
|
||||
[0x9B] = { "XAS", XAS, 3, 5, false, true, false, true, AM_ABS_Y },
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user