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add preliminary implementation of the unofficial opcodes

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This commit is contained in:
Vineet K 2024-07-04 14:17:40 -04:00
parent c4fc40a036
commit 4ccf9f5cee
3 changed files with 111 additions and 88 deletions
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91
cpu.c
View File

@ -128,8 +128,8 @@ opcode_mem(enum addressing_mode mode)
break; break;
case AM_REL: case AM_REL:
val = arg + regs.pc; val = arg + regs.pc;
if ((regs.pc + 1) & 0xFF00 != val & 0xFF00) if (((regs.pc + 1) & 0xFF00) != (val & 0xFF00))
page_crossed = true; val -= 0x0100;
break; break;
case AM_IMM: case AM_IMM:
case AM_ABS: case AM_ABS:
@ -703,133 +703,158 @@ TYA(uint16_t arg)
void void
AAC(uint16_t arg) AAC(uint16_t arg)
{ {
NOP(0); AND(arg);
regs.status.carry = regs.status.negative;
} }
void void
AAX(uint16_t arg) SAX(uint16_t arg)
{ {
NOP(0); uint8_t tmp = regs.x & regs.a;
memwrite(arg, tmp);
} }
void void
ARR(uint16_t arg) ARR(uint16_t arg)
{ {
NOP(0); uint8_t tmp = arg & regs.a;
AND(arg);
ROR_acc(0);
if ((tmp & (1 << 5)) != 0 && (tmp & (1 << 6)) != 0)
SEC(0), CLV(0);
else if ((tmp & (1 << 5)) == 0 && (tmp & (1 << 6)) == 0)
CLC(0), CLV(0);
else if ((tmp & (1 << 5)) != 0)
CLC(0), regs.status.overflow = 1;
else if ((tmp & (1 << 6)) != 0)
SEC(0), regs.status.overflow = 1;
} }
void void
ASR(uint16_t arg) ASR(uint16_t arg)
{ {
NOP(0); AND(arg);
LSR_acc(0);
} }
void void
ATX(uint16_t arg) ATX(uint16_t arg)
{ {
NOP(0); AND(arg);
TAX(0);
} }
void void
AXA(uint16_t arg) AXA(uint16_t arg)
{ {
NOP(0); uint8_t tmp = regs.x & regs.a & 7;
memwrite(arg, tmp);
} }
void void
AXS(uint16_t arg) AXS(uint16_t arg)
{ {
NOP(0); regs.x &= regs.a;
regs.x -= arg;
regs.status.carry = arg <= regs.x;
STATUS_UPDATE_NZ(regs.x);
} }
void void
DCP(uint16_t arg) DCP(uint16_t arg)
{ {
NOP(0); uint8_t tmp = peek(arg) - 1;
} memwrite(arg, tmp);
void regs.status.carry = tmp <= regs.a;
DOP(uint16_t arg) STATUS_UPDATE_NZ(tmp);
{
NOP(0);
} }
void void
ISC(uint16_t arg) ISC(uint16_t arg)
{ {
NOP(0); INC(arg);
SBC(peek(arg));
} }
void void
KIL(uint16_t arg) KIL(uint16_t arg)
{ {
/* TODO: figure out how to stop interpret(), I guess with global bool */
NOP(0); NOP(0);
} }
void void
LAR(uint16_t arg) LAR(uint16_t arg)
{ {
NOP(0); regs.a = regs.x = regs.sp = regs.a & regs.sp;
STATUS_UPDATE_NZ(regs.a);
} }
void void
LAX(uint16_t arg) LAX(uint16_t arg)
{ {
NOP(0); LDA(arg);
LDX(arg);
} }
void void
RLA(uint16_t arg) RLA(uint16_t arg)
{ {
NOP(0); ROL(arg);
AND(arg);
} }
void void
RRA(uint16_t arg) RRA(uint16_t arg)
{ {
NOP(0); ROR(arg);
ADC(peek(arg));
} }
void void
SLO(uint16_t arg) SLO(uint16_t arg)
{ {
NOP(0); ASL(arg);
ORA(arg);
} }
void void
SRE(uint16_t arg) SRE(uint16_t arg)
{ {
NOP(0); LSR(arg);
EOR(arg);
} }
void void
SXA(uint16_t arg) SXA(uint16_t arg)
{ {
NOP(0); memwrite(arg, regs.x & ((arg & 0xFF00) + 1));
} }
void void
SYA(uint16_t arg) SYA(uint16_t arg)
{ {
NOP(0); memwrite(arg, regs.x & ((arg & 0xFF00) + 1));
}
void
TOP(uint16_t arg)
{
NOP(0);
} }
void void
XAA(uint16_t arg) XAA(uint16_t arg)
{ {
/* TODO: apparently the exact operation is unknown */
NOP(0); NOP(0);
} }
void void
XAS(uint16_t arg) XAS(uint16_t arg)
{ {
NOP(0); regs.sp = regs.a & regs.x;
memwrite(arg, regs.sp & ((arg & 0xFF00) + 1));
} }
static void static void
@ -877,8 +902,6 @@ interpret(void)
printf("$%02X,Y", arg); printf("$%02X,Y", arg);
break; break;
case AM_REL: case AM_REL:
printf("$%04X", regs.pc + arg);
break;
case AM_ABS: case AM_ABS:
printf("$%04X", arg); printf("$%04X", arg);
break; break;

2
cpu.h
View File

@ -64,7 +64,7 @@ void TYA(uint16_t arg);
/* UNOFFICIAL OPCODES */ /* UNOFFICIAL OPCODES */
void AAC(uint16_t arg); void AAC(uint16_t arg);
void AAX(uint16_t arg); void SAX(uint16_t arg);
void ARR(uint16_t arg); void ARR(uint16_t arg);
void ASR(uint16_t arg); void ASR(uint16_t arg);
void ATX(uint16_t arg); void ATX(uint16_t arg);

106
opcodes.h
View File

@ -189,23 +189,23 @@ struct opcode opcodes[0x100] = {
/* unofficial opcodes: https://www.nesdev.org/undocumented_opcodes.txt */ /* unofficial opcodes: https://www.nesdev.org/undocumented_opcodes.txt */
[0x0B] = { "AAC", AAC, 2, 2, false, false, false, true, AM_IMM }, [0x0B] = { "AAC", AAC, 2, 2, false, false, false, true, AM_IMM },
[0x2B] = { "AAC", AAC, 2, 2, false, false, false, true, AM_IMM }, [0x2B] = { "AAC", AAC, 2, 2, false, false, false, true, AM_IMM },
[0x87] = { "AAX", AAX, 2, 3, false, false, false, true, AM_ZP }, [0x87] = { "SAX", SAX, 2, 3, false, true, false, true, AM_ZP },
[0x97] = { "AAX", AAX, 2, 4, false, false, false, true, AM_ZP_Y }, [0x97] = { "SAX", SAX, 2, 4, false, true, false, true, AM_ZP_Y },
[0x83] = { "AAX", AAX, 2, 6, false, false, false, true, AM_IND_X }, [0x83] = { "SAX", SAX, 2, 6, false, true, false, true, AM_IND_X },
[0x8F] = { "AAX", AAX, 3, 4, false, false, false, true, AM_ABS }, [0x8F] = { "SAX", SAX, 3, 4, false, true, false, true, AM_ABS },
[0x6B] = { "ARR", ARR, 2, 2, false, false, false, true, AM_IMM }, [0x6B] = { "ARR", ARR, 2, 2, false, false, false, true, AM_IMM },
[0x4B] = { "ASR", ASR, 2, 2, false, false, false, true, AM_IMM }, [0x4B] = { "ASR", ASR, 2, 2, false, false, false, true, AM_IMM },
[0xAB] = { "ATX", ATX, 2, 2, false, false, false, true, AM_IMM }, [0xAB] = { "ATX", ATX, 2, 2, false, false, false, true, AM_IMM },
[0x9F] = { "AXA", AXA, 3, 5, false, false, false, true, AM_ABS_Y }, [0x9F] = { "AXA", AXA, 3, 5, false, true, false, true, AM_ABS_Y },
[0x93] = { "AXA", AXA, 2, 6, false, false, false, true, AM_IND_Y }, [0x93] = { "AXA", AXA, 2, 6, false, true, false, true, AM_IND_Y },
[0xCB] = { "AXS", AXS, 2, 2, false, false, false, true, AM_IMM }, [0xCB] = { "AXS", AXS, 2, 2, false, false, false, true, AM_IMM },
[0xC7] = { "DCP", DCP, 2, 5, false, false, false, true, AM_ZP }, [0xC7] = { "DCP", DCP, 2, 5, false, true, false, true, AM_ZP },
[0xD7] = { "DCP", DCP, 2, 6, false, false, false, true, AM_ZP_X }, [0xD7] = { "DCP", DCP, 2, 6, false, true, false, true, AM_ZP_X },
[0xCF] = { "DCP", DCP, 3, 6, false, false, false, true, AM_ABS }, [0xCF] = { "DCP", DCP, 3, 6, false, true, false, true, AM_ABS },
[0xDF] = { "DCP", DCP, 3, 7, false, false, false, true, AM_ABS_X }, [0xDF] = { "DCP", DCP, 3, 7, false, true, false, true, AM_ABS_X },
[0xDB] = { "DCP", DCP, 3, 7, false, false, false, true, AM_ABS_Y }, [0xDB] = { "DCP", DCP, 3, 7, false, true, false, true, AM_ABS_Y },
[0xC3] = { "DCP", DCP, 2, 8, false, false, false, true, AM_IND_X }, [0xC3] = { "DCP", DCP, 2, 8, false, true, false, true, AM_IND_X },
[0xD3] = { "DCP", DCP, 2, 8, false, false, false, true, AM_IND_Y }, [0xD3] = { "DCP", DCP, 2, 8, false, true, false, true, AM_IND_Y },
[0x04] = { "NOP", NOP, 2, 3, true, false, false, true, AM_ZP }, [0x04] = { "NOP", NOP, 2, 3, true, false, false, true, AM_ZP },
[0x14] = { "NOP", NOP, 2, 4, true, false, false, true, AM_ZP_X }, [0x14] = { "NOP", NOP, 2, 4, true, false, false, true, AM_ZP_X },
[0x34] = { "NOP", NOP, 2, 4, true, false, false, true, AM_ZP_X }, [0x34] = { "NOP", NOP, 2, 4, true, false, false, true, AM_ZP_X },
@ -217,9 +217,9 @@ struct opcode opcodes[0x100] = {
[0x82] = { "NOP", NOP, 2, 2, false, false, false, true, AM_IMM }, [0x82] = { "NOP", NOP, 2, 2, false, false, false, true, AM_IMM },
[0x89] = { "NOP", NOP, 2, 2, false, false, false, true, AM_IMM }, [0x89] = { "NOP", NOP, 2, 2, false, false, false, true, AM_IMM },
[0xC2] = { "NOP", NOP, 2, 2, false, false, false, true, AM_IMM }, [0xC2] = { "NOP", NOP, 2, 2, false, false, false, true, AM_IMM },
[0xD4] = { "NOP", NOP, 2, 4, false, false, false, true, AM_ZP_X }, [0xD4] = { "NOP", NOP, 2, 4, true, false, false, true, AM_ZP_X },
[0xE2] = { "NOP", NOP, 2, 2, false, false, false, true, AM_IMM }, [0xE2] = { "NOP", NOP, 2, 2, false, false, false, true, AM_IMM },
[0xF4] = { "NOP", NOP, 2, 4, false, false, false, true, AM_ZP_X }, [0xF4] = { "NOP", NOP, 2, 4, true, false, false, true, AM_ZP_X },
[0xE7] = { "ISC", ISC, 2, 5, false, false, false, true, AM_ZP }, [0xE7] = { "ISC", ISC, 2, 5, false, false, false, true, AM_ZP },
[0xF7] = { "ISC", ISC, 2, 6, false, false, false, true, AM_ZP_X }, [0xF7] = { "ISC", ISC, 2, 6, false, false, false, true, AM_ZP_X },
[0xEF] = { "ISC", ISC, 3, 6, false, false, false, true, AM_ABS }, [0xEF] = { "ISC", ISC, 3, 6, false, false, false, true, AM_ABS },
@ -239,50 +239,50 @@ struct opcode opcodes[0x100] = {
[0xB2] = { "KIL", KIL, 1, 0, false, false, false, true, AM_NONE }, [0xB2] = { "KIL", KIL, 1, 0, false, false, false, true, AM_NONE },
[0xD2] = { "KIL", KIL, 1, 0, false, false, false, true, AM_NONE }, [0xD2] = { "KIL", KIL, 1, 0, false, false, false, true, AM_NONE },
[0xF2] = { "KIL", KIL, 1, 0, false, false, false, true, AM_NONE }, [0xF2] = { "KIL", KIL, 1, 0, false, false, false, true, AM_NONE },
[0xBB] = { "LAR", LAR, 3, 4, false, false, true, true, AM_ABS_Y }, [0xBB] = { "LAR", LAR, 3, 4, true, false, true, true, AM_ABS_Y },
[0xA7] = { "LAX", LAX, 2, 3, false, false, false, true, AM_ZP }, [0xA7] = { "LAX", LAX, 2, 3, true, false, false, true, AM_ZP },
[0xB7] = { "LAX", LAX, 2, 4, false, false, false, true, AM_ZP_Y }, [0xB7] = { "LAX", LAX, 2, 4, true, false, false, true, AM_ZP_Y },
[0xAF] = { "LAX", LAX, 3, 4, false, false, false, true, AM_ABS }, [0xAF] = { "LAX", LAX, 3, 4, true, false, false, true, AM_ABS },
[0xBF] = { "LAX", LAX, 3, 4, false, false, true, true, AM_ABS_Y }, [0xBF] = { "LAX", LAX, 3, 4, true, false, true, true, AM_ABS_Y },
[0xA3] = { "LAX", LAX, 2, 6, false, false, false, true, AM_IND_X }, [0xA3] = { "LAX", LAX, 2, 6, true, false, false, true, AM_IND_X },
[0xB3] = { "LAX", LAX, 2, 5, false, false, true, true, AM_IND_Y }, [0xB3] = { "LAX", LAX, 2, 5, true, false, true, true, AM_IND_Y },
[0x1A] = { "NOP", NOP, 1, 2, false, false, false, true, AM_NONE }, [0x1A] = { "NOP", NOP, 1, 2, false, false, false, true, AM_NONE },
[0x3A] = { "NOP", NOP, 1, 2, false, false, false, true, AM_NONE }, [0x3A] = { "NOP", NOP, 1, 2, false, false, false, true, AM_NONE },
[0x5A] = { "NOP", NOP, 1, 2, false, false, false, true, AM_NONE }, [0x5A] = { "NOP", NOP, 1, 2, false, false, false, true, AM_NONE },
[0x7A] = { "NOP", NOP, 1, 2, false, false, false, true, AM_NONE }, [0x7A] = { "NOP", NOP, 1, 2, false, false, false, true, AM_NONE },
[0xDA] = { "NOP", NOP, 1, 2, false, false, false, true, AM_NONE }, [0xDA] = { "NOP", NOP, 1, 2, false, false, false, true, AM_NONE },
[0xFA] = { "NOP", NOP, 1, 2, false, false, false, true, AM_NONE }, [0xFA] = { "NOP", NOP, 1, 2, false, false, false, true, AM_NONE },
[0x27] = { "RLA", RLA, 2, 5, false, false, false, true, AM_ZP }, [0x27] = { "RLA", RLA, 2, 5, true, true, false, true, AM_ZP },
[0x37] = { "RLA", RLA, 2, 6, false, false, false, true, AM_ZP_X }, [0x37] = { "RLA", RLA, 2, 6, true, true, false, true, AM_ZP_X },
[0x2F] = { "RLA", RLA, 3, 6, false, false, false, true, AM_ABS }, [0x2F] = { "RLA", RLA, 3, 6, true, true, false, true, AM_ABS },
[0x3F] = { "RLA", RLA, 3, 7, false, false, false, true, AM_ABS_X }, [0x3F] = { "RLA", RLA, 3, 7, true, true, false, true, AM_ABS_X },
[0x3B] = { "RLA", RLA, 3, 7, false, false, false, true, AM_ABS_Y }, [0x3B] = { "RLA", RLA, 3, 7, true, true, false, true, AM_ABS_Y },
[0x23] = { "RLA", RLA, 2, 8, false, false, false, true, AM_IND_X }, [0x23] = { "RLA", RLA, 2, 8, true, true, false, true, AM_IND_X },
[0x33] = { "RLA", RLA, 2, 8, false, false, false, true, AM_IND_Y }, [0x33] = { "RLA", RLA, 2, 8, true, true, false, true, AM_IND_Y },
[0x67] = { "RRA", RRA, 2, 5, false, false, false, true, AM_ZP }, [0x67] = { "RRA", RRA, 2, 5, true, true, false, true, AM_ZP },
[0x77] = { "RRA", RRA, 2, 6, false, false, false, true, AM_ZP_X }, [0x77] = { "RRA", RRA, 2, 6, true, true, false, true, AM_ZP_X },
[0x6F] = { "RRA", RRA, 3, 6, false, false, false, true, AM_ABS }, [0x6F] = { "RRA", RRA, 3, 6, true, true, false, true, AM_ABS },
[0x7F] = { "RRA", RRA, 3, 7, false, false, false, true, AM_ABS_X }, [0x7F] = { "RRA", RRA, 3, 7, true, true, false, true, AM_ABS_X },
[0x7B] = { "RRA", RRA, 3, 7, false, false, false, true, AM_ABS_Y }, [0x7B] = { "RRA", RRA, 3, 7, true, true, false, true, AM_ABS_Y },
[0x63] = { "RRA", RRA, 2, 8, false, false, false, true, AM_IND_X }, [0x63] = { "RRA", RRA, 2, 8, true, true, false, true, AM_IND_X },
[0x73] = { "RRA", RRA, 2, 8, false, false, false, true, AM_IND_Y }, [0x73] = { "RRA", RRA, 2, 8, true, true, false, true, AM_IND_Y },
[0xEB] = { "SBC", SBC, 2, 2, false, false, false, true, AM_IMM }, [0xEB] = { "SBC", SBC, 2, 2, false, false, false, true, AM_IMM },
[0x07] = { "SLO", SLO, 2, 5, false, false, false, true, AM_ZP }, [0x07] = { "SLO", SLO, 2, 5, true, true, false, true, AM_ZP },
[0x17] = { "SLO", SLO, 2, 6, false, false, false, true, AM_ZP_X }, [0x17] = { "SLO", SLO, 2, 6, true, true, false, true, AM_ZP_X },
[0x0F] = { "SLO", SLO, 3, 6, false, false, false, true, AM_ABS }, [0x0F] = { "SLO", SLO, 3, 6, true, true, false, true, AM_ABS },
[0x1F] = { "SLO", SLO, 3, 7, false, false, false, true, AM_ABS_X }, [0x1F] = { "SLO", SLO, 3, 7, true, true, false, true, AM_ABS_X },
[0x1B] = { "SLO", SLO, 3, 7, false, false, false, true, AM_ABS_Y }, [0x1B] = { "SLO", SLO, 3, 7, true, true, false, true, AM_ABS_Y },
[0x03] = { "SLO", SLO, 2, 8, false, false, false, true, AM_IND_X }, [0x03] = { "SLO", SLO, 2, 8, true, true, false, true, AM_IND_X },
[0x13] = { "SLO", SLO, 2, 8, false, false, false, true, AM_IND_Y }, [0x13] = { "SLO", SLO, 2, 8, true, true, false, true, AM_IND_Y },
[0x47] = { "SRE", SRE, 2, 5, false, false, false, true, AM_ZP }, [0x47] = { "SRE", SRE, 2, 5, true, true, false, true, AM_ZP },
[0x57] = { "SRE", SRE, 2, 6, false, false, false, true, AM_ZP_X }, [0x57] = { "SRE", SRE, 2, 6, true, true, false, true, AM_ZP_X },
[0x4F] = { "SRE", SRE, 3, 6, false, false, false, true, AM_ABS }, [0x4F] = { "SRE", SRE, 3, 6, true, true, false, true, AM_ABS },
[0x5F] = { "SRE", SRE, 3, 7, false, false, false, true, AM_ABS_X }, [0x5F] = { "SRE", SRE, 3, 7, true, true, false, true, AM_ABS_X },
[0x5B] = { "SRE", SRE, 3, 7, false, false, false, true, AM_ABS_Y }, [0x5B] = { "SRE", SRE, 3, 7, true, true, false, true, AM_ABS_Y },
[0x43] = { "SRE", SRE, 2, 8, false, false, false, true, AM_IND_X }, [0x43] = { "SRE", SRE, 2, 8, true, true, false, true, AM_IND_X },
[0x53] = { "SRE", SRE, 2, 8, false, false, false, true, AM_IND_Y }, [0x53] = { "SRE", SRE, 2, 8, true, true, false, true, AM_IND_Y },
[0x9E] = { "SXA", SXA, 3, 5, false, false, false, true, AM_ABS_Y }, [0x9E] = { "SXA", SXA, 3, 5, false, true, false, true, AM_ABS_Y },
[0x9C] = { "SYA", SYA, 3, 5, false, false, false, true, AM_ABS_X }, [0x9C] = { "SYA", SYA, 3, 5, false, true, false, true, AM_ABS_X },
[0x0C] = { "NOP", NOP, 3, 4, true, false, false, true, AM_ABS }, [0x0C] = { "NOP", NOP, 3, 4, true, false, false, true, AM_ABS },
[0x1C] = { "NOP", NOP, 3, 4, true, false, true, true, AM_ABS_X }, [0x1C] = { "NOP", NOP, 3, 4, true, false, true, true, AM_ABS_X },
[0x3C] = { "NOP", NOP, 3, 4, true, false, true, true, AM_ABS_X }, [0x3C] = { "NOP", NOP, 3, 4, true, false, true, true, AM_ABS_X },
@ -291,5 +291,5 @@ struct opcode opcodes[0x100] = {
[0xDC] = { "NOP", NOP, 3, 4, true, false, true, true, AM_ABS_X }, [0xDC] = { "NOP", NOP, 3, 4, true, false, true, true, AM_ABS_X },
[0xFC] = { "NOP", NOP, 3, 4, true, false, true, true, AM_ABS_X }, [0xFC] = { "NOP", NOP, 3, 4, true, false, true, true, AM_ABS_X },
[0x8B] = { "XAA", XAA, 2, 2, false, false, false, true, AM_IMM }, [0x8B] = { "XAA", XAA, 2, 2, false, false, false, true, AM_IMM },
[0x9B] = { "XAS", XAS, 3, 5, false, false, false, true, AM_ABS_Y }, [0x9B] = { "XAS", XAS, 3, 5, false, true, false, true, AM_ABS_Y },
}; };