diff --git a/cpu.c b/cpu.c
index bba0ed5..31f4be2 100644
--- a/cpu.c
+++ b/cpu.c
@@ -622,21 +622,18 @@ SEI(uint16_t arg)
 void
 STA(uint16_t mem)
 {
-	uint8_t tmp = peek(mem);
 	memwrite(mem, regs.a);
 }
 
 void
 STX(uint16_t mem)
 {
-	uint8_t tmp = peek(mem);
 	memwrite(mem, regs.x);
 }
 
 void
 STY(uint16_t mem)
 {
-	uint8_t tmp = peek(mem);
 	memwrite(mem, regs.y);
 }
 
@@ -728,13 +725,19 @@ interpret(void)
 			printf("$%04X", arg);
 			break;
 		case AM_ABS_X:
-			printf("$%04X,X @ %04X", arg - regs.x, arg);
+			printf("$%04X,X @ %04X", (uint16_t)(arg - regs.x), arg);
 			break;
 		case AM_ABS_Y:
-			printf("$%04X,Y @ %04X", arg - regs.y, arg);
+			printf("$%04X,Y @ %04X", (uint16_t)(arg - regs.y), arg);
 			break;
 		case AM_IND:
-			printf("($%04X) = %04X\t\t", arg, peek16(arg));
+			printf("($%04X) = %04X", arg, peek16(arg));
+			break;
+		case AM_IND_X:
+			printf("($%02X,X) @ %02X = %04X", peek(regs.pc - 1), peek(regs.pc - 1) + regs.x, arg);
+			break;
+		case AM_IND_Y:
+			printf("($%02X),Y = %04X @ %04X", peek(regs.pc - 1), (uint16_t)(arg - regs.y), arg);
 			break;
 		case AM_ACC:
 		case AM_NONE:
@@ -748,9 +751,10 @@ interpret(void)
 		if (opcodes[op].memread || opcodes[op].memwrite)
 			printf(" = %02X", peek(arg));
 
-		if (mode != AM_ABS_X && mode != AM_ABS_Y)
+		if (mode != AM_IND && mode != AM_ABS_X && mode != AM_ABS_Y)
 			putchar('\t');
-		printf("\t\t");
+		if (mode != AM_IND_X && mode != AM_IND_Y)
+			printf("\t\t");
 
 		printf("A:%02X X:%02X Y:%02X P:%02X SP:%02X CYC:%d\n",
 		    regs.a, regs.x, regs.y, STATUS_TO_INT(), regs.sp, cycles);
diff --git a/opcodes.h b/opcodes.h
index 02b30e7..4c34bb4 100644
--- a/opcodes.h
+++ b/opcodes.h
@@ -34,21 +34,21 @@ struct opcode {
 struct opcode opcodes[0x100] = {
 	/* official opcodes */
 	[0x69] = { "ADC", ADC, 2, 2, false, false, AM_IMM },
-	[0x65] = { "ADC", ADC, 2, 3, false, false, AM_ZP },
-	[0x75] = { "ADC", ADC, 2, 4, false, false, AM_ZP_X },
-	[0x6D] = { "ADC", ADC, 3, 4, false, false, AM_ABS },
-	[0x7D] = { "ADC", ADC, 3, 4, false, false, AM_ABS_X },
-	[0x79] = { "ADC", ADC, 3, 4, false, false, AM_ABS_Y },
-	[0x61] = { "ADC", ADC, 2, 6, false, false, AM_IND_X },
-	[0x71] = { "ADC", ADC, 2, 5, false, false, AM_IND_Y },
+	[0x65] = { "ADC", ADC, 2, 3, true,  false, AM_ZP },
+	[0x75] = { "ADC", ADC, 2, 4, true,  false, AM_ZP_X },
+	[0x6D] = { "ADC", ADC, 3, 4, true,  false, AM_ABS },
+	[0x7D] = { "ADC", ADC, 3, 4, true,  false, AM_ABS_X },
+	[0x79] = { "ADC", ADC, 3, 4, true,  false, AM_ABS_Y },
+	[0x61] = { "ADC", ADC, 2, 6, true,  false, AM_IND_X },
+	[0x71] = { "ADC", ADC, 2, 5, true,  false, AM_IND_Y },
 	[0x29] = { "AND", AND, 2, 2, false, false, AM_IMM },
-	[0x25] = { "AND", AND, 2, 3, false, false, AM_ZP },
-	[0x35] = { "AND", AND, 2, 4, false, false, AM_ZP_X },
-	[0x2D] = { "AND", AND, 3, 4, false, false, AM_ABS },
-	[0x3D] = { "AND", AND, 3, 4, false, false, AM_ABS_X },
-	[0x39] = { "AND", AND, 3, 4, false, false, AM_ABS_Y },
-	[0x21] = { "AND", AND, 2, 6, false, false, AM_IND_X },
-	[0x31] = { "AND", AND, 2, 5, false, false, AM_IND_Y },
+	[0x25] = { "AND", AND, 2, 3, true,  false, AM_ZP },
+	[0x35] = { "AND", AND, 2, 4, true,  false, AM_ZP_X },
+	[0x2D] = { "AND", AND, 3, 4, true,  false, AM_ABS },
+	[0x3D] = { "AND", AND, 3, 4, true,  false, AM_ABS_X },
+	[0x39] = { "AND", AND, 3, 4, true,  false, AM_ABS_Y },
+	[0x21] = { "AND", AND, 2, 6, true,  false, AM_IND_X },
+	[0x31] = { "AND", AND, 2, 5, true,  false, AM_IND_Y },
 	[0x0A] = { "ASL", ASL_acc, 1, 2, false, false, AM_ACC },
 	[0x06] = { "ASL", ASL, 2, 5, false, true, AM_ZP },
 	[0x16] = { "ASL", ASL, 2, 6, false, true, AM_ZP_X },
@@ -70,19 +70,19 @@ struct opcode opcodes[0x100] = {
 	[0x58] = { "CLI", CLI, 1, 2, false, false, AM_NONE },
 	[0xB8] = { "CLV", CLV, 1, 2, false, false, AM_NONE },
 	[0xC9] = { "CMP", CMP, 2, 2, false, false, AM_IMM },
-	[0xC5] = { "CMP", CMP, 2, 3, false, false, AM_ZP },
-	[0xD5] = { "CMP", CMP, 2, 4, false, false, AM_ZP_X },
-	[0xCD] = { "CMP", CMP, 3, 4, false, false, AM_ABS },
-	[0xDD] = { "CMP", CMP, 3, 4, false, false, AM_ABS_X },
-	[0xD9] = { "CMP", CMP, 3, 4, false, false, AM_ABS_Y },
-	[0xC1] = { "CMP", CMP, 2, 6, false, false, AM_IND_X },
-	[0xD1] = { "CMP", CMP, 2, 5, false, false, AM_IND_Y },
+	[0xC5] = { "CMP", CMP, 2, 3, true,  false, AM_ZP },
+	[0xD5] = { "CMP", CMP, 2, 4, true,  false, AM_ZP_X },
+	[0xCD] = { "CMP", CMP, 3, 4, true,  false, AM_ABS },
+	[0xDD] = { "CMP", CMP, 3, 4, true,  false, AM_ABS_X },
+	[0xD9] = { "CMP", CMP, 3, 4, true,  false, AM_ABS_Y },
+	[0xC1] = { "CMP", CMP, 2, 6, true,  false, AM_IND_X },
+	[0xD1] = { "CMP", CMP, 2, 5, true,  false, AM_IND_Y },
 	[0xE0] = { "CPX", CPX, 2, 2, false, false, AM_IMM },
-	[0xE4] = { "CPX", CPX, 2, 3, false, false, AM_ZP },
-	[0xEC] = { "CPX", CPX, 3, 4, false, false, AM_ABS },
+	[0xE4] = { "CPX", CPX, 2, 3, true,  false, AM_ZP },
+	[0xEC] = { "CPX", CPX, 3, 4, true,  false, AM_ABS },
 	[0xC0] = { "CPY", CPY, 2, 2, false, false, AM_IMM },
-	[0xC4] = { "CPY", CPY, 2, 3, false, false, AM_ZP },
-	[0xCC] = { "CPY", CPY, 3, 4, false, false, AM_ABS },
+	[0xC4] = { "CPY", CPY, 2, 3, true,  false, AM_ZP },
+	[0xCC] = { "CPY", CPY, 3, 4, true,  false, AM_ABS },
 	[0xC6] = { "DEC", DEC, 2, 5, false, true, AM_ZP },
 	[0xD6] = { "DEC", DEC, 2, 6, false, true, AM_ZP_X },
 	[0xCE] = { "DEC", DEC, 3, 6, false, true, AM_ABS },
@@ -90,13 +90,13 @@ struct opcode opcodes[0x100] = {
 	[0xCA] = { "DEX", DEX, 1, 2, false, false, AM_NONE },
 	[0x88] = { "DEY", DEY, 1, 2, false, false, AM_NONE },
 	[0x49] = { "EOR", EOR, 2, 2, false, false, AM_IMM },
-	[0x45] = { "EOR", EOR, 2, 3, false, false, AM_ZP },
-	[0x55] = { "EOR", EOR, 2, 4, false, false, AM_ZP_X },
-	[0x4D] = { "EOR", EOR, 3, 4, false, false, AM_ABS },
-	[0x5D] = { "EOR", EOR, 3, 4, false, false, AM_ABS_X },
-	[0x59] = { "EOR", EOR, 3, 4, false, false, AM_ABS_Y },
-	[0x41] = { "EOR", EOR, 2, 6, false, false, AM_IND_X },
-	[0x51] = { "EOR", EOR, 2, 5, false, false, AM_IND_Y },
+	[0x45] = { "EOR", EOR, 2, 3, true,  false, AM_ZP },
+	[0x55] = { "EOR", EOR, 2, 4, true,  false, AM_ZP_X },
+	[0x4D] = { "EOR", EOR, 3, 4, true,  false, AM_ABS },
+	[0x5D] = { "EOR", EOR, 3, 4, true,  false, AM_ABS_X },
+	[0x59] = { "EOR", EOR, 3, 4, true,  false, AM_ABS_Y },
+	[0x41] = { "EOR", EOR, 2, 6, true,  false, AM_IND_X },
+	[0x51] = { "EOR", EOR, 2, 5, true,  false, AM_IND_Y },
 	[0xE6] = { "INC", INC, 2, 5, false, true, AM_ZP },
 	[0xF6] = { "INC", INC, 2, 6, false, true, AM_ZP_X },
 	[0xEE] = { "INC", INC, 3, 6, false, true, AM_ABS },
@@ -107,13 +107,13 @@ struct opcode opcodes[0x100] = {
 	[0x6C] = { "JMP", JMP, 3, 5, false, false, AM_IND },
 	[0x20] = { "JSR", JSR, 3, 6, false, false, AM_ABS },
 	[0xA9] = { "LDA", LDA, 2, 2, false, false, AM_IMM },
-	[0xA5] = { "LDA", LDA, 2, 3, true, false, AM_ZP },
-	[0xB5] = { "LDA", LDA, 2, 4, true, false, AM_ZP_X },
-	[0xAD] = { "LDA", LDA, 3, 4, true, false, AM_ABS },
-	[0xBD] = { "LDA", LDA, 3, 4, true, false, AM_ABS_X },
-	[0xB9] = { "LDA", LDA, 3, 4, true, false, AM_ABS_Y },
-	[0xA1] = { "LDA", LDA, 2, 6, true, false, AM_IND_X },
-	[0xB1] = { "LDA", LDA, 2, 5, true, false, AM_IND_Y },
+	[0xA5] = { "LDA", LDA, 2, 3, true,  false, AM_ZP },
+	[0xB5] = { "LDA", LDA, 2, 4, true,  false, AM_ZP_X },
+	[0xAD] = { "LDA", LDA, 3, 4, true,  false, AM_ABS },
+	[0xBD] = { "LDA", LDA, 3, 4, true,  false, AM_ABS_X },
+	[0xB9] = { "LDA", LDA, 3, 4, true,  false, AM_ABS_Y },
+	[0xA1] = { "LDA", LDA, 2, 6, true,  false, AM_IND_X },
+	[0xB1] = { "LDA", LDA, 2, 5, true,  false, AM_IND_Y },
 	[0xA2] = { "LDX", LDX, 2, 2, false, false, AM_IMM },
 	[0xA6] = { "LDX", LDX, 2, 3, true,  false, AM_ZP },
 	[0xB6] = { "LDX", LDX, 2, 4, true,  false, AM_ZP_Y },
@@ -131,13 +131,13 @@ struct opcode opcodes[0x100] = {
 	[0x5E] = { "LSR", LSR, 3, 7, false, true, AM_ABS_X },
 	[0xEA] = { "NOP", NOP, 1, 2, false, false, AM_NONE },
 	[0x09] = { "ORA", ORA, 2, 2, false, false, AM_IMM },
-	[0x05] = { "ORA", ORA, 2, 3, false, false, AM_ZP },
-	[0x15] = { "ORA", ORA, 2, 4, false, false, AM_ZP_X },
-	[0x0D] = { "ORA", ORA, 3, 4, false, false, AM_ABS },
-	[0x1D] = { "ORA", ORA, 3, 4, false, false, AM_ABS_X },
-	[0x19] = { "ORA", ORA, 3, 4, false, false, AM_ABS_Y },
-	[0x01] = { "ORA", ORA, 2, 6, false, false, AM_IND_X },
-	[0x11] = { "ORA", ORA, 2, 5, false, false, AM_IND_Y },
+	[0x05] = { "ORA", ORA, 2, 3, true,  false, AM_ZP },
+	[0x15] = { "ORA", ORA, 2, 4, true,  false, AM_ZP_X },
+	[0x0D] = { "ORA", ORA, 3, 4, true,  false, AM_ABS },
+	[0x1D] = { "ORA", ORA, 3, 4, true,  false, AM_ABS_X },
+	[0x19] = { "ORA", ORA, 3, 4, true,  false, AM_ABS_Y },
+	[0x01] = { "ORA", ORA, 2, 6, true,  false, AM_IND_X },
+	[0x11] = { "ORA", ORA, 2, 5, true,  false, AM_IND_Y },
 	[0x48] = { "PHA", PHA, 1, 3, false, false, AM_NONE },
 	[0x08] = { "PHP", PHP, 1, 3, false, false, AM_NONE },
 	[0x68] = { "PLA", PLA, 1, 4, false, false, AM_NONE },
@@ -155,13 +155,13 @@ struct opcode opcodes[0x100] = {
 	[0x40] = { "RTI", RTI, 1, 6, false, false, AM_NONE },
 	[0x60] = { "RTS", RTS, 1, 6, false, false, AM_NONE },
 	[0xE9] = { "SBC", SBC, 2, 2, false, false, AM_IMM },
-	[0xE5] = { "SBC", SBC, 2, 3, false, false, AM_ZP },
-	[0xF5] = { "SBC", SBC, 2, 4, false, false, AM_ZP_X },
-	[0xED] = { "SBC", SBC, 3, 4, false, false, AM_ABS },
-	[0xFD] = { "SBC", SBC, 3, 4, false, false, AM_ABS_X },
-	[0xF9] = { "SBC", SBC, 3, 4, false, false, AM_ABS_Y },
-	[0xE1] = { "SBC", SBC, 2, 6, false, false, AM_IND_X },
-	[0xF1] = { "SBC", SBC, 2, 5, false, false, AM_IND_Y },
+	[0xE5] = { "SBC", SBC, 2, 3, true,  false, AM_ZP },
+	[0xF5] = { "SBC", SBC, 2, 4, true,  false, AM_ZP_X },
+	[0xED] = { "SBC", SBC, 3, 4, true,  false, AM_ABS },
+	[0xFD] = { "SBC", SBC, 3, 4, true,  false, AM_ABS_X },
+	[0xF9] = { "SBC", SBC, 3, 4, true,  false, AM_ABS_Y },
+	[0xE1] = { "SBC", SBC, 2, 6, true,  false, AM_IND_X },
+	[0xF1] = { "SBC", SBC, 2, 5, true,  false, AM_IND_Y },
 	[0x38] = { "SEC", SEC, 1, 2, false, false, AM_NONE },
 	[0xF8] = { "SED", SED, 1, 2, false, false, AM_NONE },
 	[0x78] = { "SEI", SEI, 1, 2, false, false, AM_NONE },