157 lines
2.9 KiB
C
157 lines
2.9 KiB
C
#include "ppu.h"
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struct ppu ppu = {0};
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static void
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vram_addr_inc(void)
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{
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ppu.regs.v += (ppu.ctrl.inc_mode) ? 32 : 1;
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}
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static uint16_t
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vram_addr_mirror(uint16_t addr)
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{
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uint8_t nametable;
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addr &= 0x2fff;
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addr -= 0x2000;
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nametable = addr / 0x400;
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switch (ppu.rom->mirror) {
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case M_HORIZONTAL:
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if (nametable == 1 || nametable == 2)
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return addr - 0x400;
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else if (nametable == 3)
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return addr - 0x800;
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break;
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case M_VERTICAL:
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if (nametable == 2 || nametable == 3)
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return addr - 0x800;
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default:
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break;
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};
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return addr;
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}
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void
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ppu_tick(void)
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{
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ppu.cycles++;
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if (ppu.cycles > 256 && ppu.cycles <= 320)
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ppu.oam_addr = 0;
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if (ppu.cycles >= 341) {
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ppu.cycles -= 341;
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ppu.scanlines++;
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}
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if (ppu.scanlines >= 262)
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ppu.scanlines -= 262;
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}
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uint8_t
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ppu_read(uint16_t addr)
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{
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uint8_t tmp;
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switch (addr) {
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case 0x2002:
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tmp = (ppu.status.vblank << 7)
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| (ppu.status.sprite0_hit << 6)
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| (ppu.status.sprite_overflow << 5);
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ppu.status.vblank = 0;
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ppu.regs.write_toggle = 0;
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return tmp;
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case 0x2004:
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return ppu.oam[ppu.oam_addr];
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case 0x2007:
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tmp = ppu.last_read;
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if (addr <= 0x1fff)
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ppu.last_read = ppu.rom->chr_rom[ppu.regs.v];
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else if (addr <= 0x2fff)
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ppu.last_read = ppu.vram[vram_addr_mirror(addr)];
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vram_addr_inc();
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return tmp;
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default:
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fprintf(stderr, "Invalid PPU read at address $%04\n", addr);
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return 0;
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}
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}
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void
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ppu_write(uint16_t addr, uint8_t byte)
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{
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switch (addr) {
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case 0x2000:
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ppu.ctrl.nametable_base = byte & 3;
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ppu.ctrl.inc_mode = byte & (1 << 2);
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ppu.ctrl.sprite_tile_sel = byte & (1 << 3);
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ppu.ctrl.bg_tile_sel = byte & (1 << 4);
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ppu.ctrl.sprite_height = byte & (1 << 5);
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ppu.ctrl.master_slave = byte & (1 << 6);
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ppu.ctrl.nmi_enable = byte & (1 << 7);
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if (ppu.ctrl.nametable_base & 1)
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ppu.regs.scroll_x += 256;
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if (ppu.ctrl.nametable_base & 2)
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ppu.regs.scroll_y += 240;
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/*
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* TODO: send NMI if vblank flag still set and nmi_enable
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* changes from 0 to 1
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*/
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break;
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case 0x2001:
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ppu.mask.grayscale = byte & 1;
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ppu.mask.bg_left_enable = byte & (1 << 1);
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ppu.mask.sprite_left_enable = byte & (1 << 2);
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ppu.mask.bg_enable = byte & (1 << 3);
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ppu.mask.sprite_enable = byte & (1 << 4);
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ppu.mask.colour_emphasis = byte & (1 << 5);
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break;
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case 0x2003:
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ppu.oam_addr = byte;
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break;
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case 0x2004:
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ppu.oam[ppu.oam_addr++] = byte;
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break;
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case 0x2005:
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if (ppu.regs.write_toggle == 0)
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ppu.regs.scroll_x = byte;
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else
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ppu.regs.scroll_y = byte;
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ppu.regs.write_toggle = !ppu.regs.write_toggle;
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break;
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case 0x2006:
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if (ppu.regs.write_toggle == 0)
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ppu.regs.v = (byte << 8);
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else {
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ppu.regs.v |= byte;
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ppu.regs.v &= 0x3fff;
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}
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ppu.regs.write_toggle = !ppu.regs.write_toggle;
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break;
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case 0x2007:
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ppu.vram[ppu.regs.v] = byte;
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vram_addr_inc();
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break;
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case 0x4014:
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break;
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default:
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fprintf(stderr, "Invalid PPU write at address $%04X\n", addr);
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return;
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}
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}
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