1052 lines
16 KiB
C
1052 lines
16 KiB
C
#include <libgen.h>
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#include <stdbool.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "apu.h"
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#include "cpu.h"
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#include "opcodes.h"
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#include "ppu.h"
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#include "rom.h"
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#define MAX(a, b) ((a > b) ? a : b)
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#define STATUS_UPDATE_ZERO(r) \
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(regs.status.zero = r == 0)
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#define STATUS_UPDATE_NEGATIVE(r) \
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(regs.status.negative = ((r & (1 << 7)) != 0))
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#define STATUS_UPDATE_NZ(r) \
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{STATUS_UPDATE_ZERO(r); \
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STATUS_UPDATE_NEGATIVE(r);}
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#define STATUS_TO_INT() \
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(regs.status.carry | (regs.status.zero << 1) \
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| (regs.status.interrupt_disable << 2) | (regs.status.decimal_mode << 3) \
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| (regs.status.brk << 4) | (regs.status.unused << 5) \
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| (regs.status.overflow << 6) | (regs.status.negative << 7))
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#define MEMORY_MIRROR(addr) \
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if (addr < 0x2000) \
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addr &= 0x07FF; \
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else if (addr < 0x4000) \
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addr &= 0x2007;
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#define PUSH(b) \
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(memwrite(0x0100 + regs.sp--, b))
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#define PULL() \
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(peek(0x0100 + ++regs.sp))
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struct rom rom = {0};
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uint32_t cycles = 0;
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bool page_crossed = false;
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static uint8_t
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peek(uint16_t addr)
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{
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MEMORY_MIRROR(addr);
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if (addr > 0x7FFF) {
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if (rom.prg_rom_size == 0x4000)
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return rom.prg_rom[(addr - 0x8000) % 0x4000];
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else if (rom.prg_rom_size == 0x8000)
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return rom.prg_rom[addr - 0x8000];
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else
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fprintf(stderr, "PRG ROG size is not 0x4000 nor 0x8000\n"), exit(1);
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} else if ((addr >= 0x4000 && addr <= 0x4013) || addr == 0x4015 || addr == 0x4017)
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return apu_read(addr);
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else
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return memory[addr];
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}
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static uint16_t
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peek16(uint16_t addr)
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{
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/* bytes are stored in little-endian (low then high) */
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return peek(addr) | (peek(addr + 1) << 8);
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}
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static void
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memwrite(uint16_t addr, uint8_t byte)
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{
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if (addr >= 0x4000 && addr <= 0x4017) {
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apu_write(addr, byte);
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return;
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}
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MEMORY_MIRROR(addr);
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memory[addr] = byte;
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}
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static void
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memwrite16(uint16_t addr, uint16_t word)
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{
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MEMORY_MIRROR(addr);
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/* bytes are stored in little-endian (low then high) */
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memory[addr] = word & 0xFF;
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memory[addr + 1] = (word & 0xFF00) >> 8;
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}
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static uint16_t
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opcode_mem(enum addressing_mode mode)
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{
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uint16_t arg, val;
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if (mode == AM_ACC || mode == AM_NONE) {
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return 0;
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} else if (mode != AM_ABS && mode != AM_ABS_X && mode != AM_ABS_Y && mode != AM_IND && mode) {
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arg = peek(regs.pc++);
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} else {
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arg = peek16(regs.pc);
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regs.pc += 2;
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}
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switch (mode) {
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case AM_ZP:
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val = arg % 256;
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break;
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case AM_ZP_X:
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val = (arg + regs.x) % 256;
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break;
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case AM_ZP_Y:
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val = (arg + regs.y) % 256;
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break;
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case AM_REL:
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val = (int8_t)arg + regs.pc;
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break;
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case AM_IMM:
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case AM_ABS:
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val = arg;
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break;
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case AM_ABS_X:
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val = arg + regs.x;
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if ((arg & 0xFF00) != (val & 0xFF00))
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page_crossed = true;
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break;
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case AM_ABS_Y:
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val = arg + regs.y;
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if ((arg & 0xFF00) != (val & 0xFF00))
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page_crossed = true;
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break;
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case AM_IND:
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val = peek(arg) | (peek(((arg + 1) & 0xFF) | (arg & 0xFF00)) << 8);
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break;
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case AM_IND_X:
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val = peek((arg + regs.x) % 256) + peek((arg + regs.x + 1) % 256) * 256;
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break;
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case AM_IND_Y:
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val = peek(arg) + peek((arg + 1) % 256) * 256 + regs.y;
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if (((uint16_t)(val - regs.y) & 0xFF00) != (val & 0xFF00))
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page_crossed = true;
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break;
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default:
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fprintf(stderr, "INVALID ADDRESSING MODE %i\n", mode);
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abort();
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}
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return val;
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}
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static void
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tick(void)
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{
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cycles++;
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ppu_tick();
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ppu_tick();
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ppu_tick();
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}
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static void
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branch(uint16_t addr, bool cond)
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{
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if (!cond)
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return;
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tick();
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if (((regs.pc + 1) & 0xFF00) != (addr & 0xFF00))
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tick();
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regs.pc = addr;
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}
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/* OFFICIAL OPCODES */
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void
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ADC(uint16_t arg)
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{
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uint16_t sum; // 16-bit sum makes it easier to determine carry flag
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sum = regs.a + arg + regs.status.carry;
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regs.status.carry = sum > 0xFF;
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/* overflow flag formula: https://stackoverflow.com/a/29224684 */
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regs.status.overflow = (~(regs.a ^ arg) & (regs.a ^ sum) & 0x80) != 0;
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regs.a = sum & 0xFF;
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STATUS_UPDATE_NZ(regs.a);
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}
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void
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AND(uint16_t arg)
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{
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regs.a &= arg;
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STATUS_UPDATE_NZ(regs.a);
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}
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void
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ASL_acc(uint16_t arg)
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{
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uint16_t tmp;
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tmp = regs.a << 1;
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regs.a = tmp & 0xFF;
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regs.status.carry = tmp > 0xFF;
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STATUS_UPDATE_NZ(regs.a);
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}
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void
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ASL(uint16_t mem)
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{
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uint16_t tmp;
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tmp = peek(mem) << 1;
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memwrite(mem, tmp & 0xFF);
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regs.status.carry = tmp > 0xFF;
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regs.status.negative = (tmp & (1 << 7)) != 0;
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regs.status.zero = (tmp << 1 & 0xFF) == 0;
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}
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void
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BCC(uint16_t arg)
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{
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branch(arg, regs.status.carry == 0);
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}
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void
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BCS(uint16_t arg)
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{
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branch(arg, regs.status.carry == 1);
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}
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void
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BEQ(uint16_t arg)
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{
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branch(arg, regs.status.zero == 1);
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}
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void
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BIT(uint16_t arg)
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{
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uint8_t tmp = arg;
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regs.status.zero = (regs.a & tmp) == 0;
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regs.status.overflow = (tmp & (1 << 6)) != 0;
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STATUS_UPDATE_NEGATIVE(tmp);
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}
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void
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BMI(uint16_t arg)
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{
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branch(arg, regs.status.negative == 1);
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}
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void
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BNE(uint16_t arg)
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{
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branch(arg, regs.status.zero == 0);
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}
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void
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BPL(uint16_t arg)
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{
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branch(arg, regs.status.negative == 0);
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}
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void
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BRK(uint16_t arg)
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{
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/* TODO: push regs.pc and regs.status to stack and load IRQ vector */
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regs.status.brk = 1;
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exit(0);
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}
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void
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BVC(uint16_t arg)
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{
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//regs.status.overflow = (STATUS_TO_INT() & (1 << 6)) == 0;
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//if (regs.status.overflow == 0)
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branch(arg, (STATUS_TO_INT() & (1 << 6)) == 0);
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}
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void
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BVS(uint16_t arg)
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{
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regs.status.overflow = (STATUS_TO_INT() & (1 << 6)) != 0;
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branch(arg, regs.status.overflow == 1);
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}
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void
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CLC(uint16_t arg)
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{
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regs.status.carry = 0;
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}
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void
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CLD(uint16_t arg)
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{
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regs.status.decimal_mode = 0;
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}
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void
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CLI(uint16_t arg)
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{
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regs.status.interrupt_disable = 0;
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}
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void
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CLV(uint16_t arg)
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{
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regs.status.overflow = 0;
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}
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void
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CMP(uint16_t arg)
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{
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uint8_t tmp;
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tmp = regs.a - arg;
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regs.status.carry = regs.a >= arg;
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regs.status.zero = regs.a == arg;
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STATUS_UPDATE_NEGATIVE(tmp);
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}
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void
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CPX(uint16_t arg)
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{
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uint8_t tmp;
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tmp = regs.x - arg;
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regs.status.carry = regs.x >= arg;
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regs.status.zero = regs.x == arg;
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STATUS_UPDATE_NEGATIVE(tmp);
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}
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void
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CPY(uint16_t arg)
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{
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uint8_t tmp;
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tmp = regs.y - arg;
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regs.status.carry = regs.y >= arg;
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regs.status.zero = regs.y == arg;
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STATUS_UPDATE_NEGATIVE(tmp);
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}
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void
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DEC(uint16_t mem)
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{
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memwrite(mem, peek(mem) - 1);
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STATUS_UPDATE_NZ(peek(mem));
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}
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void
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DEX(uint16_t arg)
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{
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regs.x--;
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STATUS_UPDATE_NZ(regs.x);
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}
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void
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DEY(uint16_t arg)
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{
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regs.y--;
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STATUS_UPDATE_NZ(regs.y);
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}
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void
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EOR(uint16_t arg)
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{
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regs.a ^= arg;
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STATUS_UPDATE_NZ(regs.a);
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}
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void
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INC(uint16_t mem)
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{
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memwrite(mem, peek(mem) + 1);
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STATUS_UPDATE_NZ(peek(mem));
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}
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void
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INX(uint16_t arg)
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{
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regs.x++;
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STATUS_UPDATE_NZ(regs.x);
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}
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void
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INY(uint16_t arg)
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{
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regs.y++;
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STATUS_UPDATE_NZ(regs.y);
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}
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void
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JMP(uint16_t arg)
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{
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regs.pc = arg;
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}
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void
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JSR(uint16_t arg)
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{
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uint16_t tmp = regs.pc - 1;
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/*
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* first push high-byte of return address then low-byte
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* https://www.masswerk.at/6502/6502_instruction_set.html
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*/
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PUSH((tmp & 0xFF00) >> 8);
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PUSH(tmp & 0xFF);
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regs.pc = arg;
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}
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void
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LDA(uint16_t arg)
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{
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regs.a = arg;
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STATUS_UPDATE_NZ(regs.a);
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}
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void
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LDX(uint16_t arg)
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{
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regs.x = arg;
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STATUS_UPDATE_NZ(regs.x);
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}
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void
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LDY(uint16_t arg)
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{
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regs.y = arg;
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STATUS_UPDATE_NZ(regs.y);
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}
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void
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LSR_acc(uint16_t arg)
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{
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regs.status.carry = regs.a & 1; // bit 0 in carry
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regs.a >>= 1;
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regs.a &= ~(1 << 7); // bit 7 cleared
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STATUS_UPDATE_NZ(regs.a);
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}
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void
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LSR(uint16_t mem)
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{
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uint8_t tmp;
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tmp = peek(mem);
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regs.status.carry = tmp & 1; // bit 0 in carry
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tmp >>= 1;
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tmp &= ~(1 << 7); // bit 7 cleared
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memwrite(mem, tmp);
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STATUS_UPDATE_NZ(tmp);
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}
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void
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NOP(uint16_t arg)
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{
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return;
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}
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void
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ORA(uint16_t arg)
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{
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regs.a |= arg;
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STATUS_UPDATE_NZ(regs.a);
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}
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void
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PHA(uint16_t arg)
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{
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PUSH(regs.a);
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}
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void
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PHP(uint16_t arg)
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{
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PUSH(STATUS_TO_INT() | (1 << 4));
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}
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void
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PLA(uint16_t arg)
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{
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regs.a = PULL();
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STATUS_UPDATE_NZ(regs.a);
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}
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void
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PLP(uint16_t arg)
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{
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uint8_t status;
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status = PULL();
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regs.status.carry = (status & 1) != 0;
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regs.status.zero = (status & (1 << 1)) != 0;
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regs.status.interrupt_disable = (status & (1 << 2)) != 0;
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regs.status.decimal_mode = (status & (1 << 3)) != 0;
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regs.status.brk = 0;
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regs.status.unused = 1;
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regs.status.overflow = (status & (1 << 6)) != 0;
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regs.status.negative = (status & (1 << 7)) != 0;
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}
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void
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ROL_acc(uint16_t arg)
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{
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uint8_t carry;
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carry = (regs.a & (1 << 7)) != 0;
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regs.a <<= 1;
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regs.a |= regs.status.carry;
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regs.status.carry = carry;
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STATUS_UPDATE_NZ(regs.a);
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}
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void
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ROL(uint16_t mem)
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{
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uint8_t carry, tmp;
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carry = (peek(mem) & (1 << 7)) != 0;
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tmp = (peek(mem) << 1) | regs.status.carry;
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memwrite(mem, tmp);
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regs.status.carry = carry;
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STATUS_UPDATE_NZ(tmp);
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}
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void
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ROR_acc(uint16_t arg)
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{
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uint8_t carry;
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carry = regs.a & 1;
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regs.a >>= 1;
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regs.a |= regs.status.carry << 7;
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regs.status.carry = carry;
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STATUS_UPDATE_NZ(regs.a);
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}
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void
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ROR(uint16_t mem)
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{
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uint8_t carry, tmp;
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carry = peek(mem) & 1;
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tmp = (peek(mem) >> 1) | (regs.status.carry << 7);
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memwrite(mem, tmp);
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regs.status.carry = carry;
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STATUS_UPDATE_NZ(tmp);
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}
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void
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RTI(uint16_t arg)
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{
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PLP(0);
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regs.pc = PULL() | (PULL() << 8);
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}
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void
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RTS(uint16_t arg)
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{
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regs.pc = (PULL() | (PULL() << 8)) + 1;
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}
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void
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SBC(uint16_t arg)
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{
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uint8_t tmp = arg & 0xFF;
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uint16_t diff;
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diff = regs.a - tmp - !regs.status.carry;
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regs.status.carry = diff > 0xFF;
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regs.status.carry = !regs.status.carry;
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/* overflow flag formula: https://stackoverflow.com/a/29224684 */
|
|
regs.status.overflow = ((regs.a ^ arg) & (regs.a ^ diff) & 0x80) != 0;
|
|
regs.a = diff & 0xFF;
|
|
|
|
STATUS_UPDATE_NZ(regs.a);
|
|
}
|
|
|
|
void
|
|
SEC(uint16_t arg)
|
|
{
|
|
regs.status.carry = 1;
|
|
}
|
|
|
|
void
|
|
SED(uint16_t arg)
|
|
{
|
|
regs.status.decimal_mode = 1;
|
|
}
|
|
|
|
void
|
|
SEI(uint16_t arg)
|
|
{
|
|
regs.status.interrupt_disable = 1;
|
|
}
|
|
|
|
void
|
|
STA(uint16_t mem)
|
|
{
|
|
memwrite(mem, regs.a);
|
|
}
|
|
|
|
void
|
|
STX(uint16_t mem)
|
|
{
|
|
memwrite(mem, regs.x);
|
|
}
|
|
|
|
void
|
|
STY(uint16_t mem)
|
|
{
|
|
memwrite(mem, regs.y);
|
|
}
|
|
|
|
void
|
|
TAX(uint16_t arg)
|
|
{
|
|
regs.x = regs.a;
|
|
|
|
STATUS_UPDATE_NZ(regs.x);
|
|
}
|
|
|
|
void
|
|
TAY(uint16_t arg)
|
|
{
|
|
regs.y = regs.a;
|
|
|
|
STATUS_UPDATE_NZ(regs.y);
|
|
}
|
|
|
|
void
|
|
TSX(uint16_t arg)
|
|
{
|
|
// regs.x = PULL();
|
|
regs.x = regs.sp;
|
|
|
|
STATUS_UPDATE_NZ(regs.x);
|
|
}
|
|
|
|
void
|
|
TXA(uint16_t arg)
|
|
{
|
|
regs.a = regs.x;
|
|
|
|
STATUS_UPDATE_NZ(regs.a);
|
|
}
|
|
|
|
void
|
|
TXS(uint16_t arg)
|
|
{
|
|
// PUSH(regs.x);
|
|
regs.sp = regs.x;
|
|
}
|
|
|
|
void
|
|
TYA(uint16_t arg)
|
|
{
|
|
regs.a = regs.y;
|
|
|
|
STATUS_UPDATE_NZ(regs.a);
|
|
}
|
|
|
|
/* UNOFFICIAL OPCODES */
|
|
|
|
void
|
|
AAC(uint16_t arg)
|
|
{
|
|
AND(arg);
|
|
|
|
regs.status.carry = regs.status.negative;
|
|
}
|
|
|
|
void
|
|
SAX(uint16_t arg)
|
|
{
|
|
uint8_t tmp = regs.x & regs.a;
|
|
memwrite(arg, tmp);
|
|
}
|
|
|
|
void
|
|
ARR(uint16_t arg)
|
|
{
|
|
uint8_t tmp = arg & regs.a;
|
|
|
|
AND(arg);
|
|
ROR_acc(0);
|
|
|
|
if ((tmp & (1 << 5)) != 0 && (tmp & (1 << 6)) != 0)
|
|
SEC(0), CLV(0);
|
|
else if ((tmp & (1 << 5)) == 0 && (tmp & (1 << 6)) == 0)
|
|
CLC(0), CLV(0);
|
|
else if ((tmp & (1 << 5)) != 0)
|
|
CLC(0), regs.status.overflow = 1;
|
|
else if ((tmp & (1 << 6)) != 0)
|
|
SEC(0), regs.status.overflow = 1;
|
|
}
|
|
|
|
void
|
|
ASR(uint16_t arg)
|
|
{
|
|
AND(arg);
|
|
LSR_acc(0);
|
|
}
|
|
|
|
void
|
|
ATX(uint16_t arg)
|
|
{
|
|
AND(arg);
|
|
TAX(0);
|
|
}
|
|
|
|
void
|
|
AXA(uint16_t arg)
|
|
{
|
|
uint8_t tmp = regs.x & regs.a & 7;
|
|
memwrite(arg, tmp);
|
|
}
|
|
|
|
void
|
|
AXS(uint16_t arg)
|
|
{
|
|
regs.x &= regs.a;
|
|
regs.x -= arg;
|
|
|
|
regs.status.carry = arg <= regs.x;
|
|
STATUS_UPDATE_NZ(regs.x);
|
|
}
|
|
|
|
void
|
|
DCP(uint16_t arg)
|
|
{
|
|
uint8_t tmp = peek(arg) - 1;
|
|
memwrite(arg, tmp);
|
|
|
|
regs.status.carry = tmp <= regs.a;
|
|
STATUS_UPDATE_NZ(regs.a - tmp);
|
|
}
|
|
|
|
void
|
|
ISB(uint16_t arg)
|
|
{
|
|
INC(arg);
|
|
SBC(peek(arg));
|
|
}
|
|
|
|
void
|
|
KIL(uint16_t arg)
|
|
{
|
|
/* TODO: figure out how to stop interpret(), I guess with global bool */
|
|
NOP(0);
|
|
}
|
|
|
|
void
|
|
LAR(uint16_t arg)
|
|
{
|
|
regs.a = regs.x = regs.sp = regs.a & regs.sp;
|
|
|
|
STATUS_UPDATE_NZ(regs.a);
|
|
}
|
|
|
|
void
|
|
LAX(uint16_t arg)
|
|
{
|
|
LDA(arg);
|
|
LDX(arg);
|
|
}
|
|
|
|
void
|
|
RLA(uint16_t arg)
|
|
{
|
|
ROL(arg);
|
|
AND(peek(arg));
|
|
}
|
|
|
|
void
|
|
RRA(uint16_t arg)
|
|
{
|
|
ROR(arg);
|
|
ADC(peek(arg));
|
|
}
|
|
|
|
void
|
|
SLO(uint16_t arg)
|
|
{
|
|
ASL(arg);
|
|
ORA(peek(arg));
|
|
}
|
|
|
|
void
|
|
SRE(uint16_t arg)
|
|
{
|
|
LSR(arg);
|
|
EOR(peek(arg));
|
|
}
|
|
|
|
void
|
|
SXA(uint16_t arg)
|
|
{
|
|
memwrite(arg, regs.x & ((arg & 0xFF00) + 1));
|
|
}
|
|
|
|
void
|
|
SYA(uint16_t arg)
|
|
{
|
|
memwrite(arg, regs.x & ((arg & 0xFF00) + 1));
|
|
}
|
|
|
|
void
|
|
XAA(uint16_t arg)
|
|
{
|
|
/* TODO: apparently the exact operation is unknown */
|
|
NOP(0);
|
|
}
|
|
|
|
void
|
|
XAS(uint16_t arg)
|
|
{
|
|
regs.sp = regs.a & regs.x;
|
|
memwrite(arg, regs.sp & ((arg & 0xFF00) + 1));
|
|
}
|
|
|
|
static void
|
|
interpret(void)
|
|
{
|
|
uint8_t op, spaces;
|
|
uint16_t arg;
|
|
enum addressing_mode mode;
|
|
|
|
for (;;) {
|
|
printf("%04X ", regs.pc);
|
|
|
|
op = peek(regs.pc++);
|
|
|
|
printf("%02X", op);
|
|
for (uint8_t i = 0; i < opcodes[op].bytes - 1; i++)
|
|
printf(" %02X", peek(regs.pc + i));
|
|
|
|
if (opcodes[op].bytes == 1)
|
|
printf(" ");
|
|
else if (opcodes[op].bytes == 2)
|
|
printf(" ");
|
|
else if (opcodes[op].bytes == 3)
|
|
putchar(' ');
|
|
putchar((opcodes[op].unofficial) ? '*' : ' ');
|
|
printf("%s ", opcodes[op].name);
|
|
|
|
mode = opcodes[op].mode;
|
|
arg = opcode_mem(mode);
|
|
|
|
switch (mode) {
|
|
case AM_IMM:
|
|
printf("#$%02X", arg);
|
|
break;
|
|
case AM_ZP:
|
|
printf("$%02X", arg);
|
|
break;
|
|
case AM_ZP_X:
|
|
printf("$%02X,X @ %02X", peek(regs.pc - 1), arg);
|
|
break;
|
|
case AM_ZP_Y:
|
|
printf("$%02X,Y @ %02X", peek(regs.pc - 1), arg);
|
|
break;
|
|
case AM_REL:
|
|
case AM_ABS:
|
|
printf("$%04X", arg);
|
|
break;
|
|
case AM_ABS_X:
|
|
printf("$%04X,X @ %04X", (uint16_t)(arg - regs.x), arg);
|
|
break;
|
|
case AM_ABS_Y:
|
|
printf("$%04X,Y @ %04X", (uint16_t)(arg - regs.y), arg);
|
|
break;
|
|
case AM_IND:
|
|
printf("($%04X) = %04X", peek16(regs.pc - 2), arg);
|
|
break;
|
|
case AM_IND_X:
|
|
printf("($%02X,X) @ %02X = %04X", peek(regs.pc - 1), (peek(regs.pc - 1) + regs.x) & 0xFF, arg);
|
|
break;
|
|
case AM_IND_Y:
|
|
printf("($%02X),Y = %04X @ %04X", peek(regs.pc - 1), (uint16_t)(arg - regs.y), arg);
|
|
break;
|
|
case AM_ACC:
|
|
printf("A ");
|
|
break;
|
|
case AM_NONE:
|
|
printf(" ");
|
|
break;
|
|
}
|
|
|
|
spaces = 9;
|
|
|
|
if (opcodes[op].memread || opcodes[op].memwrite)
|
|
printf(" = %02X", peek(arg));
|
|
else
|
|
spaces += 5;
|
|
|
|
if (mode != AM_IND && mode != AM_ABS_X && mode != AM_ABS_Y)
|
|
spaces += 7;
|
|
|
|
switch (opcodes[op].mode) {
|
|
case AM_IND_X:
|
|
spaces -= 12;
|
|
break;
|
|
case AM_IND_Y:
|
|
spaces -= 14;
|
|
break;
|
|
case AM_ZP:
|
|
spaces += 4;
|
|
break;
|
|
case AM_ZP_X:
|
|
case AM_ZP_Y:
|
|
spaces -= 3;
|
|
break;
|
|
case AM_REL:
|
|
case AM_ABS:
|
|
spaces += 2;
|
|
break;
|
|
case AM_IMM:
|
|
case AM_ACC:
|
|
case AM_NONE:
|
|
spaces += 3;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
while (spaces--) putchar(' ');
|
|
|
|
printf("A:%02X X:%02X Y:%02X P:%02X SP:%02X PPU:%3d,%3d CYC:%d\n",
|
|
regs.a, regs.x, regs.y, STATUS_TO_INT(), regs.sp,
|
|
ppu.scanlines, ppu.cycles, cycles);
|
|
|
|
if (opcodes[op].memread)
|
|
opcodes[op].instr(peek(arg));
|
|
else
|
|
opcodes[op].instr(arg);
|
|
|
|
for (uint8_t i = 0; i < opcodes[op].cycles; i++)
|
|
tick();
|
|
|
|
if (page_crossed) {
|
|
if (opcodes[op].page_cross)
|
|
tick();
|
|
page_crossed = false;
|
|
}
|
|
}
|
|
}
|
|
|
|
/* https://www.nesdev.org/wiki/CPU_power_up_state */
|
|
void
|
|
cpu_init(void)
|
|
{
|
|
regs.a = regs.x = regs.y = 0;
|
|
regs.pc = 0xFFFC;
|
|
regs.sp = 0xFD;
|
|
|
|
//memset(®s.status, 0, sizeof(regs.status));
|
|
regs.status.interrupt_disable = 1;
|
|
regs.status.unused = 1;
|
|
|
|
cycles += 7;
|
|
for (uint8_t i = 0; i < 7 * 3; i++)
|
|
ppu_tick();
|
|
}
|
|
|
|
int
|
|
main(int argc, char *argv[])
|
|
{
|
|
FILE *fp;
|
|
uint8_t *buf;
|
|
size_t buflen;
|
|
|
|
if (argc != 2) {
|
|
fprintf(stderr, "Usage: %s rom.nes\n", basename(argv[0]));
|
|
return 1;
|
|
}
|
|
|
|
fp = fopen(argv[1], "r");
|
|
fseek(fp, 0, SEEK_END);
|
|
buflen = ftell(fp);
|
|
buf = calloc(1, buflen);
|
|
fseek(fp, 0, SEEK_SET);
|
|
if (fread(buf, 1, buflen, fp) != buflen && ferror(fp)) {
|
|
fprintf(stderr, "file %s was not read properly\n", argv[1]);
|
|
clearerr(fp);
|
|
fclose(fp);
|
|
return 1;
|
|
}
|
|
fclose(fp);
|
|
|
|
parse_rom(buf, buflen, &rom);
|
|
free(buf);
|
|
ppu.rom = &rom;
|
|
|
|
cpu_init();
|
|
|
|
/* TODO: move to separate file? */
|
|
if (rom.mapper != 0) {
|
|
fprintf(stderr, "Only iNES ROMs using Mapper 0 are supported for now.\n");
|
|
return 1;
|
|
}
|
|
|
|
memwrite16(0xFFFC, 0xC000);
|
|
regs.pc = 0xC000;
|
|
|
|
interpret();
|
|
|
|
printf("\n$02 = %02X\n", memory[0x02]);
|
|
printf("$03 = %02X\n", memory[0x03]);
|
|
|
|
free_rom(&rom);
|
|
|
|
return 0;
|
|
}
|