eel3792c_rv32i

RV32I implementation on a DE10-Lite FPGA for the EEL3792C course.
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my_computer_tb.v (337B)

      1 `timescale 1ns/1ps
      2 
      3 module my_computer_tb();
      4 
      5 	reg        clk, reset;
      6 
      7 	// instantiate device to be tested
      8 	my_computer U1(.clk(clk), .reset(reset), .my_sw(0), .my_rd(), .my_PC());
      9 
     10 	always
     11 	begin
     12 		#5; clk <= ~clk;
     13 	end
     14 
     15 	initial
     16 	begin
     17 		reset <= 1; clk = 1;
     18 		#22; reset <= 0;
     19 		#3000;
     20 		$stop;
     21 	end
     22 
     23 endmodule