eel3792c_rv32i

RV32I implementation on a DE10-Lite FPGA for the EEL3792C course.
Log | Files | Refs

DateCommit messageAuthorFiles+-
2025-04-17 20:38increase rom to 128 from 64vin3+103-5
2025-04-17 20:14increase RAM size to 0xffvin2+6-1
2025-04-17 20:03add makefile to compile C code easiervin1+15-0
2025-04-17 19:56write fibonacci.c code without offsetvin1+2-2
2025-04-17 19:56zero out the ramvin1+1023-1024
2025-04-10 19:37update fibonacci.cvin1+5-5
2025-03-31 20:45word-align c fibonacci memory addressesvin1+3-3
2025-03-31 20:07add riscv32 nix cross-toolchain and fibonacci c filevin2+15-0
2025-03-25 20:40increase test bench lengthvin2+3-5
2025-03-25 20:31add blt and bgevin1+13-6
2025-03-24 20:46refactor PCSrc assignment and add bne instructionvin1+10-1
2025-03-25 20:21fibonacci with blt and bnejg02+5-7
2025-03-25 20:02Fibonacci assembly code and machine codejg02+34-22
2025-03-24 19:45remove db and incremental_dbvin2+251-251
2025-03-20 20:30add shift instructions (sll, srl, sra, and immediates)vin1+28-22
2025-03-20 20:06add xor instruction and PC loggingvin1+4-1
2025-03-18 19:35update .gitignore to ignore quartus directoriesvin1+3-0
2025-03-10 20:20use relative filepath for ROM and RAMvin1+2-2
2025-03-10 19:46remove auto-generated reportsvin1+8-0
2025-03-10 19:41initial payloadvin9+1911-0