implement all of the nestest unofficial opcodes and fix branch cycles

1 files changed, 10 insertions, 9 deletions

diff --git a/cpu.c b/cpu.c
index 039337f..1345d8b 100644
--- a/cpu.c
+++ b/cpu.c
@@ -127,9 +127,7 @@ opcode_mem(enum addressing_mode mode)
 		val = (arg + regs.y) % 256;
 		break;
 	case AM_REL:
-		val = arg + regs.pc;
-		if (((regs.pc + 1) & 0xFF00) != (val & 0xFF00))
-			val -= 0x0100;
+		val = (int8_t)arg + regs.pc;
 		break;
 	case AM_IMM:
 	case AM_ABS:
@@ -174,6 +172,9 @@ branch(uint16_t addr, bool cond)
 		return;
 	cycles++;
 
+	if (((regs.pc + 1) & 0xFF00) != (addr & 0xFF00))
+		cycles++;
+
 	regs.pc = addr;
 }
 
@@ -277,7 +278,7 @@ BRK(uint16_t arg)
 {
 	/* TODO: push regs.pc and regs.status to stack and load IRQ vector */
 	regs.status.brk = 1;
-	// exit(0);
+	exit(0);
 }
 
 void
@@ -771,11 +772,11 @@ DCP(uint16_t arg)
 	memwrite(arg, tmp);
 
 	regs.status.carry = tmp <= regs.a;
-	STATUS_UPDATE_NZ(tmp);
+	STATUS_UPDATE_NZ(regs.a - tmp);
 }
 
 void
-ISC(uint16_t arg)
+ISB(uint16_t arg)
 {
 	INC(arg);
 	SBC(peek(arg));
@@ -807,7 +808,7 @@ void
 RLA(uint16_t arg)
 {
 	ROL(arg);
-	AND(arg);
+	AND(peek(arg));
 }
 
 void
@@ -821,14 +822,14 @@ void
 SLO(uint16_t arg)
 {
 	ASL(arg);
-	ORA(arg);
+	ORA(peek(arg));
 }
 
 void
 SRE(uint16_t arg)
 {
 	LSR(arg);
-	EOR(arg);
+	EOR(peek(arg));
 }
 
 void