finalize trace logging to match nestest.log minus PPU cycles

author: vin <git@vineetk.net> 2024-07-03 21:02:34 -0400
committer: vin <git@vineetk.net> 2024-07-03 21:49:27 -0400
commit: d57acb77c7d617fbfe4e0c2fb6d19e1b60723a97 (patch)
tree: 547290156af8388d263ae37ed815a9fe914a4768
parent: 4fcc8d48f4dd3f7be37d917826a148c02701d0e3 (diff)
2 files changed, 65 insertions, 61 deletions
diff --git a/cpu.c b/cpu.c
index bba0ed5..31f4be2 100644
--- a/cpu.c
+++ b/cpu.c
@@ -622,21 +622,18 @@ SEI(uint16_t arg)
 void
 STA(uint16_t mem)
 {
-        uint8_t tmp = peek(mem);
        memwrite(mem, regs.a);
 }
 void
 STX(uint16_t mem)
 {
-        uint8_t tmp = peek(mem);
        memwrite(mem, regs.x);
 }
 void
 STY(uint16_t mem)
 {
-        uint8_t tmp = peek(mem);
        memwrite(mem, regs.y);
 }
@@ -728,13 +725,19 @@ interpret(void)
                        printf("$%04X", arg);
                        break;
                case AM_ABS_X:
-                        printf("$%04X,X @ %04X", arg - regs.x, arg);
+                        printf("$%04X,X @ %04X", (uint16_t)(arg - regs.x), arg);
                        break;
                case AM_ABS_Y:
-                        printf("$%04X,Y @ %04X", arg - regs.y, arg);
+                        printf("$%04X,Y @ %04X", (uint16_t)(arg - regs.y), arg);
                        break;
                case AM_IND:
-                        printf("($%04X) = %04X\t\t", arg, peek16(arg));
+                        printf("($%04X) = %04X", arg, peek16(arg));
+                        break;
+                case AM_IND_X:
+                        printf("($%02X,X) @ %02X = %04X", peek(regs.pc - 1), peek(regs.pc - 1) + regs.x, arg);
+                        break;
+                case AM_IND_Y:
+                        printf("($%02X),Y = %04X @ %04X", peek(regs.pc - 1), (uint16_t)(arg - regs.y), arg);
                        break;
                case AM_ACC:
                case AM_NONE:
@@ -748,9 +751,10 @@ interpret(void)
                if (opcodes[op].memread || opcodes[op].memwrite)
                        printf(" = %02X", peek(arg));
-                if (mode != AM_ABS_X && mode != AM_ABS_Y)
+                if (mode != AM_IND && mode != AM_ABS_X && mode != AM_ABS_Y)
                        putchar('\t');
-                printf("\t\t");
+                if (mode != AM_IND_X && mode != AM_IND_Y)
+                        printf("\t\t");
                printf("A:%02X X:%02X Y:%02X P:%02X SP:%02X CYC:%d\n",
                    regs.a, regs.x, regs.y, STATUS_TO_INT(), regs.sp, cycles);
diff --git a/opcodes.h b/opcodes.h
index 02b30e7..4c34bb4 100644
--- a/opcodes.h
+++ b/opcodes.h
@@ -34,21 +34,21 @@ struct opcode {
 struct opcode opcodes[0x100] = {
        /* official opcodes */
        [0x69] = { "ADC", ADC, 2, 2, false, false, AM_IMM },
-        [0x65] = { "ADC", ADC, 2, 3, false, false, AM_ZP },
+        [0x65] = { "ADC", ADC, 2, 3, true,  false, AM_ZP },
-        [0x75] = { "ADC", ADC, 2, 4, false, false, AM_ZP_X },
+        [0x75] = { "ADC", ADC, 2, 4, true,  false, AM_ZP_X },
-        [0x6D] = { "ADC", ADC, 3, 4, false, false, AM_ABS },
+        [0x6D] = { "ADC", ADC, 3, 4, true,  false, AM_ABS },
-        [0x7D] = { "ADC", ADC, 3, 4, false, false, AM_ABS_X },
+        [0x7D] = { "ADC", ADC, 3, 4, true,  false, AM_ABS_X },
-        [0x79] = { "ADC", ADC, 3, 4, false, false, AM_ABS_Y },
+        [0x79] = { "ADC", ADC, 3, 4, true,  false, AM_ABS_Y },
-        [0x61] = { "ADC", ADC, 2, 6, false, false, AM_IND_X },
+        [0x61] = { "ADC", ADC, 2, 6, true,  false, AM_IND_X },
-        [0x71] = { "ADC", ADC, 2, 5, false, false, AM_IND_Y },
+        [0x71] = { "ADC", ADC, 2, 5, true,  false, AM_IND_Y },
        [0x29] = { "AND", AND, 2, 2, false, false, AM_IMM },
-        [0x25] = { "AND", AND, 2, 3, false, false, AM_ZP },
+        [0x25] = { "AND", AND, 2, 3, true,  false, AM_ZP },
-        [0x35] = { "AND", AND, 2, 4, false, false, AM_ZP_X },
+        [0x35] = { "AND", AND, 2, 4, true,  false, AM_ZP_X },
-        [0x2D] = { "AND", AND, 3, 4, false, false, AM_ABS },
+        [0x2D] = { "AND", AND, 3, 4, true,  false, AM_ABS },
-        [0x3D] = { "AND", AND, 3, 4, false, false, AM_ABS_X },
+        [0x3D] = { "AND", AND, 3, 4, true,  false, AM_ABS_X },
-        [0x39] = { "AND", AND, 3, 4, false, false, AM_ABS_Y },
+        [0x39] = { "AND", AND, 3, 4, true,  false, AM_ABS_Y },
-        [0x21] = { "AND", AND, 2, 6, false, false, AM_IND_X },
+        [0x21] = { "AND", AND, 2, 6, true,  false, AM_IND_X },
-        [0x31] = { "AND", AND, 2, 5, false, false, AM_IND_Y },
+        [0x31] = { "AND", AND, 2, 5, true,  false, AM_IND_Y },
        [0x0A] = { "ASL", ASL_acc, 1, 2, false, false, AM_ACC },
        [0x06] = { "ASL", ASL, 2, 5, false, true, AM_ZP },
        [0x16] = { "ASL", ASL, 2, 6, false, true, AM_ZP_X },
@@ -70,19 +70,19 @@ struct opcode opcodes[0x100] = {
        [0x58] = { "CLI", CLI, 1, 2, false, false, AM_NONE },
        [0xB8] = { "CLV", CLV, 1, 2, false, false, AM_NONE },
        [0xC9] = { "CMP", CMP, 2, 2, false, false, AM_IMM },
-        [0xC5] = { "CMP", CMP, 2, 3, false, false, AM_ZP },
+        [0xC5] = { "CMP", CMP, 2, 3, true,  false, AM_ZP },
-        [0xD5] = { "CMP", CMP, 2, 4, false, false, AM_ZP_X },
+        [0xD5] = { "CMP", CMP, 2, 4, true,  false, AM_ZP_X },
-        [0xCD] = { "CMP", CMP, 3, 4, false, false, AM_ABS },
+        [0xCD] = { "CMP", CMP, 3, 4, true,  false, AM_ABS },
-        [0xDD] = { "CMP", CMP, 3, 4, false, false, AM_ABS_X },
+        [0xDD] = { "CMP", CMP, 3, 4, true,  false, AM_ABS_X },
-        [0xD9] = { "CMP", CMP, 3, 4, false, false, AM_ABS_Y },
+        [0xD9] = { "CMP", CMP, 3, 4, true,  false, AM_ABS_Y },
-        [0xC1] = { "CMP", CMP, 2, 6, false, false, AM_IND_X },
+        [0xC1] = { "CMP", CMP, 2, 6, true,  false, AM_IND_X },
-        [0xD1] = { "CMP", CMP, 2, 5, false, false, AM_IND_Y },
+        [0xD1] = { "CMP", CMP, 2, 5, true,  false, AM_IND_Y },
        [0xE0] = { "CPX", CPX, 2, 2, false, false, AM_IMM },
-        [0xE4] = { "CPX", CPX, 2, 3, false, false, AM_ZP },
+        [0xE4] = { "CPX", CPX, 2, 3, true,  false, AM_ZP },
-        [0xEC] = { "CPX", CPX, 3, 4, false, false, AM_ABS },
+        [0xEC] = { "CPX", CPX, 3, 4, true,  false, AM_ABS },
        [0xC0] = { "CPY", CPY, 2, 2, false, false, AM_IMM },
-        [0xC4] = { "CPY", CPY, 2, 3, false, false, AM_ZP },
+        [0xC4] = { "CPY", CPY, 2, 3, true,  false, AM_ZP },
-        [0xCC] = { "CPY", CPY, 3, 4, false, false, AM_ABS },
+        [0xCC] = { "CPY", CPY, 3, 4, true,  false, AM_ABS },
        [0xC6] = { "DEC", DEC, 2, 5, false, true, AM_ZP },
        [0xD6] = { "DEC", DEC, 2, 6, false, true, AM_ZP_X },
        [0xCE] = { "DEC", DEC, 3, 6, false, true, AM_ABS },
@@ -90,13 +90,13 @@ struct opcode opcodes[0x100] = {
        [0xCA] = { "DEX", DEX, 1, 2, false, false, AM_NONE },
        [0x88] = { "DEY", DEY, 1, 2, false, false, AM_NONE },
        [0x49] = { "EOR", EOR, 2, 2, false, false, AM_IMM },
-        [0x45] = { "EOR", EOR, 2, 3, false, false, AM_ZP },
+        [0x45] = { "EOR", EOR, 2, 3, true,  false, AM_ZP },
-        [0x55] = { "EOR", EOR, 2, 4, false, false, AM_ZP_X },
+        [0x55] = { "EOR", EOR, 2, 4, true,  false, AM_ZP_X },
-        [0x4D] = { "EOR", EOR, 3, 4, false, false, AM_ABS },
+        [0x4D] = { "EOR", EOR, 3, 4, true,  false, AM_ABS },
-        [0x5D] = { "EOR", EOR, 3, 4, false, false, AM_ABS_X },
+        [0x5D] = { "EOR", EOR, 3, 4, true,  false, AM_ABS_X },
-        [0x59] = { "EOR", EOR, 3, 4, false, false, AM_ABS_Y },
+        [0x59] = { "EOR", EOR, 3, 4, true,  false, AM_ABS_Y },
-        [0x41] = { "EOR", EOR, 2, 6, false, false, AM_IND_X },
+        [0x41] = { "EOR", EOR, 2, 6, true,  false, AM_IND_X },
-        [0x51] = { "EOR", EOR, 2, 5, false, false, AM_IND_Y },
+        [0x51] = { "EOR", EOR, 2, 5, true,  false, AM_IND_Y },
        [0xE6] = { "INC", INC, 2, 5, false, true, AM_ZP },
        [0xF6] = { "INC", INC, 2, 6, false, true, AM_ZP_X },
        [0xEE] = { "INC", INC, 3, 6, false, true, AM_ABS },
@@ -107,13 +107,13 @@ struct opcode opcodes[0x100] = {
        [0x6C] = { "JMP", JMP, 3, 5, false, false, AM_IND },
        [0x20] = { "JSR", JSR, 3, 6, false, false, AM_ABS },
        [0xA9] = { "LDA", LDA, 2, 2, false, false, AM_IMM },
-        [0xA5] = { "LDA", LDA, 2, 3, true, false, AM_ZP },
+        [0xA5] = { "LDA", LDA, 2, 3, true,  false, AM_ZP },
-        [0xB5] = { "LDA", LDA, 2, 4, true, false, AM_ZP_X },
+        [0xB5] = { "LDA", LDA, 2, 4, true,  false, AM_ZP_X },
-        [0xAD] = { "LDA", LDA, 3, 4, true, false, AM_ABS },
+        [0xAD] = { "LDA", LDA, 3, 4, true,  false, AM_ABS },
-        [0xBD] = { "LDA", LDA, 3, 4, true, false, AM_ABS_X },
+        [0xBD] = { "LDA", LDA, 3, 4, true,  false, AM_ABS_X },
-        [0xB9] = { "LDA", LDA, 3, 4, true, false, AM_ABS_Y },
+        [0xB9] = { "LDA", LDA, 3, 4, true,  false, AM_ABS_Y },
-        [0xA1] = { "LDA", LDA, 2, 6, true, false, AM_IND_X },
+        [0xA1] = { "LDA", LDA, 2, 6, true,  false, AM_IND_X },
-        [0xB1] = { "LDA", LDA, 2, 5, true, false, AM_IND_Y },
+        [0xB1] = { "LDA", LDA, 2, 5, true,  false, AM_IND_Y },
        [0xA2] = { "LDX", LDX, 2, 2, false, false, AM_IMM },
        [0xA6] = { "LDX", LDX, 2, 3, true,  false, AM_ZP },
        [0xB6] = { "LDX", LDX, 2, 4, true,  false, AM_ZP_Y },
@@ -131,13 +131,13 @@ struct opcode opcodes[0x100] = {
        [0x5E] = { "LSR", LSR, 3, 7, false, true, AM_ABS_X },
        [0xEA] = { "NOP", NOP, 1, 2, false, false, AM_NONE },
        [0x09] = { "ORA", ORA, 2, 2, false, false, AM_IMM },
-        [0x05] = { "ORA", ORA, 2, 3, false, false, AM_ZP },
+        [0x05] = { "ORA", ORA, 2, 3, true,  false, AM_ZP },
-        [0x15] = { "ORA", ORA, 2, 4, false, false, AM_ZP_X },
+        [0x15] = { "ORA", ORA, 2, 4, true,  false, AM_ZP_X },
-        [0x0D] = { "ORA", ORA, 3, 4, false, false, AM_ABS },
+        [0x0D] = { "ORA", ORA, 3, 4, true,  false, AM_ABS },
-        [0x1D] = { "ORA", ORA, 3, 4, false, false, AM_ABS_X },
+        [0x1D] = { "ORA", ORA, 3, 4, true,  false, AM_ABS_X },
-        [0x19] = { "ORA", ORA, 3, 4, false, false, AM_ABS_Y },
+        [0x19] = { "ORA", ORA, 3, 4, true,  false, AM_ABS_Y },
-        [0x01] = { "ORA", ORA, 2, 6, false, false, AM_IND_X },
+        [0x01] = { "ORA", ORA, 2, 6, true,  false, AM_IND_X },
-        [0x11] = { "ORA", ORA, 2, 5, false, false, AM_IND_Y },
+        [0x11] = { "ORA", ORA, 2, 5, true,  false, AM_IND_Y },
        [0x48] = { "PHA", PHA, 1, 3, false, false, AM_NONE },
        [0x08] = { "PHP", PHP, 1, 3, false, false, AM_NONE },
        [0x68] = { "PLA", PLA, 1, 4, false, false, AM_NONE },
@@ -155,13 +155,13 @@ struct opcode opcodes[0x100] = {
        [0x40] = { "RTI", RTI, 1, 6, false, false, AM_NONE },
        [0x60] = { "RTS", RTS, 1, 6, false, false, AM_NONE },
        [0xE9] = { "SBC", SBC, 2, 2, false, false, AM_IMM },
-        [0xE5] = { "SBC", SBC, 2, 3, false, false, AM_ZP },
+        [0xE5] = { "SBC", SBC, 2, 3, true,  false, AM_ZP },
-        [0xF5] = { "SBC", SBC, 2, 4, false, false, AM_ZP_X },
+        [0xF5] = { "SBC", SBC, 2, 4, true,  false, AM_ZP_X },
-        [0xED] = { "SBC", SBC, 3, 4, false, false, AM_ABS },
+        [0xED] = { "SBC", SBC, 3, 4, true,  false, AM_ABS },
-        [0xFD] = { "SBC", SBC, 3, 4, false, false, AM_ABS_X },
+        [0xFD] = { "SBC", SBC, 3, 4, true,  false, AM_ABS_X },
-        [0xF9] = { "SBC", SBC, 3, 4, false, false, AM_ABS_Y },
+        [0xF9] = { "SBC", SBC, 3, 4, true,  false, AM_ABS_Y },
-        [0xE1] = { "SBC", SBC, 2, 6, false, false, AM_IND_X },
+        [0xE1] = { "SBC", SBC, 2, 6, true,  false, AM_IND_X },
-        [0xF1] = { "SBC", SBC, 2, 5, false, false, AM_IND_Y },
+        [0xF1] = { "SBC", SBC, 2, 5, true,  false, AM_IND_Y },
        [0x38] = { "SEC", SEC, 1, 2, false, false, AM_NONE },
        [0xF8] = { "SED", SED, 1, 2, false, false, AM_NONE },
        [0x78] = { "SEI", SEI, 1, 2, false, false, AM_NONE },
author	vin <git@vineetk.net>	2024-07-03 21:02:34 -0400
committer	vin <git@vineetk.net>	2024-07-03 21:49:27 -0400
commit	d57acb77c7d617fbfe4e0c2fb6d19e1b60723a97 (patch)
tree	547290156af8388d263ae37ed815a9fe914a4768
parent	4fcc8d48f4dd3f7be37d917826a148c02701d0e3 (diff)

diff --git a/cpu.c b/cpu.c index bba0ed5..31f4be2 100644 --- a/cpu.c +++ b/cpu.c
@@ -622,21 +622,18 @@ SEI(uint16_t arg)
622	void	622	void
623	STA(uint16_t mem)	623	STA(uint16_t mem)
624	{	624	{
625	uint8_t tmp = peek(mem);
626	memwrite(mem, regs.a);	625	memwrite(mem, regs.a);
627	}	626	}
628		627
629	void	628	void
630	STX(uint16_t mem)	629	STX(uint16_t mem)
631	{	630	{
632	uint8_t tmp = peek(mem);
633	memwrite(mem, regs.x);	631	memwrite(mem, regs.x);
634	}	632	}
635		633
636	void	634	void
637	STY(uint16_t mem)	635	STY(uint16_t mem)
638	{	636	{
639	uint8_t tmp = peek(mem);
640	memwrite(mem, regs.y);	637	memwrite(mem, regs.y);
641	}	638	}
642		639
@@ -728,13 +725,19 @@ interpret(void)
728	printf("$%04X", arg);	725	printf("$%04X", arg);
729	break;	726	break;
730	case AM_ABS_X:	727	case AM_ABS_X:
731	printf("$%04X,X @ %04X", arg - regs.x, arg);	728	printf("$%04X,X @ %04X", (uint16_t)(arg - regs.x), arg);
732	break;	729	break;
733	case AM_ABS_Y:	730	case AM_ABS_Y:
734	printf("$%04X,Y @ %04X", arg - regs.y, arg);	731	printf("$%04X,Y @ %04X", (uint16_t)(arg - regs.y), arg);
735	break;	732	break;
736	case AM_IND:	733	case AM_IND:
737	printf("($%04X) = %04X\t\t", arg, peek16(arg));	734	printf("($%04X) = %04X", arg, peek16(arg));
		735	break;
		736	case AM_IND_X:
		737	printf("($%02X,X) @ %02X = %04X", peek(regs.pc - 1), peek(regs.pc - 1) + regs.x, arg);
		738	break;
		739	case AM_IND_Y:
		740	printf("($%02X),Y = %04X @ %04X", peek(regs.pc - 1), (uint16_t)(arg - regs.y), arg);
738	break;	741	break;
739	case AM_ACC:	742	case AM_ACC:
740	case AM_NONE:	743	case AM_NONE:
@@ -748,9 +751,10 @@ interpret(void)
748	if (opcodes[op].memread \|\| opcodes[op].memwrite)	751	if (opcodes[op].memread \|\| opcodes[op].memwrite)
749	printf(" = %02X", peek(arg));	752	printf(" = %02X", peek(arg));
750		753
751	if (mode != AM_ABS_X && mode != AM_ABS_Y)	754	if (mode != AM_IND && mode != AM_ABS_X && mode != AM_ABS_Y)
752	putchar('\t');	755	putchar('\t');
753	printf("\t\t");	756	if (mode != AM_IND_X && mode != AM_IND_Y)
		757	printf("\t\t");
754		758
755	printf("A:%02X X:%02X Y:%02X P:%02X SP:%02X CYC:%d\n",	759	printf("A:%02X X:%02X Y:%02X P:%02X SP:%02X CYC:%d\n",
756	regs.a, regs.x, regs.y, STATUS_TO_INT(), regs.sp, cycles);	760	regs.a, regs.x, regs.y, STATUS_TO_INT(), regs.sp, cycles);


diff --git a/opcodes.h b/opcodes.h index 02b30e7..4c34bb4 100644 --- a/opcodes.h +++ b/opcodes.h
@@ -34,21 +34,21 @@ struct opcode {
34	struct opcode opcodes[0x100] = {	34	struct opcode opcodes[0x100] = {
35	/* official opcodes */	35	/* official opcodes */
36	[0x69] = { "ADC", ADC, 2, 2, false, false, AM_IMM },	36	[0x69] = { "ADC", ADC, 2, 2, false, false, AM_IMM },
37	[0x65] = { "ADC", ADC, 2, 3, false, false, AM_ZP },	37	[0x65] = { "ADC", ADC, 2, 3, true, false, AM_ZP },
38	[0x75] = { "ADC", ADC, 2, 4, false, false, AM_ZP_X },	38	[0x75] = { "ADC", ADC, 2, 4, true, false, AM_ZP_X },
39	[0x6D] = { "ADC", ADC, 3, 4, false, false, AM_ABS },	39	[0x6D] = { "ADC", ADC, 3, 4, true, false, AM_ABS },
40	[0x7D] = { "ADC", ADC, 3, 4, false, false, AM_ABS_X },	40	[0x7D] = { "ADC", ADC, 3, 4, true, false, AM_ABS_X },
41	[0x79] = { "ADC", ADC, 3, 4, false, false, AM_ABS_Y },	41	[0x79] = { "ADC", ADC, 3, 4, true, false, AM_ABS_Y },
42	[0x61] = { "ADC", ADC, 2, 6, false, false, AM_IND_X },	42	[0x61] = { "ADC", ADC, 2, 6, true, false, AM_IND_X },
43	[0x71] = { "ADC", ADC, 2, 5, false, false, AM_IND_Y },	43	[0x71] = { "ADC", ADC, 2, 5, true, false, AM_IND_Y },
44	[0x29] = { "AND", AND, 2, 2, false, false, AM_IMM },	44	[0x29] = { "AND", AND, 2, 2, false, false, AM_IMM },
45	[0x25] = { "AND", AND, 2, 3, false, false, AM_ZP },	45	[0x25] = { "AND", AND, 2, 3, true, false, AM_ZP },
46	[0x35] = { "AND", AND, 2, 4, false, false, AM_ZP_X },	46	[0x35] = { "AND", AND, 2, 4, true, false, AM_ZP_X },
47	[0x2D] = { "AND", AND, 3, 4, false, false, AM_ABS },	47	[0x2D] = { "AND", AND, 3, 4, true, false, AM_ABS },
48	[0x3D] = { "AND", AND, 3, 4, false, false, AM_ABS_X },	48	[0x3D] = { "AND", AND, 3, 4, true, false, AM_ABS_X },
49	[0x39] = { "AND", AND, 3, 4, false, false, AM_ABS_Y },	49	[0x39] = { "AND", AND, 3, 4, true, false, AM_ABS_Y },
50	[0x21] = { "AND", AND, 2, 6, false, false, AM_IND_X },	50	[0x21] = { "AND", AND, 2, 6, true, false, AM_IND_X },
51	[0x31] = { "AND", AND, 2, 5, false, false, AM_IND_Y },	51	[0x31] = { "AND", AND, 2, 5, true, false, AM_IND_Y },
52	[0x0A] = { "ASL", ASL_acc, 1, 2, false, false, AM_ACC },	52	[0x0A] = { "ASL", ASL_acc, 1, 2, false, false, AM_ACC },
53	[0x06] = { "ASL", ASL, 2, 5, false, true, AM_ZP },	53	[0x06] = { "ASL", ASL, 2, 5, false, true, AM_ZP },
54	[0x16] = { "ASL", ASL, 2, 6, false, true, AM_ZP_X },	54	[0x16] = { "ASL", ASL, 2, 6, false, true, AM_ZP_X },
@@ -70,19 +70,19 @@ struct opcode opcodes[0x100] = {
70	[0x58] = { "CLI", CLI, 1, 2, false, false, AM_NONE },	70	[0x58] = { "CLI", CLI, 1, 2, false, false, AM_NONE },
71	[0xB8] = { "CLV", CLV, 1, 2, false, false, AM_NONE },	71	[0xB8] = { "CLV", CLV, 1, 2, false, false, AM_NONE },
72	[0xC9] = { "CMP", CMP, 2, 2, false, false, AM_IMM },	72	[0xC9] = { "CMP", CMP, 2, 2, false, false, AM_IMM },
73	[0xC5] = { "CMP", CMP, 2, 3, false, false, AM_ZP },	73	[0xC5] = { "CMP", CMP, 2, 3, true, false, AM_ZP },
74	[0xD5] = { "CMP", CMP, 2, 4, false, false, AM_ZP_X },	74	[0xD5] = { "CMP", CMP, 2, 4, true, false, AM_ZP_X },
75	[0xCD] = { "CMP", CMP, 3, 4, false, false, AM_ABS },	75	[0xCD] = { "CMP", CMP, 3, 4, true, false, AM_ABS },
76	[0xDD] = { "CMP", CMP, 3, 4, false, false, AM_ABS_X },	76	[0xDD] = { "CMP", CMP, 3, 4, true, false, AM_ABS_X },
77	[0xD9] = { "CMP", CMP, 3, 4, false, false, AM_ABS_Y },	77	[0xD9] = { "CMP", CMP, 3, 4, true, false, AM_ABS_Y },
78	[0xC1] = { "CMP", CMP, 2, 6, false, false, AM_IND_X },	78	[0xC1] = { "CMP", CMP, 2, 6, true, false, AM_IND_X },
79	[0xD1] = { "CMP", CMP, 2, 5, false, false, AM_IND_Y },	79	[0xD1] = { "CMP", CMP, 2, 5, true, false, AM_IND_Y },
80	[0xE0] = { "CPX", CPX, 2, 2, false, false, AM_IMM },	80	[0xE0] = { "CPX", CPX, 2, 2, false, false, AM_IMM },
81	[0xE4] = { "CPX", CPX, 2, 3, false, false, AM_ZP },	81	[0xE4] = { "CPX", CPX, 2, 3, true, false, AM_ZP },
82	[0xEC] = { "CPX", CPX, 3, 4, false, false, AM_ABS },	82	[0xEC] = { "CPX", CPX, 3, 4, true, false, AM_ABS },
83	[0xC0] = { "CPY", CPY, 2, 2, false, false, AM_IMM },	83	[0xC0] = { "CPY", CPY, 2, 2, false, false, AM_IMM },
84	[0xC4] = { "CPY", CPY, 2, 3, false, false, AM_ZP },	84	[0xC4] = { "CPY", CPY, 2, 3, true, false, AM_ZP },
85	[0xCC] = { "CPY", CPY, 3, 4, false, false, AM_ABS },	85	[0xCC] = { "CPY", CPY, 3, 4, true, false, AM_ABS },
86	[0xC6] = { "DEC", DEC, 2, 5, false, true, AM_ZP },	86	[0xC6] = { "DEC", DEC, 2, 5, false, true, AM_ZP },
87	[0xD6] = { "DEC", DEC, 2, 6, false, true, AM_ZP_X },	87	[0xD6] = { "DEC", DEC, 2, 6, false, true, AM_ZP_X },
88	[0xCE] = { "DEC", DEC, 3, 6, false, true, AM_ABS },	88	[0xCE] = { "DEC", DEC, 3, 6, false, true, AM_ABS },
@@ -90,13 +90,13 @@ struct opcode opcodes[0x100] = {
90	[0xCA] = { "DEX", DEX, 1, 2, false, false, AM_NONE },	90	[0xCA] = { "DEX", DEX, 1, 2, false, false, AM_NONE },
91	[0x88] = { "DEY", DEY, 1, 2, false, false, AM_NONE },	91	[0x88] = { "DEY", DEY, 1, 2, false, false, AM_NONE },
92	[0x49] = { "EOR", EOR, 2, 2, false, false, AM_IMM },	92	[0x49] = { "EOR", EOR, 2, 2, false, false, AM_IMM },
93	[0x45] = { "EOR", EOR, 2, 3, false, false, AM_ZP },	93	[0x45] = { "EOR", EOR, 2, 3, true, false, AM_ZP },
94	[0x55] = { "EOR", EOR, 2, 4, false, false, AM_ZP_X },	94	[0x55] = { "EOR", EOR, 2, 4, true, false, AM_ZP_X },
95	[0x4D] = { "EOR", EOR, 3, 4, false, false, AM_ABS },	95	[0x4D] = { "EOR", EOR, 3, 4, true, false, AM_ABS },
96	[0x5D] = { "EOR", EOR, 3, 4, false, false, AM_ABS_X },	96	[0x5D] = { "EOR", EOR, 3, 4, true, false, AM_ABS_X },
97	[0x59] = { "EOR", EOR, 3, 4, false, false, AM_ABS_Y },	97	[0x59] = { "EOR", EOR, 3, 4, true, false, AM_ABS_Y },
98	[0x41] = { "EOR", EOR, 2, 6, false, false, AM_IND_X },	98	[0x41] = { "EOR", EOR, 2, 6, true, false, AM_IND_X },
99	[0x51] = { "EOR", EOR, 2, 5, false, false, AM_IND_Y },	99	[0x51] = { "EOR", EOR, 2, 5, true, false, AM_IND_Y },
100	[0xE6] = { "INC", INC, 2, 5, false, true, AM_ZP },	100	[0xE6] = { "INC", INC, 2, 5, false, true, AM_ZP },
101	[0xF6] = { "INC", INC, 2, 6, false, true, AM_ZP_X },	101	[0xF6] = { "INC", INC, 2, 6, false, true, AM_ZP_X },
102	[0xEE] = { "INC", INC, 3, 6, false, true, AM_ABS },	102	[0xEE] = { "INC", INC, 3, 6, false, true, AM_ABS },
@@ -107,13 +107,13 @@ struct opcode opcodes[0x100] = {
107	[0x6C] = { "JMP", JMP, 3, 5, false, false, AM_IND },	107	[0x6C] = { "JMP", JMP, 3, 5, false, false, AM_IND },
108	[0x20] = { "JSR", JSR, 3, 6, false, false, AM_ABS },	108	[0x20] = { "JSR", JSR, 3, 6, false, false, AM_ABS },
109	[0xA9] = { "LDA", LDA, 2, 2, false, false, AM_IMM },	109	[0xA9] = { "LDA", LDA, 2, 2, false, false, AM_IMM },
110	[0xA5] = { "LDA", LDA, 2, 3, true, false, AM_ZP },	110	[0xA5] = { "LDA", LDA, 2, 3, true, false, AM_ZP },
111	[0xB5] = { "LDA", LDA, 2, 4, true, false, AM_ZP_X },	111	[0xB5] = { "LDA", LDA, 2, 4, true, false, AM_ZP_X },
112	[0xAD] = { "LDA", LDA, 3, 4, true, false, AM_ABS },	112	[0xAD] = { "LDA", LDA, 3, 4, true, false, AM_ABS },
113	[0xBD] = { "LDA", LDA, 3, 4, true, false, AM_ABS_X },	113	[0xBD] = { "LDA", LDA, 3, 4, true, false, AM_ABS_X },
114	[0xB9] = { "LDA", LDA, 3, 4, true, false, AM_ABS_Y },	114	[0xB9] = { "LDA", LDA, 3, 4, true, false, AM_ABS_Y },
115	[0xA1] = { "LDA", LDA, 2, 6, true, false, AM_IND_X },	115	[0xA1] = { "LDA", LDA, 2, 6, true, false, AM_IND_X },
116	[0xB1] = { "LDA", LDA, 2, 5, true, false, AM_IND_Y },	116	[0xB1] = { "LDA", LDA, 2, 5, true, false, AM_IND_Y },
117	[0xA2] = { "LDX", LDX, 2, 2, false, false, AM_IMM },	117	[0xA2] = { "LDX", LDX, 2, 2, false, false, AM_IMM },
118	[0xA6] = { "LDX", LDX, 2, 3, true, false, AM_ZP },	118	[0xA6] = { "LDX", LDX, 2, 3, true, false, AM_ZP },
119	[0xB6] = { "LDX", LDX, 2, 4, true, false, AM_ZP_Y },	119	[0xB6] = { "LDX", LDX, 2, 4, true, false, AM_ZP_Y },
@@ -131,13 +131,13 @@ struct opcode opcodes[0x100] = {
131	[0x5E] = { "LSR", LSR, 3, 7, false, true, AM_ABS_X },	131	[0x5E] = { "LSR", LSR, 3, 7, false, true, AM_ABS_X },
132	[0xEA] = { "NOP", NOP, 1, 2, false, false, AM_NONE },	132	[0xEA] = { "NOP", NOP, 1, 2, false, false, AM_NONE },
133	[0x09] = { "ORA", ORA, 2, 2, false, false, AM_IMM },	133	[0x09] = { "ORA", ORA, 2, 2, false, false, AM_IMM },
134	[0x05] = { "ORA", ORA, 2, 3, false, false, AM_ZP },	134	[0x05] = { "ORA", ORA, 2, 3, true, false, AM_ZP },
135	[0x15] = { "ORA", ORA, 2, 4, false, false, AM_ZP_X },	135	[0x15] = { "ORA", ORA, 2, 4, true, false, AM_ZP_X },
136	[0x0D] = { "ORA", ORA, 3, 4, false, false, AM_ABS },	136	[0x0D] = { "ORA", ORA, 3, 4, true, false, AM_ABS },
137	[0x1D] = { "ORA", ORA, 3, 4, false, false, AM_ABS_X },	137	[0x1D] = { "ORA", ORA, 3, 4, true, false, AM_ABS_X },
138	[0x19] = { "ORA", ORA, 3, 4, false, false, AM_ABS_Y },	138	[0x19] = { "ORA", ORA, 3, 4, true, false, AM_ABS_Y },
139	[0x01] = { "ORA", ORA, 2, 6, false, false, AM_IND_X },	139	[0x01] = { "ORA", ORA, 2, 6, true, false, AM_IND_X },
140	[0x11] = { "ORA", ORA, 2, 5, false, false, AM_IND_Y },	140	[0x11] = { "ORA", ORA, 2, 5, true, false, AM_IND_Y },
141	[0x48] = { "PHA", PHA, 1, 3, false, false, AM_NONE },	141	[0x48] = { "PHA", PHA, 1, 3, false, false, AM_NONE },
142	[0x08] = { "PHP", PHP, 1, 3, false, false, AM_NONE },	142	[0x08] = { "PHP", PHP, 1, 3, false, false, AM_NONE },
143	[0x68] = { "PLA", PLA, 1, 4, false, false, AM_NONE },	143	[0x68] = { "PLA", PLA, 1, 4, false, false, AM_NONE },
@@ -155,13 +155,13 @@ struct opcode opcodes[0x100] = {
155	[0x40] = { "RTI", RTI, 1, 6, false, false, AM_NONE },	155	[0x40] = { "RTI", RTI, 1, 6, false, false, AM_NONE },
156	[0x60] = { "RTS", RTS, 1, 6, false, false, AM_NONE },	156	[0x60] = { "RTS", RTS, 1, 6, false, false, AM_NONE },
157	[0xE9] = { "SBC", SBC, 2, 2, false, false, AM_IMM },	157	[0xE9] = { "SBC", SBC, 2, 2, false, false, AM_IMM },
158	[0xE5] = { "SBC", SBC, 2, 3, false, false, AM_ZP },	158	[0xE5] = { "SBC", SBC, 2, 3, true, false, AM_ZP },
159	[0xF5] = { "SBC", SBC, 2, 4, false, false, AM_ZP_X },	159	[0xF5] = { "SBC", SBC, 2, 4, true, false, AM_ZP_X },
160	[0xED] = { "SBC", SBC, 3, 4, false, false, AM_ABS },	160	[0xED] = { "SBC", SBC, 3, 4, true, false, AM_ABS },
161	[0xFD] = { "SBC", SBC, 3, 4, false, false, AM_ABS_X },	161	[0xFD] = { "SBC", SBC, 3, 4, true, false, AM_ABS_X },
162	[0xF9] = { "SBC", SBC, 3, 4, false, false, AM_ABS_Y },	162	[0xF9] = { "SBC", SBC, 3, 4, true, false, AM_ABS_Y },
163	[0xE1] = { "SBC", SBC, 2, 6, false, false, AM_IND_X },	163	[0xE1] = { "SBC", SBC, 2, 6, true, false, AM_IND_X },
164	[0xF1] = { "SBC", SBC, 2, 5, false, false, AM_IND_Y },	164	[0xF1] = { "SBC", SBC, 2, 5, true, false, AM_IND_Y },
165	[0x38] = { "SEC", SEC, 1, 2, false, false, AM_NONE },	165	[0x38] = { "SEC", SEC, 1, 2, false, false, AM_NONE },
166	[0xF8] = { "SED", SED, 1, 2, false, false, AM_NONE },	166	[0xF8] = { "SED", SED, 1, 2, false, false, AM_NONE },
167	[0x78] = { "SEI", SEI, 1, 2, false, false, AM_NONE },	167	[0x78] = { "SEI", SEI, 1, 2, false, false, AM_NONE },