diff options
| author | vin <git@vineetk.net> | 2024-06-09 12:56:13 +0530 |
|---|---|---|
| committer | vin <git@vineetk.net> | 2024-06-09 13:08:31 +0530 |
| commit | 207c6903f57f2364770c466dbe9807581ef96dc5 (patch) | |
| tree | 6e02fe40c7a404902bd8b578c3614c26a447cdc4 /cpu.c | |
| parent | 72e29b3d25bfe93810b3faf3133dfc3c15f15e14 (diff) | |
programmatically create switch cases for opcodes based on opcode json
The JSON is from https://github.com/ericTheEchidna/65C02-JSON/ and
saved me a lot of time from writing the cases for each opcode by hand.
Diffstat (limited to 'cpu.c')
| -rw-r--r-- | cpu.c | 1046 |
1 files changed, 1011 insertions, 35 deletions
| @@ -49,6 +49,8 @@ uint8_t memory[0x16000]; | |||
| 49 | /* example program taken from https://bugzmanov.github.io/nes_ebook/chapter_3_1.html */ | 49 | /* example program taken from https://bugzmanov.github.io/nes_ebook/chapter_3_1.html */ |
| 50 | uint8_t program[] = { 0xa9, 0xc0, 0xaa, 0xe8, 0x00 }; | 50 | uint8_t program[] = { 0xa9, 0xc0, 0xaa, 0xe8, 0x00 }; |
| 51 | 51 | ||
| 52 | uint32_t cycles = 0; | ||
| 53 | |||
| 52 | uint8_t | 54 | uint8_t |
| 53 | peek(uint16_t addr) | 55 | peek(uint16_t addr) |
| 54 | { | 56 | { |
| @@ -63,7 +65,7 @@ peek16(uint16_t addr) | |||
| 63 | } | 65 | } |
| 64 | 66 | ||
| 65 | uint8_t | 67 | uint8_t |
| 66 | opmode_arg(enum addressing_mode mode) | 68 | opcode_arg(enum addressing_mode mode) |
| 67 | { | 69 | { |
| 68 | uint8_t arg, val; | 70 | uint8_t arg, val; |
| 69 | 71 | ||
| @@ -124,6 +126,13 @@ adc(uint8_t arg) | |||
| 124 | } | 126 | } |
| 125 | 127 | ||
| 126 | void | 128 | void |
| 129 | sbc(uint8_t arg) | ||
| 130 | { | ||
| 131 | /* SBC is described online as ADC with argument as two's complement */ | ||
| 132 | adc(~arg + 1); | ||
| 133 | } | ||
| 134 | |||
| 135 | void | ||
| 127 | brk(void) | 136 | brk(void) |
| 128 | { | 137 | { |
| 129 | /* $00 */ | 138 | /* $00 */ |
| @@ -173,62 +182,1029 @@ interpret(void) | |||
| 173 | printf("opcode: $%02X\n", opcode); | 182 | printf("opcode: $%02X\n", opcode); |
| 174 | 183 | ||
| 175 | switch (opcode) { | 184 | switch (opcode) { |
| 176 | case 0x00: | 185 | case 0x69: |
| 177 | brk(); | 186 | adc(opcode_arg(AM_IMM)); |
| 178 | return; | 187 | cycles += 2; |
| 179 | case 0x61: | ||
| 180 | adc(opmode_arg(AM_IND_X)); | ||
| 181 | break; | 188 | break; |
| 182 | case 0x65: | 189 | case 0x65: |
| 183 | adc(opmode_arg(AM_ZP)); | 190 | adc(opcode_arg(AM_ZP)); |
| 191 | cycles += 3; | ||
| 184 | break; | 192 | break; |
| 185 | case 0x69: | 193 | case 0x75: |
| 186 | adc(opmode_arg(AM_IMM)); | 194 | adc(opcode_arg(AM_ZP_X)); |
| 195 | cycles += 4; | ||
| 196 | break; | ||
| 197 | case 0x6d: | ||
| 198 | adc(opcode_arg(AM_ABS)); | ||
| 199 | cycles += 4; | ||
| 187 | break; | 200 | break; |
| 188 | case 0x6D: | 201 | case 0x7d: |
| 189 | adc(opmode_arg(AM_ABS)); | 202 | adc(opcode_arg(AM_ABS_X)); |
| 203 | cycles += 4; | ||
| 204 | break; | ||
| 205 | case 0x79: | ||
| 206 | adc(opcode_arg(AM_ABS_Y)); | ||
| 207 | cycles += 4; | ||
| 208 | break; | ||
| 209 | case 0x72: | ||
| 210 | adc(opcode_arg(AM_IND)); | ||
| 211 | cycles += 5; | ||
| 212 | break; | ||
| 213 | case 0x61: | ||
| 214 | adc(opcode_arg(AM_IND_X)); | ||
| 215 | cycles += 6; | ||
| 190 | break; | 216 | break; |
| 191 | case 0x71: | 217 | case 0x71: |
| 192 | adc(opmode_arg(AM_IND_Y)); | 218 | adc(opcode_arg(AM_IND_Y)); |
| 219 | cycles += 5; | ||
| 193 | break; | 220 | break; |
| 194 | case 0x75: | 221 | case 0x29: |
| 195 | adc(opmode_arg(AM_ZP_X)); | 222 | and(opcode_arg(AM_IMM)); |
| 223 | cycles += 2; | ||
| 196 | break; | 224 | break; |
| 197 | case 0x79: | 225 | case 0x25: |
| 198 | adc(opmode_arg(AM_ABS_Y)); | 226 | and(opcode_arg(AM_ZP)); |
| 227 | cycles += 3; | ||
| 199 | break; | 228 | break; |
| 200 | case 0x7D: | 229 | case 0x35: |
| 201 | adc(opmode_arg(AM_ABS_X)); | 230 | and(opcode_arg(AM_ZP_X)); |
| 231 | cycles += 4; | ||
| 202 | break; | 232 | break; |
| 203 | case 0xa1: | 233 | case 0x2d: |
| 204 | lda(opmode_arg(AM_IND_X)); | 234 | and(opcode_arg(AM_ABS)); |
| 235 | cycles += 4; | ||
| 205 | break; | 236 | break; |
| 206 | case 0xa5: | 237 | case 0x3d: |
| 207 | lda(opmode_arg(AM_ZP)); | 238 | and(opcode_arg(AM_ABS_X)); |
| 239 | cycles += 4; | ||
| 240 | break; | ||
| 241 | case 0x39: | ||
| 242 | and(opcode_arg(AM_ABS_Y)); | ||
| 243 | cycles += 4; | ||
| 244 | break; | ||
| 245 | case 0x32: | ||
| 246 | and(opcode_arg(AM_IND)); | ||
| 247 | cycles += 5; | ||
| 248 | break; | ||
| 249 | case 0x21: | ||
| 250 | and(opcode_arg(AM_IND_X)); | ||
| 251 | cycles += 6; | ||
| 252 | break; | ||
| 253 | case 0x31: | ||
| 254 | and(opcode_arg(AM_IND_Y)); | ||
| 255 | cycles += 5; | ||
| 256 | break; | ||
| 257 | case 0x0a: | ||
| 258 | asl(opcode_arg(AM_ACC)); | ||
| 259 | cycles += 2; | ||
| 260 | break; | ||
| 261 | case 0x06: | ||
| 262 | asl(opcode_arg(AM_ZP)); | ||
| 263 | cycles += 5; | ||
| 264 | break; | ||
| 265 | case 0x16: | ||
| 266 | asl(opcode_arg(AM_ZP_X)); | ||
| 267 | cycles += 6; | ||
| 268 | break; | ||
| 269 | case 0x0e: | ||
| 270 | asl(opcode_arg(AM_ABS)); | ||
| 271 | cycles += 6; | ||
| 272 | break; | ||
| 273 | case 0x1e: | ||
| 274 | asl(opcode_arg(AM_ABS_X)); | ||
| 275 | cycles += 6; | ||
| 276 | break; | ||
| 277 | case 0x0f: | ||
| 278 | bbr(opcode_arg(AM_REL)); | ||
| 279 | cycles += 4; | ||
| 280 | break; | ||
| 281 | case 0x1f: | ||
| 282 | bbr(opcode_arg(AM_REL)); | ||
| 283 | cycles += 4; | ||
| 284 | break; | ||
| 285 | case 0x2f: | ||
| 286 | bbr(opcode_arg(AM_REL)); | ||
| 287 | cycles += 4; | ||
| 288 | break; | ||
| 289 | case 0x3f: | ||
| 290 | bbr(opcode_arg(AM_REL)); | ||
| 291 | cycles += 4; | ||
| 292 | break; | ||
| 293 | case 0x4f: | ||
| 294 | bbr(opcode_arg(AM_REL)); | ||
| 295 | cycles += 4; | ||
| 296 | break; | ||
| 297 | case 0x5f: | ||
| 298 | bbr(opcode_arg(AM_REL)); | ||
| 299 | cycles += 4; | ||
| 300 | break; | ||
| 301 | case 0x6f: | ||
| 302 | bbr(opcode_arg(AM_REL)); | ||
| 303 | cycles += 4; | ||
| 304 | break; | ||
| 305 | case 0x7f: | ||
| 306 | bbr(opcode_arg(AM_REL)); | ||
| 307 | cycles += 4; | ||
| 308 | break; | ||
| 309 | case 0x8f: | ||
| 310 | bbs(opcode_arg(AM_REL)); | ||
| 311 | cycles += 4; | ||
| 312 | break; | ||
| 313 | case 0x9f: | ||
| 314 | bbs(opcode_arg(AM_REL)); | ||
| 315 | cycles += 4; | ||
| 316 | break; | ||
| 317 | case 0xaf: | ||
| 318 | bbs(opcode_arg(AM_REL)); | ||
| 319 | cycles += 4; | ||
| 320 | break; | ||
| 321 | case 0xbf: | ||
| 322 | bbs(opcode_arg(AM_REL)); | ||
| 323 | cycles += 4; | ||
| 324 | break; | ||
| 325 | case 0xcf: | ||
| 326 | bbs(opcode_arg(AM_REL)); | ||
| 327 | cycles += 4; | ||
| 328 | break; | ||
| 329 | case 0xdf: | ||
| 330 | bbs(opcode_arg(AM_REL)); | ||
| 331 | cycles += 4; | ||
| 332 | break; | ||
| 333 | case 0xef: | ||
| 334 | bbs(opcode_arg(AM_REL)); | ||
| 335 | cycles += 4; | ||
| 336 | break; | ||
| 337 | case 0xff: | ||
| 338 | bbs(opcode_arg(AM_REL)); | ||
| 339 | cycles += 4; | ||
| 340 | break; | ||
| 341 | case 0x90: | ||
| 342 | bcc(opcode_arg(AM_IMM)); | ||
| 343 | cycles += 2; | ||
| 344 | break; | ||
| 345 | case 0xb0: | ||
| 346 | bcs(opcode_arg(AM_IMM)); | ||
| 347 | cycles += 2; | ||
| 348 | break; | ||
| 349 | case 0xf0: | ||
| 350 | beq(opcode_arg(AM_IMM)); | ||
| 351 | cycles += 2; | ||
| 352 | break; | ||
| 353 | case 0x89: | ||
| 354 | bit(opcode_arg(AM_IMM)); | ||
| 355 | cycles += 2; | ||
| 356 | break; | ||
| 357 | case 0x24: | ||
| 358 | bit(opcode_arg(AM_ZP)); | ||
| 359 | cycles += 3; | ||
| 360 | break; | ||
| 361 | case 0x34: | ||
| 362 | bit(opcode_arg(AM_ZP_X)); | ||
| 363 | cycles += 4; | ||
| 364 | break; | ||
| 365 | case 0x2c: | ||
| 366 | bit(opcode_arg(AM_ABS)); | ||
| 367 | cycles += 4; | ||
| 368 | break; | ||
| 369 | case 0x3c: | ||
| 370 | bit(opcode_arg(AM_ABS_X)); | ||
| 371 | cycles += 4; | ||
| 372 | break; | ||
| 373 | case 0x30: | ||
| 374 | bmi(opcode_arg(AM_IMM)); | ||
| 375 | cycles += 2; | ||
| 376 | break; | ||
| 377 | case 0xd0: | ||
| 378 | bne(opcode_arg(AM_IMM)); | ||
| 379 | cycles += 2; | ||
| 380 | break; | ||
| 381 | case 0x10: | ||
| 382 | bpl(opcode_arg(AM_IMM)); | ||
| 383 | cycles += 2; | ||
| 384 | break; | ||
| 385 | case 0x80: | ||
| 386 | bra(opcode_arg(AM_IMM)); | ||
| 387 | cycles += 3; | ||
| 388 | break; | ||
| 389 | case 0x00: | ||
| 390 | brk(); | ||
| 391 | cycles += 7; | ||
| 392 | break; | ||
| 393 | case 0x50: | ||
| 394 | bvc(opcode_arg(AM_IMM)); | ||
| 395 | cycles += 2; | ||
| 396 | break; | ||
| 397 | case 0x70: | ||
| 398 | bvs(opcode_arg(AM_IMM)); | ||
| 399 | cycles += 2; | ||
| 400 | break; | ||
| 401 | case 0x18: | ||
| 402 | clc(opcode_arg(AM_ACC)); | ||
| 403 | cycles += 2; | ||
| 404 | break; | ||
| 405 | case 0xd8: | ||
| 406 | cld(opcode_arg(AM_ACC)); | ||
| 407 | cycles += 2; | ||
| 408 | break; | ||
| 409 | case 0x58: | ||
| 410 | cli(opcode_arg(AM_ACC)); | ||
| 411 | cycles += 2; | ||
| 412 | break; | ||
| 413 | case 0xb8: | ||
| 414 | clv(opcode_arg(AM_ACC)); | ||
| 415 | cycles += 2; | ||
| 416 | break; | ||
| 417 | case 0xc9: | ||
| 418 | cmp(opcode_arg(AM_IMM)); | ||
| 419 | cycles += 2; | ||
| 420 | break; | ||
| 421 | case 0xc5: | ||
| 422 | cmp(opcode_arg(AM_ZP)); | ||
| 423 | cycles += 3; | ||
| 424 | break; | ||
| 425 | case 0xd5: | ||
| 426 | cmp(opcode_arg(AM_ZP_X)); | ||
| 427 | cycles += 4; | ||
| 428 | break; | ||
| 429 | case 0xcd: | ||
| 430 | cmp(opcode_arg(AM_ABS)); | ||
| 431 | cycles += 4; | ||
| 432 | break; | ||
| 433 | case 0xdd: | ||
| 434 | cmp(opcode_arg(AM_ABS_X)); | ||
| 435 | cycles += 4; | ||
| 436 | break; | ||
| 437 | case 0xd9: | ||
| 438 | cmp(opcode_arg(AM_ABS_Y)); | ||
| 439 | cycles += 4; | ||
| 440 | break; | ||
| 441 | case 0xd2: | ||
| 442 | cmp(opcode_arg(AM_IND)); | ||
| 443 | cycles += 5; | ||
| 444 | break; | ||
| 445 | case 0xc1: | ||
| 446 | cmp(opcode_arg(AM_IND_X)); | ||
| 447 | cycles += 6; | ||
| 448 | break; | ||
| 449 | case 0xd1: | ||
| 450 | cmp(opcode_arg(AM_IND_Y)); | ||
| 451 | cycles += 5; | ||
| 452 | break; | ||
| 453 | case 0xe0: | ||
| 454 | cpx(opcode_arg(AM_IMM)); | ||
| 455 | cycles += 2; | ||
| 456 | break; | ||
| 457 | case 0xe4: | ||
| 458 | cpx(opcode_arg(AM_ZP)); | ||
| 459 | cycles += 3; | ||
| 460 | break; | ||
| 461 | case 0xec: | ||
| 462 | cpx(opcode_arg(AM_ABS)); | ||
| 463 | cycles += 4; | ||
| 464 | break; | ||
| 465 | case 0xc0: | ||
| 466 | cpy(opcode_arg(AM_IMM)); | ||
| 467 | cycles += 2; | ||
| 468 | break; | ||
| 469 | case 0xc4: | ||
| 470 | cpy(opcode_arg(AM_ZP)); | ||
| 471 | cycles += 3; | ||
| 472 | break; | ||
| 473 | case 0xcc: | ||
| 474 | cpy(opcode_arg(AM_ABS)); | ||
| 475 | cycles += 4; | ||
| 476 | break; | ||
| 477 | case 0x3a: | ||
| 478 | dec(opcode_arg(AM_ACC)); | ||
| 479 | cycles += 2; | ||
| 480 | break; | ||
| 481 | case 0xc6: | ||
| 482 | dec(opcode_arg(AM_ZP)); | ||
| 483 | cycles += 5; | ||
| 484 | break; | ||
| 485 | case 0xd6: | ||
| 486 | dec(opcode_arg(AM_ZP_X)); | ||
| 487 | cycles += 6; | ||
| 488 | break; | ||
| 489 | case 0xce: | ||
| 490 | dec(opcode_arg(AM_ABS)); | ||
| 491 | cycles += 6; | ||
| 492 | break; | ||
| 493 | case 0xde: | ||
| 494 | dec(opcode_arg(AM_ABS_X)); | ||
| 495 | cycles += 7; | ||
| 496 | break; | ||
| 497 | case 0xca: | ||
| 498 | dex(opcode_arg(AM_ACC)); | ||
| 499 | cycles += 2; | ||
| 500 | break; | ||
| 501 | case 0x88: | ||
| 502 | dey(opcode_arg(AM_ACC)); | ||
| 503 | cycles += 2; | ||
| 504 | break; | ||
| 505 | case 0x49: | ||
| 506 | eor(opcode_arg(AM_IMM)); | ||
| 507 | cycles += 2; | ||
| 508 | break; | ||
| 509 | case 0x45: | ||
| 510 | eor(opcode_arg(AM_ZP)); | ||
| 511 | cycles += 3; | ||
| 512 | break; | ||
| 513 | case 0x55: | ||
| 514 | eor(opcode_arg(AM_ZP_X)); | ||
| 515 | cycles += 4; | ||
| 516 | break; | ||
| 517 | case 0x4d: | ||
| 518 | eor(opcode_arg(AM_ABS)); | ||
| 519 | cycles += 4; | ||
| 520 | break; | ||
| 521 | case 0x5d: | ||
| 522 | eor(opcode_arg(AM_ABS_X)); | ||
| 523 | cycles += 4; | ||
| 524 | break; | ||
| 525 | case 0x59: | ||
| 526 | eor(opcode_arg(AM_ABS_Y)); | ||
| 527 | cycles += 4; | ||
| 528 | break; | ||
| 529 | case 0x52: | ||
| 530 | eor(opcode_arg(AM_IND)); | ||
| 531 | cycles += 5; | ||
| 532 | break; | ||
| 533 | case 0x41: | ||
| 534 | eor(opcode_arg(AM_IND_X)); | ||
| 535 | cycles += 6; | ||
| 536 | break; | ||
| 537 | case 0x51: | ||
| 538 | eor(opcode_arg(AM_IND_Y)); | ||
| 539 | cycles += 5; | ||
| 540 | break; | ||
| 541 | case 0x1a: | ||
| 542 | inc(opcode_arg(AM_ACC)); | ||
| 543 | cycles += 2; | ||
| 544 | break; | ||
| 545 | case 0xe6: | ||
| 546 | inc(opcode_arg(AM_ZP)); | ||
| 547 | cycles += 5; | ||
| 548 | break; | ||
| 549 | case 0xf6: | ||
| 550 | inc(opcode_arg(AM_ZP_X)); | ||
| 551 | cycles += 6; | ||
| 552 | break; | ||
| 553 | case 0xee: | ||
| 554 | inc(opcode_arg(AM_ABS)); | ||
| 555 | cycles += 6; | ||
| 556 | break; | ||
| 557 | case 0xfe: | ||
| 558 | inc(opcode_arg(AM_ABS_X)); | ||
| 559 | cycles += 7; | ||
| 560 | break; | ||
| 561 | case 0xe8: | ||
| 562 | inx(); | ||
| 563 | cycles += 2; | ||
| 564 | break; | ||
| 565 | case 0xc8: | ||
| 566 | iny(opcode_arg(AM_ACC)); | ||
| 567 | cycles += 2; | ||
| 568 | break; | ||
| 569 | case 0x4c: | ||
| 570 | jmp(opcode_arg(AM_ABS)); | ||
| 571 | cycles += 3; | ||
| 572 | break; | ||
| 573 | case 0x6c: | ||
| 574 | jmp(opcode_arg(AM_IND)); | ||
| 575 | cycles += 6; | ||
| 576 | break; | ||
| 577 | case 0x7c: | ||
| 578 | jmp(opcode_arg(AM_ABS_X)); | ||
| 579 | cycles += 6; | ||
| 580 | break; | ||
| 581 | case 0x20: | ||
| 582 | jsr(opcode_arg(AM_ABS)); | ||
| 583 | cycles += 6; | ||
| 208 | break; | 584 | break; |
| 209 | case 0xa9: | 585 | case 0xa9: |
| 210 | lda(opmode_arg(AM_IMM)); | 586 | lda(opcode_arg(AM_IMM)); |
| 587 | cycles += 2; | ||
| 211 | break; | 588 | break; |
| 212 | case 0xaa: | 589 | case 0xa5: |
| 213 | tax(); | 590 | lda(opcode_arg(AM_ZP)); |
| 591 | cycles += 3; | ||
| 592 | break; | ||
| 593 | case 0xb5: | ||
| 594 | lda(opcode_arg(AM_ZP_X)); | ||
| 595 | cycles += 4; | ||
| 214 | break; | 596 | break; |
| 215 | case 0xad: | 597 | case 0xad: |
| 216 | lda(opmode_arg(AM_ABS)); | 598 | lda(opcode_arg(AM_ABS)); |
| 599 | cycles += 4; | ||
| 600 | break; | ||
| 601 | case 0xbd: | ||
| 602 | lda(opcode_arg(AM_ABS_X)); | ||
| 603 | cycles += 4; | ||
| 604 | break; | ||
| 605 | case 0xb9: | ||
| 606 | lda(opcode_arg(AM_ABS_Y)); | ||
| 607 | cycles += 4; | ||
| 608 | break; | ||
| 609 | case 0xb2: | ||
| 610 | lda(opcode_arg(AM_IND)); | ||
| 611 | cycles += 5; | ||
| 612 | break; | ||
| 613 | case 0xa1: | ||
| 614 | lda(opcode_arg(AM_IND_X)); | ||
| 615 | cycles += 6; | ||
| 217 | break; | 616 | break; |
| 218 | case 0xb1: | 617 | case 0xb1: |
| 219 | lda(opmode_arg(AM_IND_Y)); | 618 | lda(opcode_arg(AM_IND_Y)); |
| 619 | cycles += 5; | ||
| 220 | break; | 620 | break; |
| 221 | case 0xb5: | 621 | case 0xa2: |
| 222 | lda(opmode_arg(AM_ZP_X)); | 622 | ldx(opcode_arg(AM_IMM)); |
| 623 | cycles += 2; | ||
| 223 | break; | 624 | break; |
| 224 | case 0xb9: | 625 | case 0xa6: |
| 225 | lda(opmode_arg(AM_ABS_Y)); | 626 | ldx(opcode_arg(AM_ZP)); |
| 627 | cycles += 3; | ||
| 226 | break; | 628 | break; |
| 227 | case 0xbd: | 629 | case 0xb6: |
| 228 | lda(opmode_arg(AM_ABS_X)); | 630 | ldx(opcode_arg(AM_ZP_Y)); |
| 631 | cycles += 4; | ||
| 229 | break; | 632 | break; |
| 230 | case 0xe8: | 633 | case 0xae: |
| 231 | inx(); | 634 | ldx(opcode_arg(AM_ABS)); |
| 635 | cycles += 4; | ||
| 636 | break; | ||
| 637 | case 0xbe: | ||
| 638 | ldx(opcode_arg(AM_ABS_Y)); | ||
| 639 | cycles += 4; | ||
| 640 | break; | ||
| 641 | case 0xa0: | ||
| 642 | ldy(opcode_arg(AM_IMM)); | ||
| 643 | cycles += 2; | ||
| 644 | break; | ||
| 645 | case 0xa4: | ||
| 646 | ldy(opcode_arg(AM_ZP)); | ||
| 647 | cycles += 3; | ||
| 648 | break; | ||
| 649 | case 0xb4: | ||
| 650 | ldy(opcode_arg(AM_ZP_X)); | ||
| 651 | cycles += 4; | ||
| 652 | break; | ||
| 653 | case 0xac: | ||
| 654 | ldy(opcode_arg(AM_ABS)); | ||
| 655 | cycles += 4; | ||
| 656 | break; | ||
| 657 | case 0xbc: | ||
| 658 | ldy(opcode_arg(AM_ABS_X)); | ||
| 659 | cycles += 4; | ||
| 660 | break; | ||
| 661 | case 0x4a: | ||
| 662 | lsr(opcode_arg(AM_ACC)); | ||
| 663 | cycles += 2; | ||
| 664 | break; | ||
| 665 | case 0x46: | ||
| 666 | lsr(opcode_arg(AM_ZP)); | ||
| 667 | cycles += 5; | ||
| 668 | break; | ||
| 669 | case 0x56: | ||
| 670 | lsr(opcode_arg(AM_ZP_X)); | ||
| 671 | cycles += 6; | ||
| 672 | break; | ||
| 673 | case 0x4e: | ||
| 674 | lsr(opcode_arg(AM_ABS)); | ||
| 675 | cycles += 6; | ||
| 676 | break; | ||
| 677 | case 0x5e: | ||
| 678 | lsr(opcode_arg(AM_ABS_X)); | ||
| 679 | cycles += 6; | ||
| 680 | break; | ||
| 681 | case 0xea: | ||
| 682 | nop(opcode_arg(AM_ACC)); | ||
| 683 | cycles += 2; | ||
| 684 | break; | ||
| 685 | case 0x09: | ||
| 686 | ora(opcode_arg(AM_IMM)); | ||
| 687 | cycles += 2; | ||
| 688 | break; | ||
| 689 | case 0x05: | ||
| 690 | ora(opcode_arg(AM_ZP)); | ||
| 691 | cycles += 3; | ||
| 692 | break; | ||
| 693 | case 0x15: | ||
| 694 | ora(opcode_arg(AM_ZP_X)); | ||
| 695 | cycles += 4; | ||
| 696 | break; | ||
| 697 | case 0x0d: | ||
| 698 | ora(opcode_arg(AM_ABS)); | ||
| 699 | cycles += 4; | ||
| 700 | break; | ||
| 701 | case 0x1d: | ||
| 702 | ora(opcode_arg(AM_ABS_X)); | ||
| 703 | cycles += 4; | ||
| 704 | break; | ||
| 705 | case 0x19: | ||
| 706 | ora(opcode_arg(AM_ABS_Y)); | ||
| 707 | cycles += 4; | ||
| 708 | break; | ||
| 709 | case 0x12: | ||
| 710 | ora(opcode_arg(AM_IND)); | ||
| 711 | cycles += 5; | ||
| 712 | break; | ||
| 713 | case 0x01: | ||
| 714 | ora(opcode_arg(AM_IND_X)); | ||
| 715 | cycles += 6; | ||
| 716 | break; | ||
| 717 | case 0x11: | ||
| 718 | ora(opcode_arg(AM_IND_Y)); | ||
| 719 | cycles += 5; | ||
| 720 | break; | ||
| 721 | case 0x48: | ||
| 722 | pha(opcode_arg(AM_ACC)); | ||
| 723 | cycles += 3; | ||
| 724 | break; | ||
| 725 | case 0x08: | ||
| 726 | php(opcode_arg(AM_ACC)); | ||
| 727 | cycles += 3; | ||
| 728 | break; | ||
| 729 | case 0xda: | ||
| 730 | phx(opcode_arg(AM_ACC)); | ||
| 731 | cycles += 3; | ||
| 732 | break; | ||
| 733 | case 0x5a: | ||
| 734 | phy(opcode_arg(AM_ACC)); | ||
| 735 | cycles += 3; | ||
| 736 | break; | ||
| 737 | case 0x68: | ||
| 738 | pla(opcode_arg(AM_ACC)); | ||
| 739 | cycles += 4; | ||
| 740 | break; | ||
| 741 | case 0x28: | ||
| 742 | plp(opcode_arg(AM_ACC)); | ||
| 743 | cycles += 4; | ||
| 744 | break; | ||
| 745 | case 0xfa: | ||
| 746 | plx(opcode_arg(AM_ACC)); | ||
| 747 | cycles += 4; | ||
| 748 | break; | ||
| 749 | case 0x7a: | ||
| 750 | ply(opcode_arg(AM_ACC)); | ||
| 751 | cycles += 4; | ||
| 752 | break; | ||
| 753 | case 0x07: | ||
| 754 | rmb(opcode_arg(AM_REL)); | ||
| 755 | cycles += 5; | ||
| 756 | break; | ||
| 757 | case 0x17: | ||
| 758 | rmb(opcode_arg(AM_REL)); | ||
| 759 | cycles += 5; | ||
| 760 | break; | ||
| 761 | case 0x27: | ||
| 762 | rmb(opcode_arg(AM_REL)); | ||
| 763 | cycles += 5; | ||
| 764 | break; | ||
| 765 | case 0x37: | ||
| 766 | rmb(opcode_arg(AM_REL)); | ||
| 767 | cycles += 5; | ||
| 768 | break; | ||
| 769 | case 0x47: | ||
| 770 | rmb(opcode_arg(AM_REL)); | ||
| 771 | cycles += 5; | ||
| 772 | break; | ||
| 773 | case 0x57: | ||
| 774 | rmb(opcode_arg(AM_REL)); | ||
| 775 | cycles += 5; | ||
| 776 | break; | ||
| 777 | case 0x67: | ||
| 778 | rmb(opcode_arg(AM_REL)); | ||
| 779 | cycles += 5; | ||
| 780 | break; | ||
| 781 | case 0x77: | ||
| 782 | rmb(opcode_arg(AM_REL)); | ||
| 783 | cycles += 5; | ||
| 784 | break; | ||
| 785 | case 0x2a: | ||
| 786 | rol(opcode_arg(AM_ACC)); | ||
| 787 | cycles += 2; | ||
| 788 | break; | ||
| 789 | case 0x26: | ||
| 790 | rol(opcode_arg(AM_ZP)); | ||
| 791 | cycles += 5; | ||
| 792 | break; | ||
| 793 | case 0x36: | ||
| 794 | rol(opcode_arg(AM_ZP_X)); | ||
| 795 | cycles += 6; | ||
| 796 | break; | ||
| 797 | case 0x2e: | ||
| 798 | rol(opcode_arg(AM_ABS)); | ||
| 799 | cycles += 6; | ||
| 800 | break; | ||
| 801 | case 0x3e: | ||
| 802 | rol(opcode_arg(AM_ABS_X)); | ||
| 803 | cycles += 6; | ||
| 804 | break; | ||
| 805 | case 0x6a: | ||
| 806 | ror(opcode_arg(AM_ACC)); | ||
| 807 | cycles += 2; | ||
| 808 | break; | ||
| 809 | case 0x66: | ||
| 810 | ror(opcode_arg(AM_ZP)); | ||
| 811 | cycles += 5; | ||
| 812 | break; | ||
| 813 | case 0x76: | ||
| 814 | ror(opcode_arg(AM_ZP_X)); | ||
| 815 | cycles += 6; | ||
| 816 | break; | ||
| 817 | case 0x6e: | ||
| 818 | ror(opcode_arg(AM_ABS)); | ||
| 819 | cycles += 6; | ||
| 820 | break; | ||
| 821 | case 0x7e: | ||
| 822 | ror(opcode_arg(AM_ABS_X)); | ||
| 823 | cycles += 6; | ||
| 824 | break; | ||
| 825 | case 0x40: | ||
| 826 | rti(opcode_arg(AM_ACC)); | ||
| 827 | cycles += 6; | ||
| 828 | break; | ||
| 829 | case 0x60: | ||
| 830 | rts(opcode_arg(AM_ACC)); | ||
| 831 | cycles += 6; | ||
| 832 | break; | ||
| 833 | case 0xe9: | ||
| 834 | sbc(opcode_arg(AM_IMM)); | ||
| 835 | cycles += 2; | ||
| 836 | break; | ||
| 837 | case 0xe5: | ||
| 838 | sbc(opcode_arg(AM_ZP)); | ||
| 839 | cycles += 3; | ||
| 840 | break; | ||
| 841 | case 0xf5: | ||
| 842 | sbc(opcode_arg(AM_ZP_X)); | ||
| 843 | cycles += 4; | ||
| 844 | break; | ||
| 845 | case 0xed: | ||
| 846 | sbc(opcode_arg(AM_ABS)); | ||
| 847 | cycles += 4; | ||
| 848 | break; | ||
| 849 | case 0xfd: | ||
| 850 | sbc(opcode_arg(AM_ABS_X)); | ||
| 851 | cycles += 4; | ||
| 852 | break; | ||
| 853 | case 0xf9: | ||
| 854 | sbc(opcode_arg(AM_ABS_Y)); | ||
| 855 | cycles += 4; | ||
| 856 | break; | ||
| 857 | case 0xf2: | ||
| 858 | sbc(opcode_arg(AM_IND)); | ||
| 859 | cycles += 5; | ||
| 860 | break; | ||
| 861 | case 0xe1: | ||
| 862 | sbc(opcode_arg(AM_IND_X)); | ||
| 863 | cycles += 6; | ||
| 864 | break; | ||
| 865 | case 0xf1: | ||
| 866 | sbc(opcode_arg(AM_IND_Y)); | ||
| 867 | cycles += 5; | ||
| 868 | break; | ||
| 869 | case 0x38: | ||
| 870 | sec(opcode_arg(AM_ACC)); | ||
| 871 | cycles += 2; | ||
| 872 | break; | ||
| 873 | case 0xf8: | ||
| 874 | sed(opcode_arg(AM_ACC)); | ||
| 875 | cycles += 2; | ||
| 876 | break; | ||
| 877 | case 0x78: | ||
| 878 | sei(opcode_arg(AM_ACC)); | ||
| 879 | cycles += 2; | ||
| 880 | break; | ||
| 881 | case 0x87: | ||
| 882 | smb(opcode_arg(AM_REL)); | ||
| 883 | cycles += 5; | ||
| 884 | break; | ||
| 885 | case 0x97: | ||
| 886 | smb(opcode_arg(AM_REL)); | ||
| 887 | cycles += 5; | ||
| 888 | break; | ||
| 889 | case 0xa7: | ||
| 890 | smb(opcode_arg(AM_REL)); | ||
| 891 | cycles += 5; | ||
| 892 | break; | ||
| 893 | case 0xb7: | ||
| 894 | smb(opcode_arg(AM_REL)); | ||
| 895 | cycles += 5; | ||
| 896 | break; | ||
| 897 | case 0xc7: | ||
| 898 | smb(opcode_arg(AM_REL)); | ||
| 899 | cycles += 5; | ||
| 900 | break; | ||
| 901 | case 0xd7: | ||
| 902 | smb(opcode_arg(AM_REL)); | ||
| 903 | cycles += 5; | ||
| 904 | break; | ||
| 905 | case 0xe7: | ||
| 906 | smb(opcode_arg(AM_REL)); | ||
| 907 | cycles += 5; | ||
| 908 | break; | ||
| 909 | case 0xf7: | ||
| 910 | smb(opcode_arg(AM_REL)); | ||
| 911 | cycles += 5; | ||
| 912 | break; | ||
| 913 | case 0x85: | ||
| 914 | sta(opcode_arg(AM_ZP)); | ||
| 915 | cycles += 4; | ||
| 916 | break; | ||
| 917 | case 0x95: | ||
| 918 | sta(opcode_arg(AM_ZP_X)); | ||
| 919 | cycles += 5; | ||
| 920 | break; | ||
| 921 | case 0x8d: | ||
| 922 | sta(opcode_arg(AM_ABS)); | ||
| 923 | cycles += 5; | ||
| 924 | break; | ||
| 925 | case 0x9d: | ||
| 926 | sta(opcode_arg(AM_ABS_X)); | ||
| 927 | cycles += 6; | ||
| 928 | break; | ||
| 929 | case 0x99: | ||
| 930 | sta(opcode_arg(AM_ABS_Y)); | ||
| 931 | cycles += 6; | ||
| 932 | break; | ||
| 933 | case 0x92: | ||
| 934 | sta(opcode_arg(AM_IND)); | ||
| 935 | cycles += 6; | ||
| 936 | break; | ||
| 937 | case 0x81: | ||
| 938 | sta(opcode_arg(AM_IND_X)); | ||
| 939 | cycles += 7; | ||
| 940 | break; | ||
| 941 | case 0x91: | ||
| 942 | sta(opcode_arg(AM_IND_Y)); | ||
| 943 | cycles += 7; | ||
| 944 | break; | ||
| 945 | case 0xdb: | ||
| 946 | stp(opcode_arg(AM_ACC)); | ||
| 947 | cycles += 2; | ||
| 948 | break; | ||
| 949 | case 0x86: | ||
| 950 | stx(opcode_arg(AM_ZP)); | ||
| 951 | cycles += 4; | ||
| 952 | break; | ||
| 953 | case 0x96: | ||
| 954 | stx(opcode_arg(AM_ZP_Y)); | ||
| 955 | cycles += 5; | ||
| 956 | break; | ||
| 957 | case 0x8e: | ||
| 958 | stx(opcode_arg(AM_ABS)); | ||
| 959 | cycles += 5; | ||
| 960 | break; | ||
| 961 | case 0x84: | ||
| 962 | sty(opcode_arg(AM_ZP)); | ||
| 963 | cycles += 4; | ||
| 964 | break; | ||
| 965 | case 0x94: | ||
| 966 | sty(opcode_arg(AM_ZP_X)); | ||
| 967 | cycles += 5; | ||
| 968 | break; | ||
| 969 | case 0x8c: | ||
| 970 | sty(opcode_arg(AM_ABS)); | ||
| 971 | cycles += 5; | ||
| 972 | break; | ||
| 973 | case 0x64: | ||
| 974 | stz(opcode_arg(AM_ZP)); | ||
| 975 | cycles += 4; | ||
| 976 | break; | ||
| 977 | case 0x74: | ||
| 978 | stz(opcode_arg(AM_ZP_X)); | ||
| 979 | cycles += 5; | ||
| 980 | break; | ||
| 981 | case 0x9c: | ||
| 982 | stz(opcode_arg(AM_ABS)); | ||
| 983 | cycles += 5; | ||
| 984 | break; | ||
| 985 | case 0x9e: | ||
| 986 | stz(opcode_arg(AM_ABS_X)); | ||
| 987 | cycles += 6; | ||
| 988 | break; | ||
| 989 | case 0xaa: | ||
| 990 | tax(); | ||
| 991 | cycles += 2; | ||
| 992 | break; | ||
| 993 | case 0xa8: | ||
| 994 | tay(opcode_arg(AM_ACC)); | ||
| 995 | cycles += 2; | ||
| 996 | break; | ||
| 997 | case 0x14: | ||
| 998 | trb(opcode_arg(AM_ZP)); | ||
| 999 | cycles += 5; | ||
| 1000 | break; | ||
| 1001 | case 0x1c: | ||
| 1002 | trb(opcode_arg(AM_ABS)); | ||
| 1003 | cycles += 6; | ||
| 1004 | break; | ||
| 1005 | case 0x04: | ||
| 1006 | tsb(opcode_arg(AM_ZP)); | ||
| 1007 | cycles += 5; | ||
| 1008 | break; | ||
| 1009 | case 0x0c: | ||
| 1010 | tsb(opcode_arg(AM_ABS)); | ||
| 1011 | cycles += 6; | ||
| 1012 | break; | ||
| 1013 | case 0xba: | ||
| 1014 | tsx(opcode_arg(AM_ACC)); | ||
| 1015 | cycles += 2; | ||
| 1016 | break; | ||
| 1017 | case 0x8a: | ||
| 1018 | txa(opcode_arg(AM_ACC)); | ||
| 1019 | cycles += 2; | ||
| 1020 | break; | ||
| 1021 | case 0x9a: | ||
| 1022 | txs(opcode_arg(AM_ACC)); | ||
| 1023 | cycles += 2; | ||
| 1024 | break; | ||
| 1025 | case 0x98: | ||
| 1026 | tya(opcode_arg(AM_ACC)); | ||
| 1027 | cycles += 2; | ||
| 1028 | break; | ||
| 1029 | case 0xcb: | ||
| 1030 | wai(opcode_arg(AM_ACC)); | ||
| 1031 | cycles += 5; | ||
| 1032 | break; | ||
| 1033 | case 0x03: | ||
| 1034 | unp(opcode_arg(AM_ACC)); | ||
| 1035 | cycles += 1; | ||
| 1036 | break; | ||
| 1037 | case 0x0b: | ||
| 1038 | unp(opcode_arg(AM_ACC)); | ||
| 1039 | cycles += 1; | ||
| 1040 | break; | ||
| 1041 | case 0x13: | ||
| 1042 | unp(opcode_arg(AM_ACC)); | ||
| 1043 | cycles += 1; | ||
| 1044 | break; | ||
| 1045 | case 0x1b: | ||
| 1046 | unp(opcode_arg(AM_ACC)); | ||
| 1047 | cycles += 1; | ||
| 1048 | break; | ||
| 1049 | case 0x23: | ||
| 1050 | unp(opcode_arg(AM_ACC)); | ||
| 1051 | cycles += 1; | ||
| 1052 | break; | ||
| 1053 | case 0x2b: | ||
| 1054 | unp(opcode_arg(AM_ACC)); | ||
| 1055 | cycles += 1; | ||
| 1056 | break; | ||
| 1057 | case 0x33: | ||
| 1058 | unp(opcode_arg(AM_ACC)); | ||
| 1059 | cycles += 1; | ||
| 1060 | break; | ||
| 1061 | case 0x3b: | ||
| 1062 | unp(opcode_arg(AM_ACC)); | ||
| 1063 | cycles += 1; | ||
| 1064 | break; | ||
| 1065 | case 0x43: | ||
| 1066 | unp(opcode_arg(AM_ACC)); | ||
| 1067 | cycles += 1; | ||
| 1068 | break; | ||
| 1069 | case 0x4b: | ||
| 1070 | unp(opcode_arg(AM_ACC)); | ||
| 1071 | cycles += 1; | ||
| 1072 | break; | ||
| 1073 | case 0x53: | ||
| 1074 | unp(opcode_arg(AM_ACC)); | ||
| 1075 | cycles += 1; | ||
| 1076 | break; | ||
| 1077 | case 0x5b: | ||
| 1078 | unp(opcode_arg(AM_ACC)); | ||
| 1079 | cycles += 1; | ||
| 1080 | break; | ||
| 1081 | case 0x63: | ||
| 1082 | unp(opcode_arg(AM_ACC)); | ||
| 1083 | cycles += 1; | ||
| 1084 | break; | ||
| 1085 | case 0x6b: | ||
| 1086 | unp(opcode_arg(AM_ACC)); | ||
| 1087 | cycles += 1; | ||
| 1088 | break; | ||
| 1089 | case 0x73: | ||
| 1090 | unp(opcode_arg(AM_ACC)); | ||
| 1091 | cycles += 1; | ||
| 1092 | break; | ||
| 1093 | case 0x7b: | ||
| 1094 | unp(opcode_arg(AM_ACC)); | ||
| 1095 | cycles += 1; | ||
| 1096 | break; | ||
| 1097 | case 0x83: | ||
| 1098 | unp(opcode_arg(AM_ACC)); | ||
| 1099 | cycles += 1; | ||
| 1100 | break; | ||
| 1101 | case 0x8b: | ||
| 1102 | unp(opcode_arg(AM_ACC)); | ||
| 1103 | cycles += 1; | ||
| 1104 | break; | ||
| 1105 | case 0x93: | ||
| 1106 | unp(opcode_arg(AM_ACC)); | ||
| 1107 | cycles += 1; | ||
| 1108 | break; | ||
| 1109 | case 0x9b: | ||
| 1110 | unp(opcode_arg(AM_ACC)); | ||
| 1111 | cycles += 1; | ||
| 1112 | break; | ||
| 1113 | case 0xa3: | ||
| 1114 | unp(opcode_arg(AM_ACC)); | ||
| 1115 | cycles += 1; | ||
| 1116 | break; | ||
| 1117 | case 0xab: | ||
| 1118 | unp(opcode_arg(AM_ACC)); | ||
| 1119 | cycles += 1; | ||
| 1120 | break; | ||
| 1121 | case 0xb3: | ||
| 1122 | unp(opcode_arg(AM_ACC)); | ||
| 1123 | cycles += 1; | ||
| 1124 | break; | ||
| 1125 | case 0xbb: | ||
| 1126 | unp(opcode_arg(AM_ACC)); | ||
| 1127 | cycles += 1; | ||
| 1128 | break; | ||
| 1129 | case 0xc3: | ||
| 1130 | unp(opcode_arg(AM_ACC)); | ||
| 1131 | cycles += 1; | ||
| 1132 | break; | ||
| 1133 | case 0xd3: | ||
| 1134 | unp(opcode_arg(AM_ACC)); | ||
| 1135 | cycles += 1; | ||
| 1136 | break; | ||
| 1137 | case 0xe3: | ||
| 1138 | unp(opcode_arg(AM_ACC)); | ||
| 1139 | cycles += 1; | ||
| 1140 | break; | ||
| 1141 | case 0xeb: | ||
| 1142 | unp(opcode_arg(AM_ACC)); | ||
| 1143 | cycles += 1; | ||
| 1144 | break; | ||
| 1145 | case 0xf3: | ||
| 1146 | unp(opcode_arg(AM_ACC)); | ||
| 1147 | cycles += 1; | ||
| 1148 | break; | ||
| 1149 | case 0xfb: | ||
| 1150 | unp(opcode_arg(AM_ACC)); | ||
| 1151 | cycles += 1; | ||
| 1152 | break; | ||
| 1153 | case 0x02: | ||
| 1154 | unp(opcode_arg(AM_IMM)); | ||
| 1155 | cycles += 2; | ||
| 1156 | break; | ||
| 1157 | case 0x22: | ||
| 1158 | unp(opcode_arg(AM_IMM)); | ||
| 1159 | cycles += 2; | ||
| 1160 | break; | ||
| 1161 | case 0x42: | ||
| 1162 | unp(opcode_arg(AM_IMM)); | ||
| 1163 | cycles += 2; | ||
| 1164 | break; | ||
| 1165 | case 0x62: | ||
| 1166 | unp(opcode_arg(AM_IMM)); | ||
| 1167 | cycles += 2; | ||
| 1168 | break; | ||
| 1169 | case 0x82: | ||
| 1170 | unp(opcode_arg(AM_IMM)); | ||
| 1171 | cycles += 2; | ||
| 1172 | break; | ||
| 1173 | case 0xc2: | ||
| 1174 | unp(opcode_arg(AM_IMM)); | ||
| 1175 | cycles += 2; | ||
| 1176 | break; | ||
| 1177 | case 0xe2: | ||
| 1178 | unp(opcode_arg(AM_IMM)); | ||
| 1179 | cycles += 2; | ||
| 1180 | break; | ||
| 1181 | case 0x44: | ||
| 1182 | unp(opcode_arg(AM_ZP)); | ||
| 1183 | cycles += 3; | ||
| 1184 | break; | ||
| 1185 | case 0x54: | ||
| 1186 | unp(opcode_arg(AM_ZP_X)); | ||
| 1187 | cycles += 4; | ||
| 1188 | break; | ||
| 1189 | case 0xd4: | ||
| 1190 | unp(opcode_arg(AM_ZP_X)); | ||
| 1191 | cycles += 4; | ||
| 1192 | break; | ||
| 1193 | case 0xf4: | ||
| 1194 | unp(opcode_arg(AM_ZP_X)); | ||
| 1195 | cycles += 4; | ||
| 1196 | break; | ||
| 1197 | case 0x5c: | ||
| 1198 | unp(opcode_arg(AM_ABS)); | ||
| 1199 | cycles += 8; | ||
| 1200 | break; | ||
| 1201 | case 0xdc: | ||
| 1202 | unp(opcode_arg(AM_ABS_X)); | ||
| 1203 | cycles += 4; | ||
| 1204 | break; | ||
| 1205 | case 0xfc: | ||
| 1206 | unp(opcode_arg(AM_ABS_X)); | ||
| 1207 | cycles += 4; | ||
| 232 | break; | 1208 | break; |
| 233 | default: | 1209 | default: |
| 234 | printf("opcode $%02X not implemented\n", opcode); | 1210 | printf("opcode $%02X not implemented\n", opcode); |
