diff options
| author | vin <git@vineetk.net> | 2024-07-03 18:52:15 -0400 |
|---|---|---|
| committer | vin <git@vineetk.net> | 2024-07-03 19:22:00 -0400 |
| commit | d8bb5a5ccf96fed7e8084cf691c987ce56a8c995 (patch) | |
| tree | 5cfc546f2ae063d1261ef34ee054bd857033231d /cpu.c | |
| parent | a4b39966aed8d41ad4ddc6700683c4779e8d1cb2 (diff) | |
call opcode function pointer instead of using switch case
Also improve logging.
Diffstat (limited to 'cpu.c')
| -rw-r--r-- | cpu.c | 1445 |
1 files changed, 172 insertions, 1273 deletions
| @@ -106,10 +106,8 @@ opcode_arg(enum addressing_mode mode) | |||
| 106 | 106 | ||
| 107 | if (mode != AM_ABS && mode != AM_ABS_X && mode != AM_ABS_Y) { | 107 | if (mode != AM_ABS && mode != AM_ABS_X && mode != AM_ABS_Y) { |
| 108 | arg = peek(regs.pc++); | 108 | arg = peek(regs.pc++); |
| 109 | printf(" %02X\t", arg); | ||
| 110 | } else { | 109 | } else { |
| 111 | arg = peek16(regs.pc); | 110 | arg = peek16(regs.pc); |
| 112 | printf(" %02X %02X\t", peek(regs.pc), peek(regs.pc + 1)); | ||
| 113 | regs.pc += 2; | 111 | regs.pc += 2; |
| 114 | } | 112 | } |
| 115 | 113 | ||
| @@ -155,12 +153,12 @@ opcode_mem(enum addressing_mode mode) | |||
| 155 | { | 153 | { |
| 156 | uint16_t arg, val; | 154 | uint16_t arg, val; |
| 157 | 155 | ||
| 158 | if (mode != AM_ABS && mode != AM_ABS_X && mode != AM_ABS_Y && mode != AM_IND && mode) { | 156 | if (mode == AM_ACC || mode == AM_NONE) { |
| 157 | return 0; | ||
| 158 | } else if (mode != AM_ABS && mode != AM_ABS_X && mode != AM_ABS_Y && mode != AM_IND && mode) { | ||
| 159 | arg = peek(regs.pc++); | 159 | arg = peek(regs.pc++); |
| 160 | printf(" %02X\t", arg); | ||
| 161 | } else { | 160 | } else { |
| 162 | arg = peek16(regs.pc); | 161 | arg = peek16(regs.pc); |
| 163 | printf(" %02X %02X\t", peek(regs.pc), peek(regs.pc + 1)); | ||
| 164 | regs.pc += 2; | 162 | regs.pc += 2; |
| 165 | } | 163 | } |
| 166 | 164 | ||
| @@ -175,6 +173,7 @@ opcode_mem(enum addressing_mode mode) | |||
| 175 | val = (arg + regs.y) % 256; | 173 | val = (arg + regs.y) % 256; |
| 176 | break; | 174 | break; |
| 177 | case AM_IMM: | 175 | case AM_IMM: |
| 176 | case AM_REL: | ||
| 178 | case AM_ABS: | 177 | case AM_ABS: |
| 179 | val = arg; | 178 | val = arg; |
| 180 | break; | 179 | break; |
| @@ -194,15 +193,15 @@ opcode_mem(enum addressing_mode mode) | |||
| 194 | val = peek(arg) + peek((arg + 1) % 256) * 256 + regs.y; | 193 | val = peek(arg) + peek((arg + 1) % 256) * 256 + regs.y; |
| 195 | break; | 194 | break; |
| 196 | default: | 195 | default: |
| 197 | fprintf(stderr, "INVALID ADDRESSING MODE\n"); | 196 | fprintf(stderr, "opcode_mem INVALID ADDRESSING MODE %i\n", mode); |
| 198 | abort(); | 197 | abort(); |
| 199 | } | 198 | } |
| 200 | 199 | ||
| 201 | return val; | 200 | return val; |
| 202 | } | 201 | } |
| 203 | 202 | ||
| 204 | static void | 203 | void |
| 205 | adc(uint8_t arg) | 204 | ADC(uint16_t arg) |
| 206 | { | 205 | { |
| 207 | uint16_t sum; // 16-bit sum makes it easier to determine carry flag | 206 | uint16_t sum; // 16-bit sum makes it easier to determine carry flag |
| 208 | 207 | ||
| @@ -216,16 +215,16 @@ adc(uint8_t arg) | |||
| 216 | STATUS_UPDATE_NZ(regs.a); | 215 | STATUS_UPDATE_NZ(regs.a); |
| 217 | } | 216 | } |
| 218 | 217 | ||
| 219 | static void | 218 | void |
| 220 | and(uint8_t arg) | 219 | AND(uint16_t arg) |
| 221 | { | 220 | { |
| 222 | regs.a &= arg; | 221 | regs.a &= arg; |
| 223 | 222 | ||
| 224 | STATUS_UPDATE_NZ(regs.a); | 223 | STATUS_UPDATE_NZ(regs.a); |
| 225 | } | 224 | } |
| 226 | 225 | ||
| 227 | static void | 226 | void |
| 228 | asl_acc(void) | 227 | ASL_acc(uint16_t arg) |
| 229 | { | 228 | { |
| 230 | uint16_t tmp; | 229 | uint16_t tmp; |
| 231 | 230 | ||
| @@ -236,8 +235,8 @@ asl_acc(void) | |||
| 236 | STATUS_UPDATE_NZ(regs.a); | 235 | STATUS_UPDATE_NZ(regs.a); |
| 237 | } | 236 | } |
| 238 | 237 | ||
| 239 | static void | 238 | void |
| 240 | asl(uint16_t mem) | 239 | ASL(uint16_t mem) |
| 241 | { | 240 | { |
| 242 | uint16_t tmp; | 241 | uint16_t tmp; |
| 243 | 242 | ||
| @@ -248,109 +247,108 @@ asl(uint16_t mem) | |||
| 248 | STATUS_UPDATE_NZ(tmp); | 247 | STATUS_UPDATE_NZ(tmp); |
| 249 | } | 248 | } |
| 250 | 249 | ||
| 251 | static void | 250 | void |
| 252 | bcc(uint8_t arg) | 251 | BCC(uint16_t arg) |
| 253 | { | 252 | { |
| 254 | if (regs.status.carry == 0) | 253 | if (regs.status.carry == 0) |
| 255 | regs.pc += arg; | 254 | regs.pc += arg, cycles++; |
| 256 | } | 255 | } |
| 257 | 256 | ||
| 258 | static void | 257 | void |
| 259 | bcs(uint8_t arg) | 258 | BCS(uint16_t arg) |
| 260 | { | 259 | { |
| 261 | if (regs.status.carry == 1) | 260 | if (regs.status.carry == 1) |
| 262 | regs.pc += arg; | 261 | regs.pc += arg, cycles++; |
| 263 | } | 262 | } |
| 264 | 263 | ||
| 265 | static void | 264 | void |
| 266 | beq(uint8_t arg) | 265 | BEQ(uint16_t arg) |
| 267 | { | 266 | { |
| 268 | if (regs.status.zero == 1) | 267 | if (regs.status.zero == 1) |
| 269 | regs.pc += arg; | 268 | regs.pc += arg, cycles++; |
| 270 | } | 269 | } |
| 271 | 270 | ||
| 272 | static uint8_t | 271 | void |
| 273 | bit(uint8_t arg) | 272 | BIT(uint16_t arg) |
| 274 | { | 273 | { |
| 275 | regs.status.zero = (regs.a & arg) == 0; | 274 | uint8_t tmp = peek(arg); |
| 276 | regs.status.overflow = (arg & (1 << 6)) != 0; | 275 | regs.status.zero = (regs.a & tmp) == 0; |
| 277 | STATUS_UPDATE_NEGATIVE(arg); | 276 | regs.status.overflow = (tmp & (1 << 6)) != 0; |
| 278 | 277 | STATUS_UPDATE_NEGATIVE(tmp); | |
| 279 | return regs.a & arg; | ||
| 280 | } | 278 | } |
| 281 | 279 | ||
| 282 | static void | 280 | void |
| 283 | bmi(uint8_t arg) | 281 | BMI(uint16_t arg) |
| 284 | { | 282 | { |
| 285 | if (regs.status.negative == 1) | 283 | if (regs.status.negative == 1) |
| 286 | regs.pc += arg; | 284 | regs.pc += arg, cycles++; |
| 287 | } | 285 | } |
| 288 | 286 | ||
| 289 | static void | 287 | void |
| 290 | bne(uint8_t arg) | 288 | BNE(uint16_t arg) |
| 291 | { | 289 | { |
| 292 | if (regs.status.zero == 0) | 290 | if (regs.status.zero == 0) |
| 293 | regs.pc += arg; | 291 | regs.pc += arg, cycles++; |
| 294 | } | 292 | } |
| 295 | 293 | ||
| 296 | static void | 294 | void |
| 297 | bpl(uint8_t arg) | 295 | BPL(uint16_t arg) |
| 298 | { | 296 | { |
| 299 | if (regs.status.negative == 0) | 297 | if (regs.status.negative == 0) |
| 300 | regs.pc += arg; | 298 | regs.pc += arg, cycles++; |
| 301 | } | 299 | } |
| 302 | 300 | ||
| 303 | static void | 301 | void |
| 304 | brk(void) | 302 | BRK(uint16_t arg) |
| 305 | { | 303 | { |
| 306 | /* TODO: push regs.pc and regs.status to stack and load IRQ vector */ | 304 | /* TODO: push regs.pc and regs.status to stack and load IRQ vector */ |
| 307 | regs.status.brk = 1; | 305 | regs.status.brk = 1; |
| 308 | // exit(0); | 306 | // exit(0); |
| 309 | } | 307 | } |
| 310 | 308 | ||
| 311 | static void | 309 | void |
| 312 | bvc(uint8_t arg) | 310 | BVC(uint16_t arg) |
| 313 | { | 311 | { |
| 314 | //regs.status.overflow = (STATUS_TO_INT() & (1 << 6)) == 0; | 312 | //regs.status.overflow = (STATUS_TO_INT() & (1 << 6)) == 0; |
| 315 | //if (regs.status.overflow == 0) | 313 | //if (regs.status.overflow == 0) |
| 316 | if ((STATUS_TO_INT() & (1 << 6)) == 0) | 314 | if ((STATUS_TO_INT() & (1 << 6)) == 0) |
| 317 | regs.pc += arg; | 315 | regs.pc += arg, cycles++; |
| 318 | } | 316 | } |
| 319 | 317 | ||
| 320 | static void | 318 | void |
| 321 | bvs(uint8_t arg) | 319 | BVS(uint16_t arg) |
| 322 | { | 320 | { |
| 323 | regs.status.overflow = (STATUS_TO_INT() & (1 << 6)) != 0; | 321 | regs.status.overflow = (STATUS_TO_INT() & (1 << 6)) != 0; |
| 324 | if (regs.status.overflow == 1) | 322 | if (regs.status.overflow == 1) |
| 325 | regs.pc += arg; | 323 | regs.pc += arg, cycles++; |
| 326 | } | 324 | } |
| 327 | 325 | ||
| 328 | static void | 326 | void |
| 329 | clc(void) | 327 | CLC(uint16_t arg) |
| 330 | { | 328 | { |
| 331 | regs.status.carry = 0; | 329 | regs.status.carry = 0; |
| 332 | } | 330 | } |
| 333 | 331 | ||
| 334 | static void | 332 | void |
| 335 | cld(void) | 333 | CLD(uint16_t arg) |
| 336 | { | 334 | { |
| 337 | regs.status.decimal_mode = 0; | 335 | regs.status.decimal_mode = 0; |
| 338 | } | 336 | } |
| 339 | 337 | ||
| 340 | static void | 338 | void |
| 341 | cli(void) | 339 | CLI(uint16_t arg) |
| 342 | { | 340 | { |
| 343 | regs.status.interrupt_disable = 0; | 341 | regs.status.interrupt_disable = 0; |
| 344 | } | 342 | } |
| 345 | 343 | ||
| 346 | static void | 344 | void |
| 347 | clv(void) | 345 | CLV(uint16_t arg) |
| 348 | { | 346 | { |
| 349 | regs.status.overflow = 0; | 347 | regs.status.overflow = 0; |
| 350 | } | 348 | } |
| 351 | 349 | ||
| 352 | static void | 350 | void |
| 353 | cmp(uint8_t arg) | 351 | CMP(uint16_t arg) |
| 354 | { | 352 | { |
| 355 | uint8_t tmp; | 353 | uint8_t tmp; |
| 356 | 354 | ||
| @@ -361,8 +359,8 @@ cmp(uint8_t arg) | |||
| 361 | STATUS_UPDATE_NEGATIVE(tmp); | 359 | STATUS_UPDATE_NEGATIVE(tmp); |
| 362 | } | 360 | } |
| 363 | 361 | ||
| 364 | static void | 362 | void |
| 365 | cpx(uint8_t arg) | 363 | CPX(uint16_t arg) |
| 366 | { | 364 | { |
| 367 | uint8_t tmp; | 365 | uint8_t tmp; |
| 368 | 366 | ||
| @@ -373,8 +371,8 @@ cpx(uint8_t arg) | |||
| 373 | STATUS_UPDATE_NEGATIVE(tmp); | 371 | STATUS_UPDATE_NEGATIVE(tmp); |
| 374 | } | 372 | } |
| 375 | 373 | ||
| 376 | static void | 374 | void |
| 377 | cpy(uint8_t arg) | 375 | CPY(uint16_t arg) |
| 378 | { | 376 | { |
| 379 | uint8_t tmp; | 377 | uint8_t tmp; |
| 380 | 378 | ||
| @@ -385,70 +383,70 @@ cpy(uint8_t arg) | |||
| 385 | STATUS_UPDATE_NEGATIVE(tmp); | 383 | STATUS_UPDATE_NEGATIVE(tmp); |
| 386 | } | 384 | } |
| 387 | 385 | ||
| 388 | static void | 386 | void |
| 389 | dec(uint16_t mem) | 387 | DEC(uint16_t mem) |
| 390 | { | 388 | { |
| 391 | memwrite(mem, peek(mem) - 1); | 389 | memwrite(mem, peek(mem) - 1); |
| 392 | 390 | ||
| 393 | STATUS_UPDATE_NZ(peek(mem)); | 391 | STATUS_UPDATE_NZ(peek(mem)); |
| 394 | } | 392 | } |
| 395 | 393 | ||
| 396 | static void | 394 | void |
| 397 | dex(void) | 395 | DEX(uint16_t arg) |
| 398 | { | 396 | { |
| 399 | regs.x--; | 397 | regs.x--; |
| 400 | 398 | ||
| 401 | STATUS_UPDATE_NZ(regs.x); | 399 | STATUS_UPDATE_NZ(regs.x); |
| 402 | } | 400 | } |
| 403 | 401 | ||
| 404 | static void | 402 | void |
| 405 | dey(void) | 403 | DEY(uint16_t arg) |
| 406 | { | 404 | { |
| 407 | regs.y--; | 405 | regs.y--; |
| 408 | 406 | ||
| 409 | STATUS_UPDATE_NZ(regs.y); | 407 | STATUS_UPDATE_NZ(regs.y); |
| 410 | } | 408 | } |
| 411 | 409 | ||
| 412 | static void | 410 | void |
| 413 | eor(uint8_t arg) | 411 | EOR(uint16_t arg) |
| 414 | { | 412 | { |
| 415 | regs.a ^= arg; | 413 | regs.a ^= arg; |
| 416 | 414 | ||
| 417 | STATUS_UPDATE_NZ(regs.a); | 415 | STATUS_UPDATE_NZ(regs.a); |
| 418 | } | 416 | } |
| 419 | 417 | ||
| 420 | static void | 418 | void |
| 421 | inc(uint16_t mem) | 419 | INC(uint16_t mem) |
| 422 | { | 420 | { |
| 423 | memwrite(mem, peek(mem) + 1); | 421 | memwrite(mem, peek(mem) + 1); |
| 424 | 422 | ||
| 425 | STATUS_UPDATE_NZ(peek(mem)); | 423 | STATUS_UPDATE_NZ(peek(mem)); |
| 426 | } | 424 | } |
| 427 | 425 | ||
| 428 | static void | 426 | void |
| 429 | inx(void) | 427 | INX(uint16_t arg) |
| 430 | { | 428 | { |
| 431 | regs.x++; | 429 | regs.x++; |
| 432 | 430 | ||
| 433 | STATUS_UPDATE_NZ(regs.x); | 431 | STATUS_UPDATE_NZ(regs.x); |
| 434 | } | 432 | } |
| 435 | 433 | ||
| 436 | static void | 434 | void |
| 437 | iny(void) | 435 | INY(uint16_t arg) |
| 438 | { | 436 | { |
| 439 | regs.y++; | 437 | regs.y++; |
| 440 | 438 | ||
| 441 | STATUS_UPDATE_NZ(regs.y); | 439 | STATUS_UPDATE_NZ(regs.y); |
| 442 | } | 440 | } |
| 443 | 441 | ||
| 444 | static void | 442 | void |
| 445 | jmp(uint16_t arg) | 443 | JMP(uint16_t arg) |
| 446 | { | 444 | { |
| 447 | regs.pc = arg; | 445 | regs.pc = arg; |
| 448 | } | 446 | } |
| 449 | 447 | ||
| 450 | static void | 448 | void |
| 451 | jsr(uint16_t arg) | 449 | JSR(uint16_t arg) |
| 452 | { | 450 | { |
| 453 | uint16_t tmp = regs.pc - 1; | 451 | uint16_t tmp = regs.pc - 1; |
| 454 | 452 | ||
| @@ -461,32 +459,32 @@ jsr(uint16_t arg) | |||
| 461 | regs.pc = arg; | 459 | regs.pc = arg; |
| 462 | } | 460 | } |
| 463 | 461 | ||
| 464 | static void | 462 | void |
| 465 | lda(uint8_t arg) | 463 | LDA(uint16_t arg) |
| 466 | { | 464 | { |
| 467 | regs.a = arg; | 465 | regs.a = arg; |
| 468 | 466 | ||
| 469 | STATUS_UPDATE_NZ(regs.a); | 467 | STATUS_UPDATE_NZ(regs.a); |
| 470 | } | 468 | } |
| 471 | 469 | ||
| 472 | static void | 470 | void |
| 473 | ldx(uint8_t arg) | 471 | LDX(uint16_t arg) |
| 474 | { | 472 | { |
| 475 | regs.x = arg; | 473 | regs.x = arg; |
| 476 | 474 | ||
| 477 | STATUS_UPDATE_NZ(regs.x); | 475 | STATUS_UPDATE_NZ(regs.x); |
| 478 | } | 476 | } |
| 479 | 477 | ||
| 480 | static void | 478 | void |
| 481 | ldy(uint8_t arg) | 479 | LDY(uint16_t arg) |
| 482 | { | 480 | { |
| 483 | regs.y = arg; | 481 | regs.y = arg; |
| 484 | 482 | ||
| 485 | STATUS_UPDATE_NZ(regs.y); | 483 | STATUS_UPDATE_NZ(regs.y); |
| 486 | } | 484 | } |
| 487 | 485 | ||
| 488 | static void | 486 | void |
| 489 | lsr_acc(void) | 487 | LSR_acc(uint16_t arg) |
| 490 | { | 488 | { |
| 491 | regs.status.carry = regs.a & 1; // bit 0 in carry | 489 | regs.status.carry = regs.a & 1; // bit 0 in carry |
| 492 | regs.a >>= 1; | 490 | regs.a >>= 1; |
| @@ -495,8 +493,8 @@ lsr_acc(void) | |||
| 495 | STATUS_UPDATE_NZ(regs.a); | 493 | STATUS_UPDATE_NZ(regs.a); |
| 496 | } | 494 | } |
| 497 | 495 | ||
| 498 | static void | 496 | void |
| 499 | lsr(uint16_t mem) | 497 | LSR(uint16_t mem) |
| 500 | { | 498 | { |
| 501 | uint8_t tmp; | 499 | uint8_t tmp; |
| 502 | 500 | ||
| @@ -511,42 +509,42 @@ lsr(uint16_t mem) | |||
| 511 | STATUS_UPDATE_NZ(tmp); | 509 | STATUS_UPDATE_NZ(tmp); |
| 512 | } | 510 | } |
| 513 | 511 | ||
| 514 | static void | 512 | void |
| 515 | nop(void) | 513 | NOP(uint16_t arg) |
| 516 | { | 514 | { |
| 517 | return; | 515 | return; |
| 518 | } | 516 | } |
| 519 | 517 | ||
| 520 | static void | 518 | void |
| 521 | ora(uint8_t arg) | 519 | ORA(uint16_t arg) |
| 522 | { | 520 | { |
| 523 | regs.a |= arg; | 521 | regs.a |= arg; |
| 524 | 522 | ||
| 525 | STATUS_UPDATE_NZ(regs.a); | 523 | STATUS_UPDATE_NZ(regs.a); |
| 526 | } | 524 | } |
| 527 | 525 | ||
| 528 | static void | 526 | void |
| 529 | pha(void) | 527 | PHA(uint16_t arg) |
| 530 | { | 528 | { |
| 531 | PUSH(regs.a); | 529 | PUSH(regs.a); |
| 532 | } | 530 | } |
| 533 | 531 | ||
| 534 | static void | 532 | void |
| 535 | php(void) | 533 | PHP(uint16_t arg) |
| 536 | { | 534 | { |
| 537 | PUSH(STATUS_TO_INT() | (1 << 4)); | 535 | PUSH(STATUS_TO_INT() | (1 << 4)); |
| 538 | } | 536 | } |
| 539 | 537 | ||
| 540 | static void | 538 | void |
| 541 | pla(void) | 539 | PLA(uint16_t arg) |
| 542 | { | 540 | { |
| 543 | regs.a = PULL(); | 541 | regs.a = PULL(); |
| 544 | 542 | ||
| 545 | STATUS_UPDATE_NZ(regs.a); | 543 | STATUS_UPDATE_NZ(regs.a); |
| 546 | } | 544 | } |
| 547 | 545 | ||
| 548 | static void | 546 | void |
| 549 | plp(void) | 547 | PLP(uint16_t arg) |
| 550 | { | 548 | { |
| 551 | uint8_t status; | 549 | uint8_t status; |
| 552 | 550 | ||
| @@ -562,8 +560,8 @@ plp(void) | |||
| 562 | regs.status.negative = (status & (1 << 7)) != 0; | 560 | regs.status.negative = (status & (1 << 7)) != 0; |
| 563 | } | 561 | } |
| 564 | 562 | ||
| 565 | static void | 563 | void |
| 566 | rol_acc(void) | 564 | ROL_acc(uint16_t arg) |
| 567 | { | 565 | { |
| 568 | uint8_t carry; | 566 | uint8_t carry; |
| 569 | carry = (regs.a & (1 << 7)) != 0; | 567 | carry = (regs.a & (1 << 7)) != 0; |
| @@ -575,8 +573,8 @@ rol_acc(void) | |||
| 575 | STATUS_UPDATE_NZ(regs.a); | 573 | STATUS_UPDATE_NZ(regs.a); |
| 576 | } | 574 | } |
| 577 | 575 | ||
| 578 | static void | 576 | void |
| 579 | rol(uint16_t mem) | 577 | ROL(uint16_t mem) |
| 580 | { | 578 | { |
| 581 | uint8_t carry, tmp; | 579 | uint8_t carry, tmp; |
| 582 | carry = (peek(mem) & (1 << 7)) != 0; | 580 | carry = (peek(mem) & (1 << 7)) != 0; |
| @@ -588,8 +586,8 @@ rol(uint16_t mem) | |||
| 588 | STATUS_UPDATE_NZ(regs.a); | 586 | STATUS_UPDATE_NZ(regs.a); |
| 589 | } | 587 | } |
| 590 | 588 | ||
| 591 | static void | 589 | void |
| 592 | ror_acc(void) | 590 | ROR_acc(uint16_t arg) |
| 593 | { | 591 | { |
| 594 | uint8_t carry; | 592 | uint8_t carry; |
| 595 | carry = regs.a & 1; | 593 | carry = regs.a & 1; |
| @@ -601,8 +599,8 @@ ror_acc(void) | |||
| 601 | STATUS_UPDATE_NZ(regs.a); | 599 | STATUS_UPDATE_NZ(regs.a); |
| 602 | } | 600 | } |
| 603 | 601 | ||
| 604 | static void | 602 | void |
| 605 | ror(uint16_t mem) | 603 | ROR(uint16_t mem) |
| 606 | { | 604 | { |
| 607 | uint8_t carry, tmp; | 605 | uint8_t carry, tmp; |
| 608 | carry = peek(mem) & 1; | 606 | carry = peek(mem) & 1; |
| @@ -614,89 +612,83 @@ ror(uint16_t mem) | |||
| 614 | STATUS_UPDATE_NZ(tmp); | 612 | STATUS_UPDATE_NZ(tmp); |
| 615 | } | 613 | } |
| 616 | 614 | ||
| 617 | static void | 615 | void |
| 618 | rti(void) | 616 | RTI(uint16_t arg) |
| 619 | { | 617 | { |
| 620 | plp(); | 618 | PLP(0); |
| 621 | regs.pc = PULL() | (PULL() << 8); | 619 | regs.pc = PULL() | (PULL() << 8); |
| 622 | } | 620 | } |
| 623 | 621 | ||
| 624 | static void | 622 | void |
| 625 | rts(void) | 623 | RTS(uint16_t arg) |
| 626 | { | 624 | { |
| 627 | regs.pc = (PULL() | (PULL() << 8)) + 1; | 625 | regs.pc = (PULL() | (PULL() << 8)) + 1; |
| 628 | } | 626 | } |
| 629 | 627 | ||
| 630 | static void | 628 | void |
| 631 | sbc(uint8_t arg) | 629 | SBC(uint16_t arg) |
| 632 | { | 630 | { |
| 633 | /* SBC is described online as ADC with argument as two's complement */ | 631 | /* SBC is described online as ADC with argument as two's complement */ |
| 634 | adc(~arg); | 632 | ADC(~(uint8_t)arg); |
| 635 | } | 633 | } |
| 636 | 634 | ||
| 637 | static void | 635 | void |
| 638 | sec(void) | 636 | SEC(uint16_t arg) |
| 639 | { | 637 | { |
| 640 | regs.status.carry = 1; | 638 | regs.status.carry = 1; |
| 641 | } | 639 | } |
| 642 | 640 | ||
| 643 | static void | 641 | void |
| 644 | sed(void) | 642 | SED(uint16_t arg) |
| 645 | { | 643 | { |
| 646 | regs.status.decimal_mode = 1; | 644 | regs.status.decimal_mode = 1; |
| 647 | } | 645 | } |
| 648 | 646 | ||
| 649 | static void | 647 | void |
| 650 | sei(void) | 648 | SEI(uint16_t arg) |
| 651 | { | 649 | { |
| 652 | regs.status.interrupt_disable = 1; | 650 | regs.status.interrupt_disable = 1; |
| 653 | } | 651 | } |
| 654 | 652 | ||
| 655 | static uint8_t | 653 | void |
| 656 | sta(uint16_t mem) | 654 | STA(uint16_t mem) |
| 657 | { | 655 | { |
| 658 | uint8_t tmp = peek(mem); | 656 | uint8_t tmp = peek(mem); |
| 659 | memwrite(mem, regs.a); | 657 | memwrite(mem, regs.a); |
| 660 | |||
| 661 | return tmp; | ||
| 662 | } | 658 | } |
| 663 | 659 | ||
| 664 | static uint8_t | 660 | void |
| 665 | stx(uint16_t mem) | 661 | STX(uint16_t mem) |
| 666 | { | 662 | { |
| 667 | uint8_t tmp = peek(mem); | 663 | uint8_t tmp = peek(mem); |
| 668 | memwrite(mem, regs.x); | 664 | memwrite(mem, regs.x); |
| 669 | |||
| 670 | return tmp; | ||
| 671 | } | 665 | } |
| 672 | 666 | ||
| 673 | static uint8_t | 667 | void |
| 674 | sty(uint16_t mem) | 668 | STY(uint16_t mem) |
| 675 | { | 669 | { |
| 676 | uint8_t tmp = peek(mem); | 670 | uint8_t tmp = peek(mem); |
| 677 | memwrite(mem, regs.y); | 671 | memwrite(mem, regs.y); |
| 678 | |||
| 679 | return tmp; | ||
| 680 | } | 672 | } |
| 681 | 673 | ||
| 682 | static void | 674 | void |
| 683 | tax(void) | 675 | TAX(uint16_t arg) |
| 684 | { | 676 | { |
| 685 | regs.x = regs.a; | 677 | regs.x = regs.a; |
| 686 | 678 | ||
| 687 | STATUS_UPDATE_NZ(regs.x); | 679 | STATUS_UPDATE_NZ(regs.x); |
| 688 | } | 680 | } |
| 689 | 681 | ||
| 690 | static void | 682 | void |
| 691 | tay(void) | 683 | TAY(uint16_t arg) |
| 692 | { | 684 | { |
| 693 | regs.y = regs.a; | 685 | regs.y = regs.a; |
| 694 | 686 | ||
| 695 | STATUS_UPDATE_NZ(regs.y); | 687 | STATUS_UPDATE_NZ(regs.y); |
| 696 | } | 688 | } |
| 697 | 689 | ||
| 698 | static void | 690 | void |
| 699 | tsx(void) | 691 | TSX(uint16_t arg) |
| 700 | { | 692 | { |
| 701 | // regs.x = PULL(); | 693 | // regs.x = PULL(); |
| 702 | regs.x = regs.sp; | 694 | regs.x = regs.sp; |
| @@ -704,23 +696,23 @@ tsx(void) | |||
| 704 | STATUS_UPDATE_NZ(regs.x); | 696 | STATUS_UPDATE_NZ(regs.x); |
| 705 | } | 697 | } |
| 706 | 698 | ||
| 707 | static void | 699 | void |
| 708 | txa(void) | 700 | TXA(uint16_t arg) |
| 709 | { | 701 | { |
| 710 | regs.a = regs.x; | 702 | regs.a = regs.x; |
| 711 | 703 | ||
| 712 | STATUS_UPDATE_NZ(regs.a); | 704 | STATUS_UPDATE_NZ(regs.a); |
| 713 | } | 705 | } |
| 714 | 706 | ||
| 715 | static void | 707 | void |
| 716 | txs(void) | 708 | TXS(uint16_t arg) |
| 717 | { | 709 | { |
| 718 | // PUSH(regs.x); | 710 | // PUSH(regs.x); |
| 719 | regs.sp = regs.x; | 711 | regs.sp = regs.x; |
| 720 | } | 712 | } |
| 721 | 713 | ||
| 722 | static void | 714 | void |
| 723 | tya(void) | 715 | TYA(uint16_t arg) |
| 724 | { | 716 | { |
| 725 | regs.a = regs.y; | 717 | regs.a = regs.y; |
| 726 | 718 | ||
| @@ -730,1161 +722,68 @@ tya(void) | |||
| 730 | static void | 722 | static void |
| 731 | interpret(void) | 723 | interpret(void) |
| 732 | { | 724 | { |
| 733 | uint8_t opcode, did_memwrite, ret, status; | 725 | uint8_t op; |
| 734 | uint16_t arg, mem, deref; | 726 | uint16_t arg, mem, deref; |
| 735 | uint32_t cycles_; | ||
| 736 | enum addressing_mode mode; | 727 | enum addressing_mode mode; |
| 737 | struct registers regs_; | ||
| 738 | 728 | ||
| 739 | for (;;) { | 729 | for (;;) { |
| 740 | opcode = peek(regs.pc++); | 730 | printf("%04X ", regs.pc); |
| 741 | cycles_ = cycles; | 731 | |
| 742 | did_memwrite = 0; | 732 | op = peek(regs.pc++); |
| 743 | status = STATUS_TO_INT(); | 733 | |
| 744 | regs_ = regs; | 734 | printf("%02X", op); |
| 745 | 735 | for (uint8_t i = 0; i < opcodes[op].bytes - 1; i++) | |
| 746 | printf("%04X %02X", regs.pc - 1, opcode); | 736 | printf(" %02X", peek(regs.pc + i)); |
| 747 | 737 | printf("\t%s ", opcodes[op].name); | |
| 748 | switch (opcode) { | 738 | |
| 749 | case 0x69: | 739 | mode = opcodes[op].mode; |
| 750 | mode = AM_IMM; | 740 | arg = opcode_mem(mode); |
| 751 | arg = opcode_arg(mode); | ||
| 752 | adc(arg); | ||
| 753 | cycles += 2; | ||
| 754 | printf("ADC"); | ||
| 755 | break; | ||
| 756 | case 0x65: | ||
| 757 | mode = AM_ZP; | ||
| 758 | arg = opcode_arg(mode); | ||
| 759 | adc(arg); | ||
| 760 | cycles += 3; | ||
| 761 | printf("ADC"); | ||
| 762 | break; | ||
| 763 | case 0x75: | ||
| 764 | mode = AM_ZP_X; | ||
| 765 | arg = opcode_arg(mode); | ||
| 766 | adc(arg); | ||
| 767 | cycles += 4; | ||
| 768 | printf("ADC"); | ||
| 769 | break; | ||
| 770 | case 0x6d: | ||
| 771 | mode = AM_ABS; | ||
| 772 | arg = opcode_arg(mode); | ||
| 773 | adc(arg); | ||
| 774 | cycles += 4; | ||
| 775 | printf("ADC"); | ||
| 776 | break; | ||
| 777 | case 0x7d: | ||
| 778 | mode = AM_ABS_X; | ||
| 779 | arg = opcode_arg(mode); | ||
| 780 | adc(arg); | ||
| 781 | cycles += 4; | ||
| 782 | printf("ADC"); | ||
| 783 | break; | ||
| 784 | case 0x79: | ||
| 785 | mode = AM_ABS_Y; | ||
| 786 | arg = opcode_arg(mode); | ||
| 787 | adc(arg); | ||
| 788 | cycles += 4; | ||
| 789 | printf("ADC"); | ||
| 790 | break; | ||
| 791 | case 0x61: | ||
| 792 | mode = AM_IND_X; | ||
| 793 | arg = opcode_arg(mode); | ||
| 794 | adc(arg); | ||
| 795 | cycles += 6; | ||
| 796 | printf("ADC"); | ||
| 797 | break; | ||
| 798 | case 0x71: | ||
| 799 | mode = AM_IND_Y; | ||
| 800 | arg = opcode_arg(mode); | ||
| 801 | adc(arg); | ||
| 802 | cycles += 5; | ||
| 803 | printf("ADC"); | ||
| 804 | break; | ||
| 805 | case 0x29: | ||
| 806 | mode = AM_IMM; | ||
| 807 | arg = opcode_arg(mode); | ||
| 808 | and(arg); | ||
| 809 | cycles += 2; | ||
| 810 | printf("AND"); | ||
| 811 | break; | ||
| 812 | case 0x25: | ||
| 813 | mode = AM_ZP; | ||
| 814 | arg = opcode_arg(mode); | ||
| 815 | and(arg); | ||
| 816 | cycles += 3; | ||
| 817 | printf("AND"); | ||
| 818 | break; | ||
| 819 | case 0x35: | ||
| 820 | mode = AM_ZP_X; | ||
| 821 | arg = opcode_arg(mode); | ||
| 822 | and(arg); | ||
| 823 | cycles += 4; | ||
| 824 | printf("AND"); | ||
| 825 | break; | ||
| 826 | case 0x2d: | ||
| 827 | mode = AM_ABS; | ||
| 828 | arg = opcode_arg(mode); | ||
| 829 | and(arg); | ||
| 830 | cycles += 4; | ||
| 831 | printf("AND"); | ||
| 832 | break; | ||
| 833 | case 0x3d: | ||
| 834 | mode = AM_ABS_X; | ||
| 835 | arg = opcode_arg(mode); | ||
| 836 | and(arg); | ||
| 837 | cycles += 4; | ||
| 838 | printf("AND"); | ||
| 839 | break; | ||
| 840 | case 0x39: | ||
| 841 | mode = AM_ABS_Y; | ||
| 842 | arg = opcode_arg(mode); | ||
| 843 | and(arg); | ||
| 844 | cycles += 4; | ||
| 845 | printf("AND"); | ||
| 846 | break; | ||
| 847 | case 0x21: | ||
| 848 | mode = AM_IND_X; | ||
| 849 | arg = opcode_arg(mode); | ||
| 850 | and(arg); | ||
| 851 | cycles += 6; | ||
| 852 | printf("AND"); | ||
| 853 | break; | ||
| 854 | case 0x31: | ||
| 855 | mode = AM_IND_Y; | ||
| 856 | arg = opcode_arg(mode); | ||
| 857 | and(arg); | ||
| 858 | cycles += 5; | ||
| 859 | printf("AND"); | ||
| 860 | break; | ||
| 861 | case 0x0a: | ||
| 862 | mode = AM_ACC; | ||
| 863 | asl_acc(); | ||
| 864 | cycles += 2; | ||
| 865 | printf("\tASL"); | ||
| 866 | break; | ||
| 867 | case 0x06: | ||
| 868 | mode = AM_ZP; | ||
| 869 | arg = opcode_mem(mode); | ||
| 870 | asl(arg); | ||
| 871 | cycles += 5; | ||
| 872 | printf("ASL"); | ||
| 873 | break; | ||
| 874 | case 0x16: | ||
| 875 | mode = AM_ZP_X; | ||
| 876 | arg = opcode_mem(mode); | ||
| 877 | asl(arg); | ||
| 878 | cycles += 6; | ||
| 879 | printf("ASL"); | ||
| 880 | break; | ||
| 881 | case 0x0e: | ||
| 882 | mode = AM_ABS; | ||
| 883 | arg = opcode_mem(mode); | ||
| 884 | asl(arg); | ||
| 885 | cycles += 6; | ||
| 886 | printf("ASL"); | ||
| 887 | break; | ||
| 888 | case 0x1e: | ||
| 889 | mode = AM_ABS_X; | ||
| 890 | arg = opcode_mem(mode); | ||
| 891 | asl(arg); | ||
| 892 | cycles += 6; | ||
| 893 | printf("ASL"); | ||
| 894 | break; | ||
| 895 | case 0x90: | ||
| 896 | mode = AM_REL; | ||
| 897 | arg = opcode_arg(mode); | ||
| 898 | bcc(arg); | ||
| 899 | arg += regs_.pc + 1; | ||
| 900 | cycles += 2; | ||
| 901 | printf("BCC"); | ||
| 902 | break; | ||
| 903 | case 0xb0: | ||
| 904 | mode = AM_REL; | ||
| 905 | arg = opcode_arg(mode); | ||
| 906 | bcs(arg); | ||
| 907 | arg += regs_.pc + 1; | ||
| 908 | cycles += 2; | ||
| 909 | printf("BCS"); | ||
| 910 | break; | ||
| 911 | case 0xf0: | ||
| 912 | mode = AM_REL; | ||
| 913 | arg = opcode_arg(mode); | ||
| 914 | beq(arg); | ||
| 915 | arg += regs_.pc + 1; | ||
| 916 | cycles += 2; | ||
| 917 | printf("BEQ"); | ||
| 918 | break; | ||
| 919 | case 0x89: | ||
| 920 | mode = AM_IMM; | ||
| 921 | arg = opcode_arg(mode); | ||
| 922 | did_memwrite = 1; | ||
| 923 | ret = bit(arg); | ||
| 924 | cycles += 2; | ||
| 925 | printf("BIT"); | ||
| 926 | break; | ||
| 927 | case 0x24: | ||
| 928 | mode = AM_ZP; | ||
| 929 | arg = opcode_arg(mode); | ||
| 930 | did_memwrite = 1; | ||
| 931 | ret = bit(arg); | ||
| 932 | cycles += 3; | ||
| 933 | printf("BIT"); | ||
| 934 | break; | ||
| 935 | case 0x34: | ||
| 936 | mode = AM_ZP_X; | ||
| 937 | arg = opcode_arg(mode); | ||
| 938 | did_memwrite = 1; | ||
| 939 | ret = bit(arg); | ||
| 940 | cycles += 4; | ||
| 941 | printf("BIT"); | ||
| 942 | break; | ||
| 943 | case 0x2c: | ||
| 944 | mode = AM_ABS; | ||
| 945 | arg = opcode_arg(mode); | ||
| 946 | did_memwrite = 1; | ||
| 947 | ret = bit(arg); | ||
| 948 | cycles += 4; | ||
| 949 | printf("BIT"); | ||
| 950 | break; | ||
| 951 | case 0x3c: | ||
| 952 | mode = AM_ABS_X; | ||
| 953 | arg = opcode_arg(mode); | ||
| 954 | did_memwrite = 1; | ||
| 955 | ret = bit(arg); | ||
| 956 | cycles += 4; | ||
| 957 | printf("BIT"); | ||
| 958 | break; | ||
| 959 | case 0x30: | ||
| 960 | mode = AM_REL; | ||
| 961 | arg = opcode_arg(mode); | ||
| 962 | bmi(arg); | ||
| 963 | arg += regs_.pc + 1; | ||
| 964 | cycles += 2; | ||
| 965 | printf("BMI"); | ||
| 966 | break; | ||
| 967 | case 0xd0: | ||
| 968 | mode = AM_REL; | ||
| 969 | arg = opcode_arg(mode); | ||
| 970 | bne(arg); | ||
| 971 | arg += regs_.pc + 1; | ||
| 972 | cycles += 2; | ||
| 973 | printf("BNE"); | ||
| 974 | break; | ||
| 975 | case 0x10: | ||
| 976 | mode = AM_REL; | ||
| 977 | arg = opcode_arg(mode); | ||
| 978 | bpl(arg); | ||
| 979 | arg += regs_.pc + 1; | ||
| 980 | cycles += 2; | ||
| 981 | printf("BPL"); | ||
| 982 | break; | ||
| 983 | case 0x00: | ||
| 984 | mode = AM_IMPLICIT; | ||
| 985 | brk(); | ||
| 986 | cycles += 7; | ||
| 987 | printf("\tBRK"); | ||
| 988 | goto loop_exit; | ||
| 989 | case 0x50: | ||
| 990 | mode = AM_REL; | ||
| 991 | arg = opcode_arg(mode); | ||
| 992 | bvc(arg); | ||
| 993 | arg += regs_.pc + 1; | ||
| 994 | cycles += 2; | ||
| 995 | printf("BVC"); | ||
| 996 | break; | ||
| 997 | case 0x70: | ||
| 998 | mode = AM_REL; | ||
| 999 | arg = opcode_arg(mode); | ||
| 1000 | bvs(arg); | ||
| 1001 | arg += regs_.pc + 1; | ||
| 1002 | cycles += 2; | ||
| 1003 | printf("BVS"); | ||
| 1004 | break; | ||
| 1005 | case 0x18: | ||
| 1006 | mode = AM_IMPLICIT; | ||
| 1007 | clc(); | ||
| 1008 | cycles += 2; | ||
| 1009 | printf("\tCLC"); | ||
| 1010 | break; | ||
| 1011 | case 0xd8: | ||
| 1012 | mode = AM_IMPLICIT; | ||
| 1013 | cld(); | ||
| 1014 | cycles += 2; | ||
| 1015 | printf("\tCLD"); | ||
| 1016 | break; | ||
| 1017 | case 0x58: | ||
| 1018 | mode = AM_IMPLICIT; | ||
| 1019 | cli(); | ||
| 1020 | cycles += 2; | ||
| 1021 | printf("\tCLI"); | ||
| 1022 | break; | ||
| 1023 | case 0xb8: | ||
| 1024 | mode = AM_IMPLICIT; | ||
| 1025 | clv(); | ||
| 1026 | cycles += 2; | ||
| 1027 | printf("\tCLV"); | ||
| 1028 | break; | ||
| 1029 | case 0xc9: | ||
| 1030 | mode = AM_IMM; | ||
| 1031 | arg = opcode_arg(mode); | ||
| 1032 | cmp(arg); | ||
| 1033 | cycles += 2; | ||
| 1034 | printf("CMP"); | ||
| 1035 | break; | ||
| 1036 | case 0xc5: | ||
| 1037 | mode = AM_ZP; | ||
| 1038 | arg = opcode_arg(mode); | ||
| 1039 | cmp(arg); | ||
| 1040 | cycles += 3; | ||
| 1041 | printf("CMP"); | ||
| 1042 | break; | ||
| 1043 | case 0xd5: | ||
| 1044 | mode = AM_ZP_X; | ||
| 1045 | arg = opcode_arg(mode); | ||
| 1046 | cmp(arg); | ||
| 1047 | cycles += 4; | ||
| 1048 | printf("CMP"); | ||
| 1049 | break; | ||
| 1050 | case 0xcd: | ||
| 1051 | mode = AM_ABS; | ||
| 1052 | arg = opcode_arg(mode); | ||
| 1053 | cmp(arg); | ||
| 1054 | cycles += 4; | ||
| 1055 | printf("CMP"); | ||
| 1056 | break; | ||
| 1057 | case 0xdd: | ||
| 1058 | mode = AM_ABS_X; | ||
| 1059 | arg = opcode_arg(mode); | ||
| 1060 | cmp(arg); | ||
| 1061 | cycles += 4; | ||
| 1062 | printf("CMP"); | ||
| 1063 | break; | ||
| 1064 | case 0xd9: | ||
| 1065 | mode = AM_ABS_Y; | ||
| 1066 | arg = opcode_arg(mode); | ||
| 1067 | cmp(arg); | ||
| 1068 | cycles += 4; | ||
| 1069 | printf("CMP"); | ||
| 1070 | break; | ||
| 1071 | case 0xc1: | ||
| 1072 | mode = AM_IND_X; | ||
| 1073 | arg = opcode_arg(mode); | ||
| 1074 | cmp(arg); | ||
| 1075 | cycles += 6; | ||
| 1076 | printf("CMP"); | ||
| 1077 | break; | ||
| 1078 | case 0xd1: | ||
| 1079 | mode = AM_IND_Y; | ||
| 1080 | arg = opcode_arg(mode); | ||
| 1081 | cmp(arg); | ||
| 1082 | cycles += 5; | ||
| 1083 | printf("CMP"); | ||
| 1084 | break; | ||
| 1085 | case 0xe0: | ||
| 1086 | mode = AM_IMM; | ||
| 1087 | arg = opcode_arg(mode); | ||
| 1088 | cpx(arg); | ||
| 1089 | cycles += 2; | ||
| 1090 | printf("CPX"); | ||
| 1091 | break; | ||
| 1092 | case 0xe4: | ||
| 1093 | mode = AM_ZP; | ||
| 1094 | arg = opcode_arg(mode); | ||
| 1095 | cpx(arg); | ||
| 1096 | cycles += 3; | ||
| 1097 | printf("CPX"); | ||
| 1098 | break; | ||
| 1099 | case 0xec: | ||
| 1100 | mode = AM_ABS; | ||
| 1101 | arg = opcode_arg(mode); | ||
| 1102 | cpx(arg); | ||
| 1103 | cycles += 4; | ||
| 1104 | printf("CPX"); | ||
| 1105 | break; | ||
| 1106 | case 0xc0: | ||
| 1107 | mode = AM_IMM; | ||
| 1108 | arg = opcode_arg(mode); | ||
| 1109 | cpy(arg); | ||
| 1110 | cycles += 2; | ||
| 1111 | printf("CPY"); | ||
| 1112 | break; | ||
| 1113 | case 0xc4: | ||
| 1114 | mode = AM_ZP; | ||
| 1115 | arg = opcode_arg(mode); | ||
| 1116 | cpy(arg); | ||
| 1117 | cycles += 3; | ||
| 1118 | printf("CPY"); | ||
| 1119 | break; | ||
| 1120 | case 0xcc: | ||
| 1121 | mode = AM_ABS; | ||
| 1122 | arg = opcode_arg(mode); | ||
| 1123 | cpy(arg); | ||
| 1124 | cycles += 4; | ||
| 1125 | printf("CPY"); | ||
| 1126 | break; | ||
| 1127 | case 0xc6: | ||
| 1128 | mode = AM_ZP; | ||
| 1129 | arg = opcode_mem(mode); | ||
| 1130 | dec(arg); | ||
| 1131 | cycles += 5; | ||
| 1132 | printf("DEC"); | ||
| 1133 | break; | ||
| 1134 | case 0xd6: | ||
| 1135 | mode = AM_ZP_X; | ||
| 1136 | arg = opcode_mem(mode); | ||
| 1137 | dec(arg); | ||
| 1138 | cycles += 6; | ||
| 1139 | printf("DEC"); | ||
| 1140 | break; | ||
| 1141 | case 0xce: | ||
| 1142 | mode = AM_ABS; | ||
| 1143 | arg = opcode_mem(mode); | ||
| 1144 | dec(arg); | ||
| 1145 | cycles += 6; | ||
| 1146 | printf("DEC"); | ||
| 1147 | break; | ||
| 1148 | case 0xde: | ||
| 1149 | mode = AM_ABS_X; | ||
| 1150 | arg = opcode_mem(mode); | ||
| 1151 | dec(arg); | ||
| 1152 | cycles += 7; | ||
| 1153 | printf("DEC"); | ||
| 1154 | break; | ||
| 1155 | case 0xca: | ||
| 1156 | mode = AM_IMPLICIT; | ||
| 1157 | dex(); | ||
| 1158 | cycles += 2; | ||
| 1159 | printf("\tDEX"); | ||
| 1160 | break; | ||
| 1161 | case 0x88: | ||
| 1162 | mode = AM_IMPLICIT; | ||
| 1163 | dey(); | ||
| 1164 | cycles += 2; | ||
| 1165 | printf("\tDEY"); | ||
| 1166 | break; | ||
| 1167 | case 0x49: | ||
| 1168 | mode = AM_IMM; | ||
| 1169 | arg = opcode_arg(mode); | ||
| 1170 | eor(arg); | ||
| 1171 | cycles += 2; | ||
| 1172 | printf("EOR"); | ||
| 1173 | break; | ||
| 1174 | case 0x45: | ||
| 1175 | mode = AM_ZP; | ||
| 1176 | arg = opcode_arg(mode); | ||
| 1177 | eor(arg); | ||
| 1178 | cycles += 3; | ||
| 1179 | printf("EOR"); | ||
| 1180 | break; | ||
| 1181 | case 0x55: | ||
| 1182 | mode = AM_ZP_X; | ||
| 1183 | arg = opcode_arg(mode); | ||
| 1184 | eor(arg); | ||
| 1185 | cycles += 4; | ||
| 1186 | printf("EOR"); | ||
| 1187 | break; | ||
| 1188 | case 0x4d: | ||
| 1189 | mode = AM_ABS; | ||
| 1190 | arg = opcode_arg(mode); | ||
| 1191 | eor(arg); | ||
| 1192 | cycles += 4; | ||
| 1193 | printf("EOR"); | ||
| 1194 | break; | ||
| 1195 | case 0x5d: | ||
| 1196 | mode = AM_ABS_X; | ||
| 1197 | arg = opcode_arg(mode); | ||
| 1198 | eor(arg); | ||
| 1199 | cycles += 4; | ||
| 1200 | printf("EOR"); | ||
| 1201 | break; | ||
| 1202 | case 0x59: | ||
| 1203 | mode = AM_ABS_Y; | ||
| 1204 | arg = opcode_arg(mode); | ||
| 1205 | eor(arg); | ||
| 1206 | cycles += 4; | ||
| 1207 | printf("EOR"); | ||
| 1208 | break; | ||
| 1209 | case 0x41: | ||
| 1210 | mode = AM_IND_X; | ||
| 1211 | arg = opcode_arg(mode); | ||
| 1212 | eor(arg); | ||
| 1213 | cycles += 6; | ||
| 1214 | printf("EOR"); | ||
| 1215 | break; | ||
| 1216 | case 0x51: | ||
| 1217 | mode = AM_IND_Y; | ||
| 1218 | arg = opcode_arg(mode); | ||
| 1219 | eor(arg); | ||
| 1220 | cycles += 5; | ||
| 1221 | printf("EOR"); | ||
| 1222 | break; | ||
| 1223 | case 0xe6: | ||
| 1224 | mode = AM_ZP; | ||
| 1225 | arg = opcode_arg(mode); | ||
| 1226 | inc(arg); | ||
| 1227 | cycles += 5; | ||
| 1228 | printf("INC"); | ||
| 1229 | break; | ||
| 1230 | case 0xf6: | ||
| 1231 | mode = AM_ZP_X; | ||
| 1232 | arg = opcode_arg(mode); | ||
| 1233 | inc(arg); | ||
| 1234 | cycles += 6; | ||
| 1235 | printf("INC"); | ||
| 1236 | break; | ||
| 1237 | case 0xee: | ||
| 1238 | mode = AM_ABS; | ||
| 1239 | arg = opcode_mem(mode); | ||
| 1240 | inc(arg); | ||
| 1241 | cycles += 6; | ||
| 1242 | printf("INC"); | ||
| 1243 | break; | ||
| 1244 | case 0xfe: | ||
| 1245 | mode = AM_ABS_X; | ||
| 1246 | arg = opcode_arg(mode); | ||
| 1247 | inc(arg); | ||
| 1248 | cycles += 7; | ||
| 1249 | printf("INC"); | ||
| 1250 | break; | ||
| 1251 | case 0xe8: | ||
| 1252 | mode = AM_IMPLICIT; | ||
| 1253 | inx(); | ||
| 1254 | cycles += 2; | ||
| 1255 | printf("\tINX"); | ||
| 1256 | break; | ||
| 1257 | case 0xc8: | ||
| 1258 | mode = AM_IMPLICIT; | ||
| 1259 | iny(); | ||
| 1260 | cycles += 2; | ||
| 1261 | printf("\tINY"); | ||
| 1262 | break; | ||
| 1263 | case 0x4c: | ||
| 1264 | mode = AM_ABS; | ||
| 1265 | arg = opcode_mem(mode); | ||
| 1266 | jmp(arg); | ||
| 1267 | cycles += 3; | ||
| 1268 | printf("JMP"); | ||
| 1269 | break; | ||
| 1270 | case 0x6c: | ||
| 1271 | mode = AM_IND; | ||
| 1272 | mem = peek16(regs.pc); | ||
| 1273 | deref = peek16(mem); | ||
| 1274 | arg = opcode_mem(mode); | ||
| 1275 | deref = arg; | ||
| 1276 | jmp(arg); | ||
| 1277 | cycles += 6; | ||
| 1278 | printf("JMP"); | ||
| 1279 | break; | ||
| 1280 | case 0x7c: | ||
| 1281 | mode = AM_ABS_X; | ||
| 1282 | arg = opcode_arg(mode); | ||
| 1283 | jmp(arg); | ||
| 1284 | cycles += 6; | ||
| 1285 | printf("JMP"); | ||
| 1286 | break; | ||
| 1287 | case 0x20: | ||
| 1288 | mode = AM_ABS; | ||
| 1289 | arg = opcode_mem(mode); | ||
| 1290 | jsr(arg); | ||
| 1291 | cycles += 6; | ||
| 1292 | printf("JSR"); | ||
| 1293 | break; | ||
| 1294 | case 0xa9: | ||
| 1295 | mode = AM_IMM; | ||
| 1296 | arg = opcode_arg(mode); | ||
| 1297 | lda(arg); | ||
| 1298 | cycles += 2; | ||
| 1299 | printf("LDA"); | ||
| 1300 | break; | ||
| 1301 | case 0xa5: | ||
| 1302 | mode = AM_ZP; | ||
| 1303 | arg = opcode_arg(mode); | ||
| 1304 | lda(arg); | ||
| 1305 | cycles += 3; | ||
| 1306 | printf("LDA"); | ||
| 1307 | break; | ||
| 1308 | case 0xb5: | ||
| 1309 | mode = AM_ZP_X; | ||
| 1310 | arg = opcode_arg(mode); | ||
| 1311 | lda(arg); | ||
| 1312 | cycles += 4; | ||
| 1313 | printf("LDA"); | ||
| 1314 | break; | ||
| 1315 | case 0xad: | ||
| 1316 | mode = AM_ABS; | ||
| 1317 | arg = opcode_arg(mode); | ||
| 1318 | lda(arg); | ||
| 1319 | cycles += 4; | ||
| 1320 | printf("LDA"); | ||
| 1321 | break; | ||
| 1322 | case 0xbd: | ||
| 1323 | mode = AM_ABS_X; | ||
| 1324 | arg = opcode_arg(mode); | ||
| 1325 | lda(arg); | ||
| 1326 | cycles += 4; | ||
| 1327 | printf("LDA"); | ||
| 1328 | break; | ||
| 1329 | case 0xb9: | ||
| 1330 | mode = AM_ABS_Y; | ||
| 1331 | arg = opcode_arg(mode); | ||
| 1332 | lda(arg); | ||
| 1333 | cycles += 4; | ||
| 1334 | printf("LDA"); | ||
| 1335 | break; | ||
| 1336 | case 0xa1: | ||
| 1337 | mode = AM_IND_X; | ||
| 1338 | arg = opcode_arg(mode); | ||
| 1339 | lda(arg); | ||
| 1340 | cycles += 6; | ||
| 1341 | printf("LDA"); | ||
| 1342 | break; | ||
| 1343 | case 0xb1: | ||
| 1344 | mode = AM_IND_Y; | ||
| 1345 | arg = opcode_arg(mode); | ||
| 1346 | lda(arg); | ||
| 1347 | cycles += 5; | ||
| 1348 | printf("LDA"); | ||
| 1349 | break; | ||
| 1350 | case 0xa2: | ||
| 1351 | mode = AM_IMM; | ||
| 1352 | arg = opcode_mem(mode); | ||
| 1353 | ldx(arg); | ||
| 1354 | cycles += 2; | ||
| 1355 | printf("LDX"); | ||
| 1356 | break; | ||
| 1357 | case 0xa6: | ||
| 1358 | mode = AM_ZP; | ||
| 1359 | arg = opcode_arg(mode); | ||
| 1360 | ldx(arg); | ||
| 1361 | cycles += 3; | ||
| 1362 | printf("LDX"); | ||
| 1363 | break; | ||
| 1364 | case 0xb6: | ||
| 1365 | mode = AM_ZP_Y; | ||
| 1366 | arg = opcode_arg(mode); | ||
| 1367 | ldx(arg); | ||
| 1368 | cycles += 4; | ||
| 1369 | printf("LDX"); | ||
| 1370 | break; | ||
| 1371 | case 0xae: | ||
| 1372 | mode = AM_ABS; | ||
| 1373 | arg = opcode_arg(mode); | ||
| 1374 | ldx(arg); | ||
| 1375 | cycles += 4; | ||
| 1376 | printf("LDX"); | ||
| 1377 | break; | ||
| 1378 | case 0xbe: | ||
| 1379 | mode = AM_ABS_Y; | ||
| 1380 | arg = opcode_arg(mode); | ||
| 1381 | ldx(arg); | ||
| 1382 | cycles += 4; | ||
| 1383 | printf("LDX"); | ||
| 1384 | break; | ||
| 1385 | case 0xa0: | ||
| 1386 | mode = AM_IMM; | ||
| 1387 | arg = opcode_arg(mode); | ||
| 1388 | ldy(arg); | ||
| 1389 | cycles += 2; | ||
| 1390 | printf("LDY"); | ||
| 1391 | break; | ||
| 1392 | case 0xa4: | ||
| 1393 | mode = AM_ZP; | ||
| 1394 | arg = opcode_arg(mode); | ||
| 1395 | ldy(arg); | ||
| 1396 | cycles += 3; | ||
| 1397 | printf("LDY"); | ||
| 1398 | break; | ||
| 1399 | case 0xb4: | ||
| 1400 | mode = AM_ZP_X; | ||
| 1401 | arg = opcode_arg(mode); | ||
| 1402 | ldy(arg); | ||
| 1403 | cycles += 4; | ||
| 1404 | printf("LDY"); | ||
| 1405 | break; | ||
| 1406 | case 0xac: | ||
| 1407 | mode = AM_ABS; | ||
| 1408 | arg = opcode_arg(mode); | ||
| 1409 | ldy(arg); | ||
| 1410 | cycles += 4; | ||
| 1411 | printf("LDY"); | ||
| 1412 | break; | ||
| 1413 | case 0xbc: | ||
| 1414 | mode = AM_ABS_X; | ||
| 1415 | arg = opcode_arg(mode); | ||
| 1416 | ldy(arg); | ||
| 1417 | cycles += 4; | ||
| 1418 | printf("LDY"); | ||
| 1419 | break; | ||
| 1420 | case 0x4a: | ||
| 1421 | mode = AM_ACC; | ||
| 1422 | lsr_acc(); | ||
| 1423 | cycles += 2; | ||
| 1424 | printf("\tLSR"); | ||
| 1425 | break; | ||
| 1426 | case 0x46: | ||
| 1427 | mode = AM_ZP; | ||
| 1428 | arg = opcode_arg(mode); | ||
| 1429 | lsr(arg); | ||
| 1430 | cycles += 5; | ||
| 1431 | printf("LSR"); | ||
| 1432 | break; | ||
| 1433 | case 0x56: | ||
| 1434 | mode = AM_ZP_X; | ||
| 1435 | arg = opcode_arg(mode); | ||
| 1436 | lsr(arg); | ||
| 1437 | cycles += 6; | ||
| 1438 | printf("LSR"); | ||
| 1439 | break; | ||
| 1440 | case 0x4e: | ||
| 1441 | mode = AM_ABS; | ||
| 1442 | arg = opcode_mem(mode); | ||
| 1443 | lsr(arg); | ||
| 1444 | cycles += 6; | ||
| 1445 | printf("LSR"); | ||
| 1446 | break; | ||
| 1447 | case 0x5e: | ||
| 1448 | mode = AM_ABS_X; | ||
| 1449 | arg = opcode_mem(mode); | ||
| 1450 | lsr(arg); | ||
| 1451 | cycles += 6; | ||
| 1452 | printf("LSR"); | ||
| 1453 | break; | ||
| 1454 | case 0xea: | ||
| 1455 | mode = AM_IMPLICIT; | ||
| 1456 | nop(); | ||
| 1457 | cycles += 2; | ||
| 1458 | printf("\tNOP"); | ||
| 1459 | break; | ||
| 1460 | case 0x09: | ||
| 1461 | mode = AM_IMM; | ||
| 1462 | arg = opcode_arg(mode); | ||
| 1463 | ora(arg); | ||
| 1464 | cycles += 2; | ||
| 1465 | printf("ORA"); | ||
| 1466 | break; | ||
| 1467 | case 0x05: | ||
| 1468 | mode = AM_ZP; | ||
| 1469 | arg = opcode_arg(mode); | ||
| 1470 | ora(arg); | ||
| 1471 | cycles += 3; | ||
| 1472 | printf("ORA"); | ||
| 1473 | break; | ||
| 1474 | case 0x15: | ||
| 1475 | mode = AM_ZP_X; | ||
| 1476 | arg = opcode_arg(mode); | ||
| 1477 | ora(arg); | ||
| 1478 | cycles += 4; | ||
| 1479 | printf("ORA"); | ||
| 1480 | break; | ||
| 1481 | case 0x0d: | ||
| 1482 | mode = AM_ABS; | ||
| 1483 | arg = opcode_arg(mode); | ||
| 1484 | ora(arg); | ||
| 1485 | cycles += 4; | ||
| 1486 | printf("ORA"); | ||
| 1487 | break; | ||
| 1488 | case 0x1d: | ||
| 1489 | mode = AM_ABS_X; | ||
| 1490 | arg = opcode_arg(mode); | ||
| 1491 | ora(arg); | ||
| 1492 | cycles += 4; | ||
| 1493 | printf("ORA"); | ||
| 1494 | break; | ||
| 1495 | case 0x19: | ||
| 1496 | mode = AM_ABS_Y; | ||
| 1497 | arg = opcode_arg(mode); | ||
| 1498 | ora(arg); | ||
| 1499 | cycles += 4; | ||
| 1500 | printf("ORA"); | ||
| 1501 | break; | ||
| 1502 | case 0x01: | ||
| 1503 | mode = AM_IND_X; | ||
| 1504 | arg = opcode_arg(mode); | ||
| 1505 | ora(arg); | ||
| 1506 | cycles += 6; | ||
| 1507 | printf("ORA"); | ||
| 1508 | break; | ||
| 1509 | case 0x11: | ||
| 1510 | mode = AM_IND_Y; | ||
| 1511 | arg = opcode_arg(mode); | ||
| 1512 | ora(arg); | ||
| 1513 | cycles += 5; | ||
| 1514 | printf("ORA"); | ||
| 1515 | break; | ||
| 1516 | case 0x48: | ||
| 1517 | mode = AM_IMPLICIT; | ||
| 1518 | pha(); | ||
| 1519 | cycles += 3; | ||
| 1520 | printf("\tPHA"); | ||
| 1521 | break; | ||
| 1522 | case 0x08: | ||
| 1523 | mode = AM_IMPLICIT; | ||
| 1524 | php(); | ||
| 1525 | cycles += 3; | ||
| 1526 | printf("\tPHP"); | ||
| 1527 | break; | ||
| 1528 | case 0x68: | ||
| 1529 | mode = AM_IMPLICIT; | ||
| 1530 | pla(); | ||
| 1531 | cycles += 4; | ||
| 1532 | printf("\tPLA"); | ||
| 1533 | break; | ||
| 1534 | case 0x28: | ||
| 1535 | mode = AM_IMPLICIT; | ||
| 1536 | plp(); | ||
| 1537 | cycles += 4; | ||
| 1538 | printf("\tPLP"); | ||
| 1539 | break; | ||
| 1540 | case 0x2a: | ||
| 1541 | mode = AM_ACC; | ||
| 1542 | rol_acc(); | ||
| 1543 | cycles += 2; | ||
| 1544 | printf("\tROL"); | ||
| 1545 | break; | ||
| 1546 | case 0x26: | ||
| 1547 | mode = AM_ZP; | ||
| 1548 | arg = opcode_arg(mode); | ||
| 1549 | rol(arg); | ||
| 1550 | cycles += 5; | ||
| 1551 | printf("ROL"); | ||
| 1552 | break; | ||
| 1553 | case 0x36: | ||
| 1554 | mode = AM_ZP_X; | ||
| 1555 | arg = opcode_arg(mode); | ||
| 1556 | rol(arg); | ||
| 1557 | cycles += 6; | ||
| 1558 | printf("ROL"); | ||
| 1559 | break; | ||
| 1560 | case 0x2e: | ||
| 1561 | mode = AM_ABS; | ||
| 1562 | arg = opcode_arg(mode); | ||
| 1563 | rol(arg); | ||
| 1564 | cycles += 6; | ||
| 1565 | printf("ROL"); | ||
| 1566 | break; | ||
| 1567 | case 0x3e: | ||
| 1568 | mode = AM_ABS_X; | ||
| 1569 | arg = opcode_arg(mode); | ||
| 1570 | rol(arg); | ||
| 1571 | cycles += 6; | ||
| 1572 | printf("ROL"); | ||
| 1573 | break; | ||
| 1574 | case 0x6a: | ||
| 1575 | mode = AM_ACC; | ||
| 1576 | ror_acc(); | ||
| 1577 | cycles += 2; | ||
| 1578 | printf("\tROR"); | ||
| 1579 | break; | ||
| 1580 | case 0x66: | ||
| 1581 | mode = AM_ZP; | ||
| 1582 | arg = opcode_arg(mode); | ||
| 1583 | ror(arg); | ||
| 1584 | cycles += 5; | ||
| 1585 | printf("ROR"); | ||
| 1586 | break; | ||
| 1587 | case 0x76: | ||
| 1588 | mode = AM_ZP_X; | ||
| 1589 | arg = opcode_arg(mode); | ||
| 1590 | ror(arg); | ||
| 1591 | cycles += 6; | ||
| 1592 | printf("ROR"); | ||
| 1593 | break; | ||
| 1594 | case 0x6e: | ||
| 1595 | mode = AM_ABS; | ||
| 1596 | arg = opcode_arg(mode); | ||
| 1597 | ror(arg); | ||
| 1598 | cycles += 6; | ||
| 1599 | printf("ROR"); | ||
| 1600 | break; | ||
| 1601 | case 0x7e: | ||
| 1602 | mode = AM_ABS_X; | ||
| 1603 | arg = opcode_arg(mode); | ||
| 1604 | ror(arg); | ||
| 1605 | cycles += 6; | ||
| 1606 | printf("ROR"); | ||
| 1607 | break; | ||
| 1608 | case 0x40: | ||
| 1609 | mode = AM_IMPLICIT; | ||
| 1610 | rti(); | ||
| 1611 | cycles += 6; | ||
| 1612 | printf("\tRTI"); | ||
| 1613 | break; | ||
| 1614 | case 0x60: | ||
| 1615 | mode = AM_IMPLICIT; | ||
| 1616 | rts(); | ||
| 1617 | cycles += 6; | ||
| 1618 | printf("\tRTS"); | ||
| 1619 | break; | ||
| 1620 | case 0xe9: | ||
| 1621 | mode = AM_IMM; | ||
| 1622 | arg = opcode_arg(mode); | ||
| 1623 | sbc(arg); | ||
| 1624 | cycles += 2; | ||
| 1625 | printf("SBC"); | ||
| 1626 | break; | ||
| 1627 | case 0xe5: | ||
| 1628 | mode = AM_ZP; | ||
| 1629 | arg = opcode_arg(mode); | ||
| 1630 | sbc(arg); | ||
| 1631 | cycles += 3; | ||
| 1632 | printf("SBC"); | ||
| 1633 | break; | ||
| 1634 | case 0xf5: | ||
| 1635 | mode = AM_ZP_X; | ||
| 1636 | arg = opcode_arg(mode); | ||
| 1637 | sbc(arg); | ||
| 1638 | cycles += 4; | ||
| 1639 | printf("SBC"); | ||
| 1640 | break; | ||
| 1641 | case 0xed: | ||
| 1642 | mode = AM_ABS; | ||
| 1643 | arg = opcode_arg(mode); | ||
| 1644 | sbc(arg); | ||
| 1645 | cycles += 4; | ||
| 1646 | printf("SBC"); | ||
| 1647 | break; | ||
| 1648 | case 0xfd: | ||
| 1649 | mode = AM_ABS_X; | ||
| 1650 | arg = opcode_arg(mode); | ||
| 1651 | sbc(arg); | ||
| 1652 | cycles += 4; | ||
| 1653 | printf("SBC"); | ||
| 1654 | break; | ||
| 1655 | case 0xf9: | ||
| 1656 | mode = AM_ABS_Y; | ||
| 1657 | arg = opcode_arg(mode); | ||
| 1658 | sbc(arg); | ||
| 1659 | cycles += 4; | ||
| 1660 | printf("SBC"); | ||
| 1661 | break; | ||
| 1662 | case 0xe1: | ||
| 1663 | mode = AM_IND_X; | ||
| 1664 | arg = opcode_arg(mode); | ||
| 1665 | sbc(arg); | ||
| 1666 | cycles += 6; | ||
| 1667 | printf("SBC"); | ||
| 1668 | break; | ||
| 1669 | case 0xf1: | ||
| 1670 | mode = AM_IND_Y; | ||
| 1671 | arg = opcode_arg(mode); | ||
| 1672 | sbc(arg); | ||
| 1673 | cycles += 5; | ||
| 1674 | printf("SBC"); | ||
| 1675 | break; | ||
| 1676 | case 0x38: | ||
| 1677 | mode = AM_IMPLICIT; | ||
| 1678 | sec(); | ||
| 1679 | cycles += 2; | ||
| 1680 | printf("\tSEC"); | ||
| 1681 | break; | ||
| 1682 | case 0xf8: | ||
| 1683 | mode = AM_IMPLICIT; | ||
| 1684 | sed(); | ||
| 1685 | cycles += 2; | ||
| 1686 | printf("\tSED"); | ||
| 1687 | break; | ||
| 1688 | case 0x78: | ||
| 1689 | mode = AM_IMPLICIT; | ||
| 1690 | sei(); | ||
| 1691 | cycles += 2; | ||
| 1692 | printf("\tSEI"); | ||
| 1693 | break; | ||
| 1694 | case 0x85: | ||
| 1695 | mode = AM_ZP; | ||
| 1696 | arg = opcode_mem(mode); | ||
| 1697 | did_memwrite = 1; | ||
| 1698 | ret = sta(arg); | ||
| 1699 | cycles += 4; | ||
| 1700 | printf("STA"); | ||
| 1701 | break; | ||
| 1702 | case 0x95: | ||
| 1703 | mode = AM_ZP_X; | ||
| 1704 | arg = opcode_mem(mode); | ||
| 1705 | did_memwrite = 1; | ||
| 1706 | ret = sta(arg); | ||
| 1707 | cycles += 5; | ||
| 1708 | printf("STA"); | ||
| 1709 | break; | ||
| 1710 | case 0x8d: | ||
| 1711 | mode = AM_ABS; | ||
| 1712 | arg = opcode_mem(mode); | ||
| 1713 | did_memwrite = 1; | ||
| 1714 | ret = sta(arg); | ||
| 1715 | cycles += 5; | ||
| 1716 | printf("STA"); | ||
| 1717 | break; | ||
| 1718 | case 0x9d: | ||
| 1719 | mode = AM_ABS_X; | ||
| 1720 | arg = opcode_mem(mode); | ||
| 1721 | did_memwrite = 1; | ||
| 1722 | ret = sta(arg); | ||
| 1723 | cycles += 6; | ||
| 1724 | printf("STA"); | ||
| 1725 | break; | ||
| 1726 | case 0x99: | ||
| 1727 | mode = AM_ABS_Y; | ||
| 1728 | arg = opcode_mem(mode); | ||
| 1729 | did_memwrite = 1; | ||
| 1730 | ret = sta(arg); | ||
| 1731 | cycles += 6; | ||
| 1732 | printf("STA"); | ||
| 1733 | break; | ||
| 1734 | case 0x81: | ||
| 1735 | mode = AM_IND_X; | ||
| 1736 | arg = opcode_mem(mode); | ||
| 1737 | did_memwrite = 1; | ||
| 1738 | ret = sta(arg); | ||
| 1739 | cycles += 7; | ||
| 1740 | printf("STA"); | ||
| 1741 | break; | ||
| 1742 | case 0x91: | ||
| 1743 | mode = AM_IND_Y; | ||
| 1744 | arg = opcode_mem(mode); | ||
| 1745 | did_memwrite = 1; | ||
| 1746 | ret = sta(arg); | ||
| 1747 | cycles += 7; | ||
| 1748 | printf("STA"); | ||
| 1749 | break; | ||
| 1750 | case 0x86: | ||
| 1751 | mode = AM_ZP; | ||
| 1752 | arg = opcode_mem(mode); | ||
| 1753 | did_memwrite = 1; | ||
| 1754 | ret = stx(arg); | ||
| 1755 | cycles += 4; | ||
| 1756 | printf("STX"); | ||
| 1757 | break; | ||
| 1758 | case 0x96: | ||
| 1759 | mode = AM_ZP_Y; | ||
| 1760 | arg = opcode_mem(mode); | ||
| 1761 | did_memwrite = 1; | ||
| 1762 | ret = stx(arg); | ||
| 1763 | cycles += 5; | ||
| 1764 | printf("STX"); | ||
| 1765 | break; | ||
| 1766 | case 0x8e: | ||
| 1767 | mode = AM_ABS; | ||
| 1768 | arg = opcode_mem(mode); | ||
| 1769 | did_memwrite = 1; | ||
| 1770 | ret = stx(arg); | ||
| 1771 | cycles += 5; | ||
| 1772 | printf("STX"); | ||
| 1773 | break; | ||
| 1774 | case 0x84: | ||
| 1775 | mode = AM_ZP; | ||
| 1776 | arg = opcode_mem(mode); | ||
| 1777 | did_memwrite = 1; | ||
| 1778 | ret = sty(arg); | ||
| 1779 | cycles += 4; | ||
| 1780 | printf("STY"); | ||
| 1781 | break; | ||
| 1782 | case 0x94: | ||
| 1783 | mode = AM_ZP_X; | ||
| 1784 | arg = opcode_mem(mode); | ||
| 1785 | did_memwrite = 1; | ||
| 1786 | ret = sty(arg); | ||
| 1787 | cycles += 5; | ||
| 1788 | printf("STY"); | ||
| 1789 | break; | ||
| 1790 | case 0x8c: | ||
| 1791 | mode = AM_ABS; | ||
| 1792 | arg = opcode_mem(mode); | ||
| 1793 | did_memwrite = 1; | ||
| 1794 | ret = sty(arg); | ||
| 1795 | cycles += 5; | ||
| 1796 | printf("STY"); | ||
| 1797 | break; | ||
| 1798 | case 0xaa: | ||
| 1799 | mode = AM_IMPLICIT; | ||
| 1800 | tax(); | ||
| 1801 | cycles += 2; | ||
| 1802 | printf("\tTAX"); | ||
| 1803 | break; | ||
| 1804 | case 0xa8: | ||
| 1805 | mode = AM_IMPLICIT; | ||
| 1806 | tay(); | ||
| 1807 | cycles += 2; | ||
| 1808 | printf("\tTAY"); | ||
| 1809 | break; | ||
| 1810 | case 0xba: | ||
| 1811 | mode = AM_IMPLICIT; | ||
| 1812 | tsx(); | ||
| 1813 | cycles += 2; | ||
| 1814 | printf("\tTSX"); | ||
| 1815 | break; | ||
| 1816 | case 0x8a: | ||
| 1817 | mode = AM_IMPLICIT; | ||
| 1818 | txa(); | ||
| 1819 | cycles += 2; | ||
| 1820 | printf("\tTXA"); | ||
| 1821 | break; | ||
| 1822 | case 0x9a: | ||
| 1823 | mode = AM_IMPLICIT; | ||
| 1824 | txs(); | ||
| 1825 | cycles += 2; | ||
| 1826 | printf("\tTXS"); | ||
| 1827 | break; | ||
| 1828 | case 0x98: | ||
| 1829 | mode = AM_IMPLICIT; | ||
| 1830 | tya(); | ||
| 1831 | cycles += 2; | ||
| 1832 | printf("\tTYA"); | ||
| 1833 | break; | ||
| 1834 | default: | ||
| 1835 | printf("opcode $%02X not implemented\n", opcode); | ||
| 1836 | break; | ||
| 1837 | } | ||
| 1838 | 741 | ||
| 1839 | switch (mode) { | 742 | switch (mode) { |
| 1840 | case AM_IMM: | 743 | case AM_IMM: |
| 1841 | printf(" #$%02X", arg); | 744 | printf("#$%02X", arg); |
| 1842 | if (did_memwrite) printf(" = %02X\t\t\t", ret); | ||
| 1843 | else printf("\t\t\t"); | ||
| 1844 | break; | 745 | break; |
| 1845 | case AM_ZP: | 746 | case AM_ZP: |
| 1846 | printf(" $%02X", arg); | 747 | printf("$%02X", arg); |
| 1847 | if (did_memwrite) printf(" = %02X\t\t\t", ret); | ||
| 1848 | else printf("\t\t\t\t"); | ||
| 1849 | break; | 748 | break; |
| 1850 | case AM_ZP_X: | 749 | case AM_ZP_X: |
| 1851 | printf(" $%02X,X", arg); | 750 | printf("$%02X,X", arg); |
| 1852 | if (did_memwrite) printf(" = %02X\t\t\t", ret); | ||
| 1853 | else printf("\t\t\t"); | ||
| 1854 | break; | 751 | break; |
| 1855 | case AM_ZP_Y: | 752 | case AM_ZP_Y: |
| 1856 | printf(" $%02X,Y", arg); | 753 | printf("$%02X,Y", arg); |
| 1857 | if (did_memwrite) printf(" = %02X\t\t\t", ret); | ||
| 1858 | else printf("\t\t\t\t"); | ||
| 1859 | break; | 754 | break; |
| 1860 | case AM_REL: | 755 | case AM_REL: |
| 756 | printf("$%04X", regs.pc + arg); | ||
| 757 | break; | ||
| 1861 | case AM_ABS: | 758 | case AM_ABS: |
| 1862 | printf(" $%04X", arg); | 759 | printf("$%04X", arg); |
| 1863 | if (did_memwrite) printf(" = %02X\t\t\t", ret); | ||
| 1864 | else printf("\t\t\t"); | ||
| 1865 | break; | 760 | break; |
| 1866 | case AM_ABS_X: | 761 | case AM_ABS_X: |
| 1867 | printf(" $%04X,X", arg); | 762 | printf("$%04X,X", arg); |
| 1868 | if (did_memwrite) printf(" = %02X\t\t", ret); | ||
| 1869 | else printf("\t\t\t"); | ||
| 1870 | break; | 763 | break; |
| 1871 | case AM_ABS_Y: | 764 | case AM_ABS_Y: |
| 1872 | printf(" $%04X,Y", arg); | 765 | printf("$%04X,Y", arg); |
| 1873 | if (did_memwrite) printf(" = %02X\t\t\t", ret); | ||
| 1874 | else printf("\t\t\t"); | ||
| 1875 | break; | 766 | break; |
| 1876 | case AM_IND: | 767 | case AM_IND: |
| 1877 | printf(" ($%04X) = %04X\t\t", mem, deref); | 768 | printf("($%04X) = %04X\t\t", arg, peek16(arg)); |
| 1878 | break; | 769 | break; |
| 1879 | case AM_ACC: | 770 | case AM_ACC: |
| 1880 | case AM_IMPLICIT: | 771 | case AM_NONE: |
| 772 | putchar('\t'); | ||
| 773 | break; | ||
| 1881 | default: | 774 | default: |
| 1882 | printf("\t\t\t\t"); | 775 | printf("\t\t\t\t"); |
| 1883 | break; | 776 | break; |
| 1884 | } | 777 | } |
| 1885 | 778 | ||
| 1886 | printf("A:%02X X:%02X Y:%02X P:%02X SP:%02X CYC:%d\n", | 779 | if (opcodes[op].didmemory) printf(" = %02X", peek(arg)); |
| 1887 | regs_.a, regs_.x, regs_.y, status, regs_.sp, cycles_); | 780 | printf("\t\t\t"); |
| 781 | |||
| 782 | printf("A:%02X X:%02X Y:%02X P:%02X SP:%02X CYC:%d %08b\n", | ||
| 783 | regs.a, regs.x, regs.y, STATUS_TO_INT(), regs.sp, cycles, STATUS_TO_INT()); | ||
| 784 | |||
| 785 | opcodes[op].instr(arg); | ||
| 786 | cycles += opcodes[op].cycles; | ||
| 1888 | } | 787 | } |
| 1889 | loop_exit: | 788 | loop_exit: |
| 1890 | } | 789 | } |