diff options
| author | vin <git@vineetk.net> | 2024-06-10 12:50:00 +0530 |
|---|---|---|
| committer | vin <git@vineetk.net> | 2024-06-10 14:28:07 +0530 |
| commit | e07d5917a1625e207d1ba96b7e0d1e1c493040b2 (patch) | |
| tree | 049c23a5bccd4849b67ec88c779de1840f544acc /cpu.c | |
| parent | 23008662cea16d4ad2a3253d883a634258378d60 (diff) | |
implement se?() opcodes and remove extra 65c02 opcodes
Diffstat (limited to 'cpu.c')
| -rw-r--r-- | cpu.c | 420 |
1 files changed, 3 insertions, 417 deletions
| @@ -207,18 +207,6 @@ asl(uint8_t arg) | |||
| 207 | } | 207 | } |
| 208 | 208 | ||
| 209 | static void | 209 | static void |
| 210 | bbr(uint8_t arg) | ||
| 211 | { | ||
| 212 | /* TODO: complete this */ | ||
| 213 | } | ||
| 214 | |||
| 215 | static void | ||
| 216 | bbs(uint8_t arg) | ||
| 217 | { | ||
| 218 | /* TODO: complete this */ | ||
| 219 | } | ||
| 220 | |||
| 221 | static void | ||
| 222 | bcc(uint8_t arg) | 210 | bcc(uint8_t arg) |
| 223 | { | 211 | { |
| 224 | if (regs.status.carry == 0) | 212 | if (regs.status.carry == 0) |
| @@ -269,12 +257,6 @@ bpl(uint8_t arg) | |||
| 269 | } | 257 | } |
| 270 | 258 | ||
| 271 | static void | 259 | static void |
| 272 | bra(uint8_t arg) | ||
| 273 | { | ||
| 274 | /* TODO: complete this */ | ||
| 275 | } | ||
| 276 | |||
| 277 | static void | ||
| 278 | brk(void) | 260 | brk(void) |
| 279 | { | 261 | { |
| 280 | /* TODO: push regs.pc and regs.status to stack and load IRQ vector */ | 262 | /* TODO: push regs.pc and regs.status to stack and load IRQ vector */ |
| @@ -528,12 +510,6 @@ ply(uint8_t arg) | |||
| 528 | } | 510 | } |
| 529 | 511 | ||
| 530 | static void | 512 | static void |
| 531 | rmb(uint8_t arg) | ||
| 532 | { | ||
| 533 | /* TODO: complete this */ | ||
| 534 | } | ||
| 535 | |||
| 536 | static void | ||
| 537 | rol(uint8_t arg) | 513 | rol(uint8_t arg) |
| 538 | { | 514 | { |
| 539 | /* TODO: complete this */ | 515 | /* TODO: complete this */ |
| @@ -567,25 +543,19 @@ sbc(uint8_t arg) | |||
| 567 | static void | 543 | static void |
| 568 | sec(uint8_t arg) | 544 | sec(uint8_t arg) |
| 569 | { | 545 | { |
| 570 | /* TODO: complete this */ | 546 | regs.status.carry = 1; |
| 571 | } | 547 | } |
| 572 | 548 | ||
| 573 | static void | 549 | static void |
| 574 | sed(uint8_t arg) | 550 | sed(uint8_t arg) |
| 575 | { | 551 | { |
| 576 | /* TODO: complete this */ | 552 | regs.status.decimal_mode = 1; |
| 577 | } | 553 | } |
| 578 | 554 | ||
| 579 | static void | 555 | static void |
| 580 | sei(uint8_t arg) | 556 | sei(uint8_t arg) |
| 581 | { | 557 | { |
| 582 | /* TODO: complete this */ | 558 | regs.status.interrupt_disable = 1; |
| 583 | } | ||
| 584 | |||
| 585 | static void | ||
| 586 | smb(uint8_t arg) | ||
| 587 | { | ||
| 588 | /* TODO: complete this */ | ||
| 589 | } | 559 | } |
| 590 | 560 | ||
| 591 | static void | 561 | static void |
| @@ -595,12 +565,6 @@ sta(uint8_t arg) | |||
| 595 | } | 565 | } |
| 596 | 566 | ||
| 597 | static void | 567 | static void |
| 598 | stp(uint8_t arg) | ||
| 599 | { | ||
| 600 | /* TODO: complete this */ | ||
| 601 | } | ||
| 602 | |||
| 603 | static void | ||
| 604 | stx(uint8_t arg) | 568 | stx(uint8_t arg) |
| 605 | { | 569 | { |
| 606 | /* TODO: complete this */ | 570 | /* TODO: complete this */ |
| @@ -613,12 +577,6 @@ sty(uint8_t arg) | |||
| 613 | } | 577 | } |
| 614 | 578 | ||
| 615 | static void | 579 | static void |
| 616 | stz(uint8_t arg) | ||
| 617 | { | ||
| 618 | /* TODO: complete this */ | ||
| 619 | } | ||
| 620 | |||
| 621 | static void | ||
| 622 | tax(void) | 580 | tax(void) |
| 623 | { | 581 | { |
| 624 | regs.x = regs.a; | 582 | regs.x = regs.a; |
| @@ -634,18 +592,6 @@ tay(uint8_t arg) | |||
| 634 | } | 592 | } |
| 635 | 593 | ||
| 636 | static void | 594 | static void |
| 637 | trb(uint8_t arg) | ||
| 638 | { | ||
| 639 | /* TODO: complete this */ | ||
| 640 | } | ||
| 641 | |||
| 642 | static void | ||
| 643 | tsb(uint8_t arg) | ||
| 644 | { | ||
| 645 | /* TODO: complete this */ | ||
| 646 | } | ||
| 647 | |||
| 648 | static void | ||
| 649 | tsx(uint8_t arg) | 595 | tsx(uint8_t arg) |
| 650 | { | 596 | { |
| 651 | /* TODO: complete this */ | 597 | /* TODO: complete this */ |
| @@ -670,18 +616,6 @@ tya(uint8_t arg) | |||
| 670 | } | 616 | } |
| 671 | 617 | ||
| 672 | static void | 618 | static void |
| 673 | wai(uint8_t arg) | ||
| 674 | { | ||
| 675 | /* TODO: complete this */ | ||
| 676 | } | ||
| 677 | |||
| 678 | static void | ||
| 679 | unp(uint8_t arg) | ||
| 680 | { | ||
| 681 | /* TODO: complete this */ | ||
| 682 | } | ||
| 683 | |||
| 684 | static void | ||
| 685 | interpret(void) | 619 | interpret(void) |
| 686 | { | 620 | { |
| 687 | uint8_t opcode; | 621 | uint8_t opcode; |
| @@ -784,70 +718,6 @@ interpret(void) | |||
| 784 | asl(opcode_arg(AM_ABS_X)); | 718 | asl(opcode_arg(AM_ABS_X)); |
| 785 | cycles += 6; | 719 | cycles += 6; |
| 786 | break; | 720 | break; |
| 787 | case 0x0f: | ||
| 788 | bbr(opcode_arg(AM_REL)); | ||
| 789 | cycles += 4; | ||
| 790 | break; | ||
| 791 | case 0x1f: | ||
| 792 | bbr(opcode_arg(AM_REL)); | ||
| 793 | cycles += 4; | ||
| 794 | break; | ||
| 795 | case 0x2f: | ||
| 796 | bbr(opcode_arg(AM_REL)); | ||
| 797 | cycles += 4; | ||
| 798 | break; | ||
| 799 | case 0x3f: | ||
| 800 | bbr(opcode_arg(AM_REL)); | ||
| 801 | cycles += 4; | ||
| 802 | break; | ||
| 803 | case 0x4f: | ||
| 804 | bbr(opcode_arg(AM_REL)); | ||
| 805 | cycles += 4; | ||
| 806 | break; | ||
| 807 | case 0x5f: | ||
| 808 | bbr(opcode_arg(AM_REL)); | ||
| 809 | cycles += 4; | ||
| 810 | break; | ||
| 811 | case 0x6f: | ||
| 812 | bbr(opcode_arg(AM_REL)); | ||
| 813 | cycles += 4; | ||
| 814 | break; | ||
| 815 | case 0x7f: | ||
| 816 | bbr(opcode_arg(AM_REL)); | ||
| 817 | cycles += 4; | ||
| 818 | break; | ||
| 819 | case 0x8f: | ||
| 820 | bbs(opcode_arg(AM_REL)); | ||
| 821 | cycles += 4; | ||
| 822 | break; | ||
| 823 | case 0x9f: | ||
| 824 | bbs(opcode_arg(AM_REL)); | ||
| 825 | cycles += 4; | ||
| 826 | break; | ||
| 827 | case 0xaf: | ||
| 828 | bbs(opcode_arg(AM_REL)); | ||
| 829 | cycles += 4; | ||
| 830 | break; | ||
| 831 | case 0xbf: | ||
| 832 | bbs(opcode_arg(AM_REL)); | ||
| 833 | cycles += 4; | ||
| 834 | break; | ||
| 835 | case 0xcf: | ||
| 836 | bbs(opcode_arg(AM_REL)); | ||
| 837 | cycles += 4; | ||
| 838 | break; | ||
| 839 | case 0xdf: | ||
| 840 | bbs(opcode_arg(AM_REL)); | ||
| 841 | cycles += 4; | ||
| 842 | break; | ||
| 843 | case 0xef: | ||
| 844 | bbs(opcode_arg(AM_REL)); | ||
| 845 | cycles += 4; | ||
| 846 | break; | ||
| 847 | case 0xff: | ||
| 848 | bbs(opcode_arg(AM_REL)); | ||
| 849 | cycles += 4; | ||
| 850 | break; | ||
| 851 | case 0x90: | 721 | case 0x90: |
| 852 | bcc(opcode_arg(AM_IMM)); | 722 | bcc(opcode_arg(AM_IMM)); |
| 853 | cycles += 2; | 723 | cycles += 2; |
| @@ -892,10 +762,6 @@ interpret(void) | |||
| 892 | bpl(opcode_arg(AM_IMM)); | 762 | bpl(opcode_arg(AM_IMM)); |
| 893 | cycles += 2; | 763 | cycles += 2; |
| 894 | break; | 764 | break; |
| 895 | case 0x80: | ||
| 896 | bra(opcode_arg(AM_IMM)); | ||
| 897 | cycles += 3; | ||
| 898 | break; | ||
| 899 | case 0x00: | 765 | case 0x00: |
| 900 | brk(); | 766 | brk(); |
| 901 | cycles += 7; | 767 | cycles += 7; |
| @@ -1256,38 +1122,6 @@ interpret(void) | |||
| 1256 | ply(opcode_arg(AM_ACC)); | 1122 | ply(opcode_arg(AM_ACC)); |
| 1257 | cycles += 4; | 1123 | cycles += 4; |
| 1258 | break; | 1124 | break; |
| 1259 | case 0x07: | ||
| 1260 | rmb(opcode_arg(AM_REL)); | ||
| 1261 | cycles += 5; | ||
| 1262 | break; | ||
| 1263 | case 0x17: | ||
| 1264 | rmb(opcode_arg(AM_REL)); | ||
| 1265 | cycles += 5; | ||
| 1266 | break; | ||
| 1267 | case 0x27: | ||
| 1268 | rmb(opcode_arg(AM_REL)); | ||
| 1269 | cycles += 5; | ||
| 1270 | break; | ||
| 1271 | case 0x37: | ||
| 1272 | rmb(opcode_arg(AM_REL)); | ||
| 1273 | cycles += 5; | ||
| 1274 | break; | ||
| 1275 | case 0x47: | ||
| 1276 | rmb(opcode_arg(AM_REL)); | ||
| 1277 | cycles += 5; | ||
| 1278 | break; | ||
| 1279 | case 0x57: | ||
| 1280 | rmb(opcode_arg(AM_REL)); | ||
| 1281 | cycles += 5; | ||
| 1282 | break; | ||
| 1283 | case 0x67: | ||
| 1284 | rmb(opcode_arg(AM_REL)); | ||
| 1285 | cycles += 5; | ||
| 1286 | break; | ||
| 1287 | case 0x77: | ||
| 1288 | rmb(opcode_arg(AM_REL)); | ||
| 1289 | cycles += 5; | ||
| 1290 | break; | ||
| 1291 | case 0x2a: | 1125 | case 0x2a: |
| 1292 | rol(opcode_arg(AM_ACC)); | 1126 | rol(opcode_arg(AM_ACC)); |
| 1293 | cycles += 2; | 1127 | cycles += 2; |
| @@ -1384,38 +1218,6 @@ interpret(void) | |||
| 1384 | sei(opcode_arg(AM_ACC)); | 1218 | sei(opcode_arg(AM_ACC)); |
| 1385 | cycles += 2; | 1219 | cycles += 2; |
| 1386 | break; | 1220 | break; |
| 1387 | case 0x87: | ||
| 1388 | smb(opcode_arg(AM_REL)); | ||
| 1389 | cycles += 5; | ||
| 1390 | break; | ||
| 1391 | case 0x97: | ||
| 1392 | smb(opcode_arg(AM_REL)); | ||
| 1393 | cycles += 5; | ||
| 1394 | break; | ||
| 1395 | case 0xa7: | ||
| 1396 | smb(opcode_arg(AM_REL)); | ||
| 1397 | cycles += 5; | ||
| 1398 | break; | ||
| 1399 | case 0xb7: | ||
| 1400 | smb(opcode_arg(AM_REL)); | ||
| 1401 | cycles += 5; | ||
| 1402 | break; | ||
| 1403 | case 0xc7: | ||
| 1404 | smb(opcode_arg(AM_REL)); | ||
| 1405 | cycles += 5; | ||
| 1406 | break; | ||
| 1407 | case 0xd7: | ||
| 1408 | smb(opcode_arg(AM_REL)); | ||
| 1409 | cycles += 5; | ||
| 1410 | break; | ||
| 1411 | case 0xe7: | ||
| 1412 | smb(opcode_arg(AM_REL)); | ||
| 1413 | cycles += 5; | ||
| 1414 | break; | ||
| 1415 | case 0xf7: | ||
| 1416 | smb(opcode_arg(AM_REL)); | ||
| 1417 | cycles += 5; | ||
| 1418 | break; | ||
| 1419 | case 0x85: | 1221 | case 0x85: |
| 1420 | sta(opcode_arg(AM_ZP)); | 1222 | sta(opcode_arg(AM_ZP)); |
| 1421 | cycles += 4; | 1223 | cycles += 4; |
| @@ -1448,10 +1250,6 @@ interpret(void) | |||
| 1448 | sta(opcode_arg(AM_IND_Y)); | 1250 | sta(opcode_arg(AM_IND_Y)); |
| 1449 | cycles += 7; | 1251 | cycles += 7; |
| 1450 | break; | 1252 | break; |
| 1451 | case 0xdb: | ||
| 1452 | stp(opcode_arg(AM_ACC)); | ||
| 1453 | cycles += 2; | ||
| 1454 | break; | ||
| 1455 | case 0x86: | 1253 | case 0x86: |
| 1456 | stx(opcode_arg(AM_ZP)); | 1254 | stx(opcode_arg(AM_ZP)); |
| 1457 | cycles += 4; | 1255 | cycles += 4; |
| @@ -1476,22 +1274,6 @@ interpret(void) | |||
| 1476 | sty(opcode_arg(AM_ABS)); | 1274 | sty(opcode_arg(AM_ABS)); |
| 1477 | cycles += 5; | 1275 | cycles += 5; |
| 1478 | break; | 1276 | break; |
| 1479 | case 0x64: | ||
| 1480 | stz(opcode_arg(AM_ZP)); | ||
| 1481 | cycles += 4; | ||
| 1482 | break; | ||
| 1483 | case 0x74: | ||
| 1484 | stz(opcode_arg(AM_ZP_X)); | ||
| 1485 | cycles += 5; | ||
| 1486 | break; | ||
| 1487 | case 0x9c: | ||
| 1488 | stz(opcode_arg(AM_ABS)); | ||
| 1489 | cycles += 5; | ||
| 1490 | break; | ||
| 1491 | case 0x9e: | ||
| 1492 | stz(opcode_arg(AM_ABS_X)); | ||
| 1493 | cycles += 6; | ||
| 1494 | break; | ||
| 1495 | case 0xaa: | 1277 | case 0xaa: |
| 1496 | tax(); | 1278 | tax(); |
| 1497 | cycles += 2; | 1279 | cycles += 2; |
| @@ -1500,22 +1282,6 @@ interpret(void) | |||
| 1500 | tay(opcode_arg(AM_ACC)); | 1282 | tay(opcode_arg(AM_ACC)); |
| 1501 | cycles += 2; | 1283 | cycles += 2; |
| 1502 | break; | 1284 | break; |
| 1503 | case 0x14: | ||
| 1504 | trb(opcode_arg(AM_ZP)); | ||
| 1505 | cycles += 5; | ||
| 1506 | break; | ||
| 1507 | case 0x1c: | ||
| 1508 | trb(opcode_arg(AM_ABS)); | ||
| 1509 | cycles += 6; | ||
| 1510 | break; | ||
| 1511 | case 0x04: | ||
| 1512 | tsb(opcode_arg(AM_ZP)); | ||
| 1513 | cycles += 5; | ||
| 1514 | break; | ||
| 1515 | case 0x0c: | ||
| 1516 | tsb(opcode_arg(AM_ABS)); | ||
| 1517 | cycles += 6; | ||
| 1518 | break; | ||
| 1519 | case 0xba: | 1285 | case 0xba: |
| 1520 | tsx(opcode_arg(AM_ACC)); | 1286 | tsx(opcode_arg(AM_ACC)); |
| 1521 | cycles += 2; | 1287 | cycles += 2; |
| @@ -1532,186 +1298,6 @@ interpret(void) | |||
| 1532 | tya(opcode_arg(AM_ACC)); | 1298 | tya(opcode_arg(AM_ACC)); |
| 1533 | cycles += 2; | 1299 | cycles += 2; |
| 1534 | break; | 1300 | break; |
| 1535 | case 0xcb: | ||
| 1536 | wai(opcode_arg(AM_ACC)); | ||
| 1537 | cycles += 5; | ||
| 1538 | break; | ||
| 1539 | case 0x03: | ||
| 1540 | unp(opcode_arg(AM_ACC)); | ||
| 1541 | cycles += 1; | ||
| 1542 | break; | ||
| 1543 | case 0x0b: | ||
| 1544 | unp(opcode_arg(AM_ACC)); | ||
| 1545 | cycles += 1; | ||
| 1546 | break; | ||
| 1547 | case 0x13: | ||
| 1548 | unp(opcode_arg(AM_ACC)); | ||
| 1549 | cycles += 1; | ||
| 1550 | break; | ||
| 1551 | case 0x1b: | ||
| 1552 | unp(opcode_arg(AM_ACC)); | ||
| 1553 | cycles += 1; | ||
| 1554 | break; | ||
| 1555 | case 0x23: | ||
| 1556 | unp(opcode_arg(AM_ACC)); | ||
| 1557 | cycles += 1; | ||
| 1558 | break; | ||
| 1559 | case 0x2b: | ||
| 1560 | unp(opcode_arg(AM_ACC)); | ||
| 1561 | cycles += 1; | ||
| 1562 | break; | ||
| 1563 | case 0x33: | ||
| 1564 | unp(opcode_arg(AM_ACC)); | ||
| 1565 | cycles += 1; | ||
| 1566 | break; | ||
| 1567 | case 0x3b: | ||
| 1568 | unp(opcode_arg(AM_ACC)); | ||
| 1569 | cycles += 1; | ||
| 1570 | break; | ||
| 1571 | case 0x43: | ||
| 1572 | unp(opcode_arg(AM_ACC)); | ||
| 1573 | cycles += 1; | ||
| 1574 | break; | ||
| 1575 | case 0x4b: | ||
| 1576 | unp(opcode_arg(AM_ACC)); | ||
| 1577 | cycles += 1; | ||
| 1578 | break; | ||
| 1579 | case 0x53: | ||
| 1580 | unp(opcode_arg(AM_ACC)); | ||
| 1581 | cycles += 1; | ||
| 1582 | break; | ||
| 1583 | case 0x5b: | ||
| 1584 | unp(opcode_arg(AM_ACC)); | ||
| 1585 | cycles += 1; | ||
| 1586 | break; | ||
| 1587 | case 0x63: | ||
| 1588 | unp(opcode_arg(AM_ACC)); | ||
| 1589 | cycles += 1; | ||
| 1590 | break; | ||
| 1591 | case 0x6b: | ||
| 1592 | unp(opcode_arg(AM_ACC)); | ||
| 1593 | cycles += 1; | ||
| 1594 | break; | ||
| 1595 | case 0x73: | ||
| 1596 | unp(opcode_arg(AM_ACC)); | ||
| 1597 | cycles += 1; | ||
| 1598 | break; | ||
| 1599 | case 0x7b: | ||
| 1600 | unp(opcode_arg(AM_ACC)); | ||
| 1601 | cycles += 1; | ||
| 1602 | break; | ||
| 1603 | case 0x83: | ||
| 1604 | unp(opcode_arg(AM_ACC)); | ||
| 1605 | cycles += 1; | ||
| 1606 | break; | ||
| 1607 | case 0x8b: | ||
| 1608 | unp(opcode_arg(AM_ACC)); | ||
| 1609 | cycles += 1; | ||
| 1610 | break; | ||
| 1611 | case 0x93: | ||
| 1612 | unp(opcode_arg(AM_ACC)); | ||
| 1613 | cycles += 1; | ||
| 1614 | break; | ||
| 1615 | case 0x9b: | ||
| 1616 | unp(opcode_arg(AM_ACC)); | ||
| 1617 | cycles += 1; | ||
| 1618 | break; | ||
| 1619 | case 0xa3: | ||
| 1620 | unp(opcode_arg(AM_ACC)); | ||
| 1621 | cycles += 1; | ||
| 1622 | break; | ||
| 1623 | case 0xab: | ||
| 1624 | unp(opcode_arg(AM_ACC)); | ||
| 1625 | cycles += 1; | ||
| 1626 | break; | ||
| 1627 | case 0xb3: | ||
| 1628 | unp(opcode_arg(AM_ACC)); | ||
| 1629 | cycles += 1; | ||
| 1630 | break; | ||
| 1631 | case 0xbb: | ||
| 1632 | unp(opcode_arg(AM_ACC)); | ||
| 1633 | cycles += 1; | ||
| 1634 | break; | ||
| 1635 | case 0xc3: | ||
| 1636 | unp(opcode_arg(AM_ACC)); | ||
| 1637 | cycles += 1; | ||
| 1638 | break; | ||
| 1639 | case 0xd3: | ||
| 1640 | unp(opcode_arg(AM_ACC)); | ||
| 1641 | cycles += 1; | ||
| 1642 | break; | ||
| 1643 | case 0xe3: | ||
| 1644 | unp(opcode_arg(AM_ACC)); | ||
| 1645 | cycles += 1; | ||
| 1646 | break; | ||
| 1647 | case 0xeb: | ||
| 1648 | unp(opcode_arg(AM_ACC)); | ||
| 1649 | cycles += 1; | ||
| 1650 | break; | ||
| 1651 | case 0xf3: | ||
| 1652 | unp(opcode_arg(AM_ACC)); | ||
| 1653 | cycles += 1; | ||
| 1654 | break; | ||
| 1655 | case 0xfb: | ||
| 1656 | unp(opcode_arg(AM_ACC)); | ||
| 1657 | cycles += 1; | ||
| 1658 | break; | ||
| 1659 | case 0x02: | ||
| 1660 | unp(opcode_arg(AM_IMM)); | ||
| 1661 | cycles += 2; | ||
| 1662 | break; | ||
| 1663 | case 0x22: | ||
| 1664 | unp(opcode_arg(AM_IMM)); | ||
| 1665 | cycles += 2; | ||
| 1666 | break; | ||
| 1667 | case 0x42: | ||
| 1668 | unp(opcode_arg(AM_IMM)); | ||
| 1669 | cycles += 2; | ||
| 1670 | break; | ||
| 1671 | case 0x62: | ||
| 1672 | unp(opcode_arg(AM_IMM)); | ||
| 1673 | cycles += 2; | ||
| 1674 | break; | ||
| 1675 | case 0x82: | ||
| 1676 | unp(opcode_arg(AM_IMM)); | ||
| 1677 | cycles += 2; | ||
| 1678 | break; | ||
| 1679 | case 0xc2: | ||
| 1680 | unp(opcode_arg(AM_IMM)); | ||
| 1681 | cycles += 2; | ||
| 1682 | break; | ||
| 1683 | case 0xe2: | ||
| 1684 | unp(opcode_arg(AM_IMM)); | ||
| 1685 | cycles += 2; | ||
| 1686 | break; | ||
| 1687 | case 0x44: | ||
| 1688 | unp(opcode_arg(AM_ZP)); | ||
| 1689 | cycles += 3; | ||
| 1690 | break; | ||
| 1691 | case 0x54: | ||
| 1692 | unp(opcode_arg(AM_ZP_X)); | ||
| 1693 | cycles += 4; | ||
| 1694 | break; | ||
| 1695 | case 0xd4: | ||
| 1696 | unp(opcode_arg(AM_ZP_X)); | ||
| 1697 | cycles += 4; | ||
| 1698 | break; | ||
| 1699 | case 0xf4: | ||
| 1700 | unp(opcode_arg(AM_ZP_X)); | ||
| 1701 | cycles += 4; | ||
| 1702 | break; | ||
| 1703 | case 0x5c: | ||
| 1704 | unp(opcode_arg(AM_ABS)); | ||
| 1705 | cycles += 8; | ||
| 1706 | break; | ||
| 1707 | case 0xdc: | ||
| 1708 | unp(opcode_arg(AM_ABS_X)); | ||
| 1709 | cycles += 4; | ||
| 1710 | break; | ||
| 1711 | case 0xfc: | ||
| 1712 | unp(opcode_arg(AM_ABS_X)); | ||
| 1713 | cycles += 4; | ||
| 1714 | break; | ||
| 1715 | default: | 1301 | default: |
| 1716 | printf("opcode $%02X not implemented\n", opcode); | 1302 | printf("opcode $%02X not implemented\n", opcode); |
| 1717 | break; | 1303 | break; |
