commit 92e45e47c29ec037842c4a34ebc0c14143d413ff
parent 76c3c24be5b5bf825164bd9856f4e6da007ab334
Author: vin <git@vineetk.net>
Date: Tue, 9 Dec 2025 19:31:07 -0500
update verilator to 5.042
It was previously over 8 years out of date...
Diffstat:
8 files changed, 169 insertions(+), 0 deletions(-)
diff --git a/lang/verilator/CVS/Entries b/lang/verilator/CVS/Entries
@@ -0,0 +1,4 @@
+D/pkg////
+/distinfo/1.7/Thu Oct 5 17:14:10 2017//
+D/patches////
+/Makefile/1.20/Tue Sep 26 17:19:57 2023//
diff --git a/lang/verilator/CVS/Repository b/lang/verilator/CVS/Repository
@@ -0,0 +1 @@
+ports/lang/verilator
diff --git a/lang/verilator/Makefile b/lang/verilator/Makefile
@@ -0,0 +1,30 @@
+COMMENT= very fast free Verilog HDL simulator
+
+DISTNAME = verilator-5.042
+CATEGORIES= lang devel
+REVISION = 0
+
+GH_TAGNAME = v5.042
+GH_ACCOUNT = verilator
+GH_PROJECT = verilator
+
+HOMEPAGE= https://www.veripool.org/wiki/verilator/Intro
+
+# LGPLv3 or Perl
+PERMIT_PACKAGE= Yes
+
+WANTLIB= c m ${COMPILER_LIBCXX}
+
+COMPILER = base-clang ports-gcc base-gcc
+
+BUILD_DEPENDS += devel/bison
+
+MODULES = devel/cmake
+
+MAKE_FLAGS= VERILATOR_ROOT=${PREFIX}/share/verilator/ \
+ COPT="${CFLAGS}"
+
+TEST_TARGET= test
+TEST_FLAGS= VERILATOR_ROOT=${WRKSRC}
+
+.include <bsd.port.mk>
diff --git a/lang/verilator/distinfo b/lang/verilator/distinfo
@@ -0,0 +1,2 @@
+SHA256 (verilator-5.042.tar.gz) = vsFPF95ySFGxELaY870l4i7/qs7XJlsm0rwTB12/tL8=
+SIZE (verilator-5.042.tar.gz) = 4670033
diff --git a/lang/verilator/pkg/CVS/Entries b/lang/verilator/pkg/CVS/Entries
@@ -0,0 +1,3 @@
+/DESCR/1.1.1.1/Sun Nov 13 12:44:04 2011//
+/PLIST/1.8/Sat Mar 12 08:16:49 2022//
+D
diff --git a/lang/verilator/pkg/CVS/Repository b/lang/verilator/pkg/CVS/Repository
@@ -0,0 +1 @@
+ports/lang/verilator/pkg
diff --git a/lang/verilator/pkg/DESCR b/lang/verilator/pkg/DESCR
@@ -0,0 +1,6 @@
+Verilator is the fastest free Verilog HDL simulator, and beats most
+commercial simulators. It compiles synthesizable Verilog (not test-bench
+code!), plus some PSL, SystemVerilog and Synthesis assertions into C++
+or SystemC code. It is designed for large projects where fast simulation
+performance is of primary concern, and is especially well suited to
+generate executable models of CPUs for embedded software design teams.
diff --git a/lang/verilator/pkg/PLIST b/lang/verilator/pkg/PLIST
@@ -0,0 +1,122 @@
+bin/verilator
+@bin bin/verilator_bin
+bin/verilator_ccache_report
+bin/verilator_difftree
+bin/verilator_gantt
+bin/verilator_includer
+bin/verilator_profcfunc
+@comment share/verilator/include/verilatedos.h.orig
+examples/
+examples/cmake_hello_c/
+examples/cmake_hello_c/CMakeLists.txt
+examples/cmake_hello_c/Makefile
+examples/cmake_hello_sc/
+examples/cmake_hello_sc/CMakeLists.txt
+examples/cmake_hello_sc/Makefile
+examples/cmake_protect_lib/
+examples/cmake_protect_lib/CMakeLists.txt
+examples/cmake_protect_lib/Makefile
+examples/cmake_tracing_c/
+examples/cmake_tracing_c/CMakeLists.txt
+examples/cmake_tracing_c/Makefile
+examples/cmake_tracing_sc/
+examples/cmake_tracing_sc/CMakeLists.txt
+examples/cmake_tracing_sc/Makefile
+examples/json_py/
+examples/json_py/Makefile
+examples/json_py/sub.v
+examples/json_py/top.v
+examples/make_hello_binary/
+examples/make_hello_binary/Makefile
+examples/make_hello_binary/top.v
+examples/make_hello_c/
+examples/make_hello_c/Makefile
+examples/make_hello_c/sim_main.cpp
+examples/make_hello_c/top.v
+examples/make_hello_sc/
+examples/make_hello_sc/Makefile
+examples/make_hello_sc/sc_main.cpp
+examples/make_hello_sc/top.v
+examples/make_protect_lib/
+examples/make_protect_lib/Makefile
+examples/make_protect_lib/secret_impl.v
+examples/make_protect_lib/sim_main.cpp
+examples/make_protect_lib/top.v
+examples/make_tracing_c/
+examples/make_tracing_c/Makefile
+examples/make_tracing_c/Makefile_obj
+examples/make_tracing_c/input.vc
+examples/make_tracing_c/sim_main.cpp
+examples/make_tracing_c/sub.v
+examples/make_tracing_c/top.v
+examples/make_tracing_sc/
+examples/make_tracing_sc/Makefile
+examples/make_tracing_sc/Makefile_obj
+examples/make_tracing_sc/input.vc
+examples/make_tracing_sc/sc_main.cpp
+examples/make_tracing_sc/sub.v
+examples/make_tracing_sc/top.v
+include/gtkwave/
+include/gtkwave/fastlz.c
+include/gtkwave/fastlz.h
+include/gtkwave/fst_config.h
+include/gtkwave/fst_win_unistd.h
+include/gtkwave/fstapi.c
+include/gtkwave/fstapi.h
+include/gtkwave/lz4.c
+include/gtkwave/lz4.h
+include/verilated.cpp
+include/verilated.h
+include/verilated.mk
+include/verilated.v
+include/verilated_config.h
+include/verilated_cov.cpp
+include/verilated_cov.h
+include/verilated_cov_key.h
+include/verilated_dpi.cpp
+include/verilated_dpi.h
+include/verilated_fst_c.cpp
+include/verilated_fst_c.h
+include/verilated_fst_sc.cpp
+include/verilated_fst_sc.h
+include/verilated_funcs.h
+include/verilated_imp.h
+include/verilated_intrinsics.h
+include/verilated_probdist.cpp
+include/verilated_profiler.cpp
+include/verilated_profiler.h
+include/verilated_random.cpp
+include/verilated_random.h
+include/verilated_saif_c.cpp
+include/verilated_saif_c.h
+include/verilated_saif_sc.h
+include/verilated_save.cpp
+include/verilated_save.h
+include/verilated_sc.h
+include/verilated_sc_trace.h
+include/verilated_std.sv
+include/verilated_std_waiver.vlt
+include/verilated_sym_props.h
+include/verilated_syms.h
+include/verilated_threads.cpp
+include/verilated_threads.h
+include/verilated_timing.cpp
+include/verilated_timing.h
+include/verilated_trace.h
+include/verilated_trace_imp.h
+include/verilated_types.h
+include/verilated_vcd_c.cpp
+include/verilated_vcd_c.h
+include/verilated_vcd_sc.cpp
+include/verilated_vcd_sc.h
+include/verilated_vpi.cpp
+include/verilated_vpi.h
+include/verilatedos.h
+include/verilatedos_c.h
+include/vltstd/
+include/vltstd/sv_vpi_user.h
+include/vltstd/svdpi.h
+include/vltstd/veriuser.h
+include/vltstd/vpi_user.h
+verilator-config-version.cmake
+verilator-config.cmake
