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authorRyan <fauxpark@gmail.com>2023-11-21 02:48:23 +1100
committerGitHub <noreply@github.com>2023-11-20 15:48:23 +0000
commitdda6e7fb36f20821c60fbd7638c9bd016ef217d6 (patch)
tree0de59c7b2f1683866ccdf929890eed726919f23b /drivers/led
parente279c78ba3054ebc2e294dd91ea98341cc509d1e (diff)
LED drivers: register naming cleanups (#22436)
Diffstat (limited to 'drivers/led')
-rw-r--r--drivers/led/aw20216s.c47
-rw-r--r--drivers/led/aw20216s.h22
-rw-r--r--drivers/led/issi/is31fl3218-simple.c11
-rw-r--r--drivers/led/issi/is31fl3218-simple.h8
-rw-r--r--drivers/led/issi/is31fl3218.c11
-rw-r--r--drivers/led/issi/is31fl3218.h8
-rw-r--r--drivers/led/issi/is31fl3731-simple.c40
-rw-r--r--drivers/led/issi/is31fl3731-simple.h24
-rw-r--r--drivers/led/issi/is31fl3731.c40
-rw-r--r--drivers/led/issi/is31fl3731.h24
-rw-r--r--drivers/led/issi/is31fl3733-simple.c48
-rw-r--r--drivers/led/issi/is31fl3733-simple.h21
-rw-r--r--drivers/led/issi/is31fl3733.c48
-rw-r--r--drivers/led/issi/is31fl3733.h21
-rw-r--r--drivers/led/issi/is31fl3736-simple.c48
-rw-r--r--drivers/led/issi/is31fl3736-simple.h21
-rw-r--r--drivers/led/issi/is31fl3736.c48
-rw-r--r--drivers/led/issi/is31fl3736.h21
-rw-r--r--drivers/led/issi/is31fl3737-simple.c48
-rw-r--r--drivers/led/issi/is31fl3737-simple.h21
-rw-r--r--drivers/led/issi/is31fl3737.c48
-rw-r--r--drivers/led/issi/is31fl3737.h21
-rw-r--r--drivers/led/issi/is31fl3741-simple.c50
-rw-r--r--drivers/led/issi/is31fl3741-simple.h23
-rw-r--r--drivers/led/issi/is31fl3741.c50
-rw-r--r--drivers/led/issi/is31fl3741.h23
-rw-r--r--drivers/led/snled27351-simple.c42
-rw-r--r--drivers/led/snled27351-simple.h185
-rw-r--r--drivers/led/snled27351.c42
-rw-r--r--drivers/led/snled27351.h185
30 files changed, 630 insertions, 619 deletions
diff --git a/drivers/led/aw20216s.c b/drivers/led/aw20216s.c
index 8f3ebec510..ab7f3ccb42 100644
--- a/drivers/led/aw20216s.c
+++ b/drivers/led/aw20216s.c
@@ -19,39 +19,16 @@
19#include "wait.h" 19#include "wait.h"
20#include "spi_master.h" 20#include "spi_master.h"
21 21
22/* The AW20216S appears to be somewhat similar to the IS31FL743, although quite
23 * a few things are different, such as the command byte format and page ordering.
24 * The LED addresses start from 0x00 instead of 0x01.
25 */
26#define AW20216S_ID 0b1010 << 4
27
28#define AW20216S_PAGE_FUNCTION 0x00 << 1 // PG0, Function registers
29#define AW20216S_PAGE_PWM 0x01 << 1 // PG1, LED PWM control
30#define AW20216S_PAGE_SCALING 0x02 << 1 // PG2, LED current scaling control
31#define AW20216S_PAGE_PATCHOICE 0x03 << 1 // PG3, Pattern choice?
32#define AW20216S_PAGE_PWMSCALING 0x04 << 1 // PG4, LED PWM + Scaling control?
33
34#define AW20216S_WRITE 0
35#define AW20216S_READ 1
36
37#define AW20216S_REG_CONFIGURATION 0x00 // PG0
38#define AW20216S_REG_GLOBALCURRENT 0x01 // PG0
39#define AW20216S_REG_RESET 0x2F // PG0
40#define AW20216S_REG_MIXFUNCTION 0x46 // PG0
41
42// Default value of AW20216S_REG_CONFIGURATION
43// D7:D4 = 1011, SWSEL (SW1~SW12 active)
44// D3 = 0?, reserved (apparently this should be 1 but it doesn't seem to matter)
45// D2:D1 = 00, OSDE (open/short detection enable)
46// D0 = 0, CHIPEN (write 1 to enable LEDs when hardware enable pulled high)
47#define AW20216S_CONFIG_DEFAULT 0b10110000
48#define AW20216S_MIXCR_DEFAULT 0b00000000
49#define AW20216S_RESET_CMD 0xAE
50#define AW20216S_CHIPEN 1
51#define AW20216S_LPEN (0x01 << 1)
52
53#define AW20216S_PWM_REGISTER_COUNT 216 22#define AW20216S_PWM_REGISTER_COUNT 216
54 23
24#ifndef AW20216S_CONFIGURATION
25# define AW20216S_CONFIGURATION (AW20216S_CONFIGURATION_SWSEL_1_12 | AW20216S_CONFIGURATION_CHIPEN)
26#endif
27
28#ifndef AW20216S_MIX_FUNCTION
29# define AW20216S_MIX_FUNCTION (AW20216S_MIX_FUNCTION_LPEN)
30#endif
31
55#ifndef AW20216S_SCALING_MAX 32#ifndef AW20216S_SCALING_MAX
56# define AW20216S_SCALING_MAX 150 33# define AW20216S_SCALING_MAX 150
57#endif 34#endif
@@ -102,7 +79,7 @@ static inline bool aw20216s_write_register(pin_t cs_pin, uint8_t page, uint8_t r
102} 79}
103 80
104void aw20216s_soft_reset(pin_t cs_pin) { 81void aw20216s_soft_reset(pin_t cs_pin) {
105 aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_REG_RESET, AW20216S_RESET_CMD); 82 aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_FUNCTION_REG_RESET, AW20216S_RESET_MAGIC);
106} 83}
107 84
108static void aw20216s_init_scaling(pin_t cs_pin) { 85static void aw20216s_init_scaling(pin_t cs_pin) {
@@ -114,16 +91,16 @@ static void aw20216s_init_scaling(pin_t cs_pin) {
114 91
115static inline void aw20216s_init_current_limit(pin_t cs_pin) { 92static inline void aw20216s_init_current_limit(pin_t cs_pin) {
116 // Push config 93 // Push config
117 aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_REG_GLOBALCURRENT, AW20216S_GLOBAL_CURRENT_MAX); 94 aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_FUNCTION_REG_GLOBAL_CURRENT, AW20216S_GLOBAL_CURRENT_MAX);
118} 95}
119 96
120static inline void aw20216s_soft_enable(pin_t cs_pin) { 97static inline void aw20216s_soft_enable(pin_t cs_pin) {
121 // Push config 98 // Push config
122 aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_REG_CONFIGURATION, AW20216S_CONFIG_DEFAULT | AW20216S_CHIPEN); 99 aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_FUNCTION_REG_CONFIGURATION, AW20216S_CONFIGURATION);
123} 100}
124 101
125static inline void aw20216s_auto_lowpower(pin_t cs_pin) { 102static inline void aw20216s_auto_lowpower(pin_t cs_pin) {
126 aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_REG_MIXFUNCTION, AW20216S_MIXCR_DEFAULT | AW20216S_LPEN); 103 aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_FUNCTION_REG_MIX_FUNCTION, AW20216S_MIX_FUNCTION);
127} 104}
128 105
129void aw20216s_init_drivers(void) { 106void aw20216s_init_drivers(void) {
diff --git a/drivers/led/aw20216s.h b/drivers/led/aw20216s.h
index d79d632084..38a0c92b2f 100644
--- a/drivers/led/aw20216s.h
+++ b/drivers/led/aw20216s.h
@@ -52,6 +52,28 @@
52#define g_aw_leds g_aw20216s_leds 52#define g_aw_leds g_aw20216s_leds
53// ======== 53// ========
54 54
55#define AW20216S_ID (0b1010 << 4)
56#define AW20216S_WRITE 0
57#define AW20216S_READ 1
58
59#define AW20216S_PAGE_FUNCTION (0x00 << 1)
60#define AW20216S_PAGE_PWM (0x01 << 1)
61#define AW20216S_PAGE_SCALING (0x02 << 1)
62#define AW20216S_PAGE_PATTERN_CHOICE (0x03 << 1)
63#define AW20216S_PAGE_PWM_SCALING (0x04 << 1)
64
65#define AW20216S_FUNCTION_REG_CONFIGURATION 0x00
66#define AW20216S_CONFIGURATION_SWSEL_1_12 (0b1011 << 4)
67#define AW20216S_CONFIGURATION_CHIPEN (0b1 << 0)
68
69#define AW20216S_FUNCTION_REG_GLOBAL_CURRENT 0x01
70
71#define AW20216S_FUNCTION_REG_RESET 0x2F
72#define AW20216S_RESET_MAGIC 0xAE
73
74#define AW20216S_FUNCTION_REG_MIX_FUNCTION 0x46
75#define AW20216S_MIX_FUNCTION_LPEN (0b1 << 1)
76
55#if defined(RGB_MATRIX_AW20216S) 77#if defined(RGB_MATRIX_AW20216S)
56# define AW20216S_LED_COUNT RGB_MATRIX_LED_COUNT 78# define AW20216S_LED_COUNT RGB_MATRIX_LED_COUNT
57#endif 79#endif
diff --git a/drivers/led/issi/is31fl3218-simple.c b/drivers/led/issi/is31fl3218-simple.c
index ea9d76ddbb..ce28c51d18 100644
--- a/drivers/led/issi/is31fl3218-simple.c
+++ b/drivers/led/issi/is31fl3218-simple.c
@@ -17,13 +17,6 @@
17#include <string.h> 17#include <string.h>
18#include "i2c_master.h" 18#include "i2c_master.h"
19 19
20// These are the register addresses
21#define IS31FL3218_REG_SHUTDOWN 0x00
22#define IS31FL3218_REG_PWM 0x01
23#define IS31FL3218_REG_CONTROL 0x13
24#define IS31FL3218_REG_UPDATE 0x16
25#define IS31FL3218_REG_RESET 0x17
26
27#define IS31FL3218_PWM_REGISTER_COUNT 18 20#define IS31FL3218_PWM_REGISTER_COUNT 18
28#define IS31FL3218_LED_CONTROL_REGISTER_COUNT 3 21#define IS31FL3218_LED_CONTROL_REGISTER_COUNT 3
29 22
@@ -86,7 +79,7 @@ void is31fl3218_init(void) {
86 79
87 // turn off all LEDs in the LED control register 80 // turn off all LEDs in the LED control register
88 for (uint8_t i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) { 81 for (uint8_t i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) {
89 is31fl3218_write_register(IS31FL3218_REG_CONTROL + i, 0x00); 82 is31fl3218_write_register(IS31FL3218_REG_LED_CONTROL_1 + i, 0x00);
90 } 83 }
91 84
92 // Load PWM registers and LED Control register data 85 // Load PWM registers and LED Control register data
@@ -146,7 +139,7 @@ void is31fl3218_update_pwm_buffers(void) {
146void is31fl3218_update_led_control_registers(void) { 139void is31fl3218_update_led_control_registers(void) {
147 if (g_led_control_registers_update_required) { 140 if (g_led_control_registers_update_required) {
148 for (int i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) { 141 for (int i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) {
149 is31fl3218_write_register(IS31FL3218_REG_CONTROL + i, g_led_control_registers[i]); 142 is31fl3218_write_register(IS31FL3218_REG_LED_CONTROL_1 + i, g_led_control_registers[i]);
150 } 143 }
151 144
152 g_led_control_registers_update_required = false; 145 g_led_control_registers_update_required = false;
diff --git a/drivers/led/issi/is31fl3218-simple.h b/drivers/led/issi/is31fl3218-simple.h
index 0b5abca341..9492817809 100644
--- a/drivers/led/issi/is31fl3218-simple.h
+++ b/drivers/led/issi/is31fl3218-simple.h
@@ -21,6 +21,14 @@
21#include "progmem.h" 21#include "progmem.h"
22#include "util.h" 22#include "util.h"
23 23
24#define IS31FL3218_REG_SHUTDOWN 0x00
25#define IS31FL3218_REG_PWM 0x01
26#define IS31FL3218_REG_LED_CONTROL_1 0x13
27#define IS31FL3218_REG_LED_CONTROL_2 0x14
28#define IS31FL3218_REG_LED_CONTROL_3 0x15
29#define IS31FL3218_REG_UPDATE 0x16
30#define IS31FL3218_REG_RESET 0x17
31
24#define IS31FL3218_I2C_ADDRESS 0x54 32#define IS31FL3218_I2C_ADDRESS 0x54
25 33
26#if defined(LED_MATRIX_IS31FL3218) 34#if defined(LED_MATRIX_IS31FL3218)
diff --git a/drivers/led/issi/is31fl3218.c b/drivers/led/issi/is31fl3218.c
index 357cb1ab55..39db09d518 100644
--- a/drivers/led/issi/is31fl3218.c
+++ b/drivers/led/issi/is31fl3218.c
@@ -17,13 +17,6 @@
17#include <string.h> 17#include <string.h>
18#include "i2c_master.h" 18#include "i2c_master.h"
19 19
20// These are the register addresses
21#define IS31FL3218_REG_SHUTDOWN 0x00
22#define IS31FL3218_REG_PWM 0x01
23#define IS31FL3218_REG_CONTROL 0x13
24#define IS31FL3218_REG_UPDATE 0x16
25#define IS31FL3218_REG_RESET 0x17
26
27#define IS31FL3218_PWM_REGISTER_COUNT 18 20#define IS31FL3218_PWM_REGISTER_COUNT 18
28#define IS31FL3218_LED_CONTROL_REGISTER_COUNT 3 21#define IS31FL3218_LED_CONTROL_REGISTER_COUNT 3
29 22
@@ -86,7 +79,7 @@ void is31fl3218_init(void) {
86 79
87 // turn off all LEDs in the LED control register 80 // turn off all LEDs in the LED control register
88 for (uint8_t i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) { 81 for (uint8_t i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) {
89 is31fl3218_write_register(IS31FL3218_REG_CONTROL + i, 0x00); 82 is31fl3218_write_register(IS31FL3218_REG_LED_CONTROL_1 + i, 0x00);
90 } 83 }
91 84
92 // Load PWM registers and LED Control register data 85 // Load PWM registers and LED Control register data
@@ -162,7 +155,7 @@ void is31fl3218_update_pwm_buffers(void) {
162void is31fl3218_update_led_control_registers(void) { 155void is31fl3218_update_led_control_registers(void) {
163 if (g_led_control_registers_update_required) { 156 if (g_led_control_registers_update_required) {
164 for (int i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) { 157 for (int i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) {
165 is31fl3218_write_register(IS31FL3218_REG_CONTROL + i, g_led_control_registers[i]); 158 is31fl3218_write_register(IS31FL3218_REG_LED_CONTROL_1 + i, g_led_control_registers[i]);
166 } 159 }
167 160
168 g_led_control_registers_update_required = false; 161 g_led_control_registers_update_required = false;
diff --git a/drivers/led/issi/is31fl3218.h b/drivers/led/issi/is31fl3218.h
index 1d4f881e3c..ffa7f36d61 100644
--- a/drivers/led/issi/is31fl3218.h
+++ b/drivers/led/issi/is31fl3218.h
@@ -21,6 +21,14 @@
21#include "progmem.h" 21#include "progmem.h"
22#include "util.h" 22#include "util.h"
23 23
24#define IS31FL3218_REG_SHUTDOWN 0x00
25#define IS31FL3218_REG_PWM 0x01
26#define IS31FL3218_REG_LED_CONTROL_1 0x13
27#define IS31FL3218_REG_LED_CONTROL_2 0x14
28#define IS31FL3218_REG_LED_CONTROL_3 0x15
29#define IS31FL3218_REG_UPDATE 0x16
30#define IS31FL3218_REG_RESET 0x17
31
24#define IS31FL3218_I2C_ADDRESS 0x54 32#define IS31FL3218_I2C_ADDRESS 0x54
25 33
26#if defined(RGB_MATRIX_IS31FL3218) 34#if defined(RGB_MATRIX_IS31FL3218)
diff --git a/drivers/led/issi/is31fl3731-simple.c b/drivers/led/issi/is31fl3731-simple.c
index c6f1da5789..8dbfc3cd31 100644
--- a/drivers/led/issi/is31fl3731-simple.c
+++ b/drivers/led/issi/is31fl3731-simple.c
@@ -22,26 +22,6 @@
22#include "i2c_master.h" 22#include "i2c_master.h"
23#include "wait.h" 23#include "wait.h"
24 24
25#define IS31FL3731_REG_CONFIG 0x00
26#define IS31FL3731_REG_CONFIG_PICTUREMODE 0x00
27#define IS31FL3731_REG_CONFIG_AUTOPLAYMODE 0x08
28#define IS31FL3731_REG_CONFIG_AUDIOPLAYMODE 0x18
29
30#define IS31FL3731_CONF_PICTUREMODE 0x00
31#define IS31FL3731_CONF_AUTOFRAMEMODE 0x04
32#define IS31FL3731_CONF_AUDIOMODE 0x08
33
34#define IS31FL3731_REG_PICTUREFRAME 0x01
35
36// Not defined in the datasheet -- See AN for IC
37#define IS31FL3731_REG_GHOST_IMAGE_PREVENTION 0xC2 // Set bit 4 to enable de-ghosting
38
39#define IS31FL3731_REG_SHUTDOWN 0x0A
40#define IS31FL3731_REG_AUDIOSYNC 0x06
41
42#define IS31FL3731_COMMANDREGISTER 0xFD
43#define IS31FL3731_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine'
44
45#define IS31FL3731_PWM_REGISTER_COUNT 144 25#define IS31FL3731_PWM_REGISTER_COUNT 144
46#define IS31FL3731_LED_CONTROL_REGISTER_COUNT 18 26#define IS31FL3731_LED_CONTROL_REGISTER_COUNT 18
47 27
@@ -144,26 +124,26 @@ void is31fl3731_init(uint8_t addr) {
144 // then disable software shutdown. 124 // then disable software shutdown.
145 125
146 // select "function register" bank 126 // select "function register" bank
147 is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, IS31FL3731_BANK_FUNCTIONREG); 127 is31fl3731_write_register(addr, IS31FL3731_REG_COMMAND, IS31FL3731_COMMAND_FUNCTION);
148 128
149 // enable software shutdown 129 // enable software shutdown
150 is31fl3731_write_register(addr, IS31FL3731_REG_SHUTDOWN, 0x00); 130 is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_SHUTDOWN, 0x00);
151#ifdef IS31FL3731_DEGHOST // set to enable de-ghosting of the array 131#ifdef IS31FL3731_DEGHOST // set to enable de-ghosting of the array
152 is31fl3731_write_register(addr, IS31FL3731_REG_GHOST_IMAGE_PREVENTION, 0x10); 132 is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_GHOST_IMAGE_PREVENTION, IS31FL3731_GHOST_IMAGE_PREVENTION_GEN);
153#endif 133#endif
154 134
155 // this delay was copied from other drivers, might not be needed 135 // this delay was copied from other drivers, might not be needed
156 wait_ms(10); 136 wait_ms(10);
157 137
158 // picture mode 138 // picture mode
159 is31fl3731_write_register(addr, IS31FL3731_REG_CONFIG, IS31FL3731_REG_CONFIG_PICTUREMODE); 139 is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_CONFIG, IS31FL3731_CONFIG_MODE_PICTURE);
160 // display frame 0 140 // display frame 0
161 is31fl3731_write_register(addr, IS31FL3731_REG_PICTUREFRAME, 0x00); 141 is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_PICTURE_DISPLAY, 0x00);
162 // audio sync off 142 // audio sync off
163 is31fl3731_write_register(addr, IS31FL3731_REG_AUDIOSYNC, 0x00); 143 is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_AUDIO_SYNC, 0x00);
164 144
165 // select bank 0 145 // select bank 0
166 is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, 0); 146 is31fl3731_write_register(addr, IS31FL3731_REG_COMMAND, IS31FL3731_COMMAND_FRAME_1);
167 147
168 // turn off all LEDs in the LED control register 148 // turn off all LEDs in the LED control register
169 for (int i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) { 149 for (int i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) {
@@ -181,15 +161,15 @@ void is31fl3731_init(uint8_t addr) {
181 } 161 }
182 162
183 // select "function register" bank 163 // select "function register" bank
184 is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, IS31FL3731_BANK_FUNCTIONREG); 164 is31fl3731_write_register(addr, IS31FL3731_REG_COMMAND, IS31FL3731_COMMAND_FUNCTION);
185 165
186 // disable software shutdown 166 // disable software shutdown
187 is31fl3731_write_register(addr, IS31FL3731_REG_SHUTDOWN, 0x01); 167 is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_SHUTDOWN, 0x01);
188 168
189 // select bank 0 and leave it selected. 169 // select bank 0 and leave it selected.
190 // most usage after initialization is just writing PWM buffers in bank 0 170 // most usage after initialization is just writing PWM buffers in bank 0
191 // as there's not much point in double-buffering 171 // as there's not much point in double-buffering
192 is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, 0); 172 is31fl3731_write_register(addr, IS31FL3731_REG_COMMAND, IS31FL3731_COMMAND_FRAME_1);
193} 173}
194 174
195void is31fl3731_set_value(int index, uint8_t value) { 175void is31fl3731_set_value(int index, uint8_t value) {
diff --git a/drivers/led/issi/is31fl3731-simple.h b/drivers/led/issi/is31fl3731-simple.h
index 32b42feab0..4d173847dd 100644
--- a/drivers/led/issi/is31fl3731-simple.h
+++ b/drivers/led/issi/is31fl3731-simple.h
@@ -50,6 +50,30 @@
50#define g_is31_leds g_is31fl3731_leds 50#define g_is31_leds g_is31fl3731_leds
51// ======== 51// ========
52 52
53#define IS31FL3731_REG_COMMAND 0xFD
54#define IS31FL3731_COMMAND_FRAME_1 0x00
55#define IS31FL3731_COMMAND_FRAME_2 0x01
56#define IS31FL3731_COMMAND_FRAME_3 0x02
57#define IS31FL3731_COMMAND_FRAME_4 0x03
58#define IS31FL3731_COMMAND_FRAME_5 0x04
59#define IS31FL3731_COMMAND_FRAME_6 0x05
60#define IS31FL3731_COMMAND_FRAME_7 0x06
61#define IS31FL3731_COMMAND_FRAME_8 0x07
62#define IS31FL3731_COMMAND_FUNCTION 0x0B
63
64#define IS31FL3731_FUNCTION_REG_CONFIG 0x00
65#define IS31FL3731_CONFIG_MODE_PICTURE 0x00
66#define IS31FL3731_CONFIG_MODE_AUTO_PLAY 0x08
67#define IS31FL3731_CONFIG_MODE_AUDIO_PLAY 0x18
68
69#define IS31FL3731_FUNCTION_REG_PICTURE_DISPLAY 0x01
70#define IS31FL3731_FUNCTION_REG_AUDIO_SYNC 0x06
71#define IS31FL3731_FUNCTION_REG_SHUTDOWN 0x0A
72
73// Not defined in the datasheet -- See AN for IC
74#define IS31FL3731_FUNCTION_REG_GHOST_IMAGE_PREVENTION 0xC2
75#define IS31FL3731_GHOST_IMAGE_PREVENTION_GEN 0x10
76
53#define IS31FL3731_I2C_ADDRESS_GND 0x74 77#define IS31FL3731_I2C_ADDRESS_GND 0x74
54#define IS31FL3731_I2C_ADDRESS_SCL 0x75 78#define IS31FL3731_I2C_ADDRESS_SCL 0x75
55#define IS31FL3731_I2C_ADDRESS_SDA 0x76 79#define IS31FL3731_I2C_ADDRESS_SDA 0x76
diff --git a/drivers/led/issi/is31fl3731.c b/drivers/led/issi/is31fl3731.c
index 6a64d89ecf..1ab8997731 100644
--- a/drivers/led/issi/is31fl3731.c
+++ b/drivers/led/issi/is31fl3731.c
@@ -21,26 +21,6 @@
21#include "i2c_master.h" 21#include "i2c_master.h"
22#include "wait.h" 22#include "wait.h"
23 23
24#define IS31FL3731_REG_CONFIG 0x00
25#define IS31FL3731_REG_CONFIG_PICTUREMODE 0x00
26#define IS31FL3731_REG_CONFIG_AUTOPLAYMODE 0x08
27#define IS31FL3731_REG_CONFIG_AUDIOPLAYMODE 0x18
28
29#define IS31FL3731_CONF_PICTUREMODE 0x00
30#define IS31FL3731_CONF_AUTOFRAMEMODE 0x04
31#define IS31FL3731_CONF_AUDIOMODE 0x08
32
33#define IS31FL3731_REG_PICTUREFRAME 0x01
34
35// Not defined in the datasheet -- See AN for IC
36#define IS31FL3731_REG_GHOST_IMAGE_PREVENTION 0xC2 // Set bit 4 to enable de-ghosting
37
38#define IS31FL3731_REG_SHUTDOWN 0x0A
39#define IS31FL3731_REG_AUDIOSYNC 0x06
40
41#define IS31FL3731_COMMANDREGISTER 0xFD
42#define IS31FL3731_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine'
43
44#define IS31FL3731_PWM_REGISTER_COUNT 144 24#define IS31FL3731_PWM_REGISTER_COUNT 144
45#define IS31FL3731_LED_CONTROL_REGISTER_COUNT 18 25#define IS31FL3731_LED_CONTROL_REGISTER_COUNT 18
46 26
@@ -141,26 +121,26 @@ void is31fl3731_init(uint8_t addr) {
141 // then disable software shutdown. 121 // then disable software shutdown.
142 122
143 // select "function register" bank 123 // select "function register" bank
144 is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, IS31FL3731_BANK_FUNCTIONREG); 124 is31fl3731_write_register(addr, IS31FL3731_REG_COMMAND, IS31FL3731_COMMAND_FUNCTION);
145 125
146 // enable software shutdown 126 // enable software shutdown
147 is31fl3731_write_register(addr, IS31FL3731_REG_SHUTDOWN, 0x00); 127 is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_SHUTDOWN, 0x00);
148#ifdef IS31FL3731_DEGHOST // set to enable de-ghosting of the array 128#ifdef IS31FL3731_DEGHOST // set to enable de-ghosting of the array
149 is31fl3731_write_register(addr, IS31FL3731_REG_GHOST_IMAGE_PREVENTION, 0x10); 129 is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_GHOST_IMAGE_PREVENTION, IS31FL3731_GHOST_IMAGE_PREVENTION_GEN);
150#endif 130#endif
151 131
152 // this delay was copied from other drivers, might not be needed 132 // this delay was copied from other drivers, might not be needed
153 wait_ms(10); 133 wait_ms(10);
154 134
155 // picture mode 135 // picture mode
156 is31fl3731_write_register(addr, IS31FL3731_REG_CONFIG, IS31FL3731_REG_CONFIG_PICTUREMODE); 136 is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_CONFIG, IS31FL3731_CONFIG_MODE_PICTURE);
157 // display frame 0 137 // display frame 0
158 is31fl3731_write_register(addr, IS31FL3731_REG_PICTUREFRAME, 0x00); 138 is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_PICTURE_DISPLAY, 0x00);
159 // audio sync off 139 // audio sync off
160 is31fl3731_write_register(addr, IS31FL3731_REG_AUDIOSYNC, 0x00); 140 is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_AUDIO_SYNC, 0x00);
161 141
162 // select bank 0 142 // select bank 0
163 is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, 0); 143 is31fl3731_write_register(addr, IS31FL3731_REG_COMMAND, IS31FL3731_COMMAND_FRAME_1);
164 144
165 // turn off all LEDs in the LED control register 145 // turn off all LEDs in the LED control register
166 for (int i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) { 146 for (int i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) {
@@ -178,15 +158,15 @@ void is31fl3731_init(uint8_t addr) {
178 } 158 }
179 159
180 // select "function register" bank 160 // select "function register" bank
181 is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, IS31FL3731_BANK_FUNCTIONREG); 161 is31fl3731_write_register(addr, IS31FL3731_REG_COMMAND, IS31FL3731_COMMAND_FUNCTION);
182 162
183 // disable software shutdown 163 // disable software shutdown
184 is31fl3731_write_register(addr, IS31FL3731_REG_SHUTDOWN, 0x01); 164 is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_SHUTDOWN, 0x01);
185 165
186 // select bank 0 and leave it selected. 166 // select bank 0 and leave it selected.
187 // most usage after initialization is just writing PWM buffers in bank 0 167 // most usage after initialization is just writing PWM buffers in bank 0
188 // as there's not much point in double-buffering 168 // as there's not much point in double-buffering
189 is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, 0); 169 is31fl3731_write_register(addr, IS31FL3731_REG_COMMAND, IS31FL3731_COMMAND_FRAME_1);
190} 170}
191 171
192void is31fl3731_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { 172void is31fl3731_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) {
diff --git a/drivers/led/issi/is31fl3731.h b/drivers/led/issi/is31fl3731.h
index d7b512e4c4..b45cb2b07d 100644
--- a/drivers/led/issi/is31fl3731.h
+++ b/drivers/led/issi/is31fl3731.h
@@ -49,6 +49,30 @@
49#define g_is31_leds g_is31fl3731_leds 49#define g_is31_leds g_is31fl3731_leds
50// ======== 50// ========
51 51
52#define IS31FL3731_REG_COMMAND 0xFD
53#define IS31FL3731_COMMAND_FRAME_1 0x00
54#define IS31FL3731_COMMAND_FRAME_2 0x01
55#define IS31FL3731_COMMAND_FRAME_3 0x02
56#define IS31FL3731_COMMAND_FRAME_4 0x03
57#define IS31FL3731_COMMAND_FRAME_5 0x04
58#define IS31FL3731_COMMAND_FRAME_6 0x05
59#define IS31FL3731_COMMAND_FRAME_7 0x06
60#define IS31FL3731_COMMAND_FRAME_8 0x07
61#define IS31FL3731_COMMAND_FUNCTION 0x0B
62
63#define IS31FL3731_FUNCTION_REG_CONFIG 0x00
64#define IS31FL3731_CONFIG_MODE_PICTURE 0x00
65#define IS31FL3731_CONFIG_MODE_AUTO_PLAY 0x08
66#define IS31FL3731_CONFIG_MODE_AUDIO_PLAY 0x18
67
68#define IS31FL3731_FUNCTION_REG_PICTURE_DISPLAY 0x01
69#define IS31FL3731_FUNCTION_REG_AUDIO_SYNC 0x06
70#define IS31FL3731_FUNCTION_REG_SHUTDOWN 0x0A
71
72// Not defined in the datasheet -- See AN for IC
73#define IS31FL3731_FUNCTION_REG_GHOST_IMAGE_PREVENTION 0xC2
74#define IS31FL3731_GHOST_IMAGE_PREVENTION_GEN 0x10
75
52#define IS31FL3731_I2C_ADDRESS_GND 0x74 76#define IS31FL3731_I2C_ADDRESS_GND 0x74
53#define IS31FL3731_I2C_ADDRESS_SCL 0x75 77#define IS31FL3731_I2C_ADDRESS_SCL 0x75
54#define IS31FL3731_I2C_ADDRESS_SDA 0x76 78#define IS31FL3731_I2C_ADDRESS_SDA 0x76
diff --git a/drivers/led/issi/is31fl3733-simple.c b/drivers/led/issi/is31fl3733-simple.c
index 63e9f533e2..9f2444c253 100644
--- a/drivers/led/issi/is31fl3733-simple.c
+++ b/drivers/led/issi/is31fl3733-simple.c
@@ -23,22 +23,6 @@
23#include "i2c_master.h" 23#include "i2c_master.h"
24#include "wait.h" 24#include "wait.h"
25 25
26#define IS31FL3733_COMMANDREGISTER 0xFD
27#define IS31FL3733_COMMANDREGISTER_WRITELOCK 0xFE
28#define IS31FL3733_INTERRUPTMASKREGISTER 0xF0
29#define IS31FL3733_INTERRUPTSTATUSREGISTER 0xF1
30
31#define IS31FL3733_PAGE_LEDCONTROL 0x00 // PG0
32#define IS31FL3733_PAGE_PWM 0x01 // PG1
33#define IS31FL3733_PAGE_AUTOBREATH 0x02 // PG2
34#define IS31FL3733_PAGE_FUNCTION 0x03 // PG3
35
36#define IS31FL3733_REG_CONFIGURATION 0x00 // PG3
37#define IS31FL3733_REG_GLOBALCURRENT 0x01 // PG3
38#define IS31FL3733_REG_RESET 0x11 // PG3
39#define IS31FL3733_REG_SW_PULLUP 0x0F // PG3
40#define IS31FL3733_REG_CS_PULLDOWN 0x10 // PG3
41
42#define IS31FL3733_PWM_REGISTER_COUNT 192 26#define IS31FL3733_PWM_REGISTER_COUNT 192
43#define IS31FL3733_LED_CONTROL_REGISTER_COUNT 24 27#define IS31FL3733_LED_CONTROL_REGISTER_COUNT 24
44 28
@@ -62,8 +46,8 @@
62# define IS31FL3733_CSPULLDOWN IS31FL3733_PDR_0_OHM 46# define IS31FL3733_CSPULLDOWN IS31FL3733_PDR_0_OHM
63#endif 47#endif
64 48
65#ifndef IS31FL3733_GLOBALCURRENT 49#ifndef IS31FL3733_GLOBAL_CURRENT
66# define IS31FL3733_GLOBALCURRENT 0xFF 50# define IS31FL3733_GLOBAL_CURRENT 0xFF
67#endif 51#endif
68 52
69#ifndef IS31FL3733_SYNC_1 53#ifndef IS31FL3733_SYNC_1
@@ -180,20 +164,20 @@ void is31fl3733_init(uint8_t addr, uint8_t sync) {
180 // Sync is passed so set it according to the datasheet. 164 // Sync is passed so set it according to the datasheet.
181 165
182 // Unlock the command register. 166 // Unlock the command register.
183 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); 167 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
184 168
185 // Select PG0 169 // Select PG0
186 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_LEDCONTROL); 170 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_LED_CONTROL);
187 // Turn off all LEDs. 171 // Turn off all LEDs.
188 for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) { 172 for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) {
189 is31fl3733_write_register(addr, i, 0x00); 173 is31fl3733_write_register(addr, i, 0x00);
190 } 174 }
191 175
192 // Unlock the command register. 176 // Unlock the command register.
193 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); 177 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
194 178
195 // Select PG1 179 // Select PG1
196 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_PWM); 180 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_PWM);
197 // Set PWM on all LEDs to 0 181 // Set PWM on all LEDs to 0
198 // No need to setup Breath registers to PWM as that is the default. 182 // No need to setup Breath registers to PWM as that is the default.
199 for (int i = 0; i < IS31FL3733_PWM_REGISTER_COUNT; i++) { 183 for (int i = 0; i < IS31FL3733_PWM_REGISTER_COUNT; i++) {
@@ -201,18 +185,18 @@ void is31fl3733_init(uint8_t addr, uint8_t sync) {
201 } 185 }
202 186
203 // Unlock the command register. 187 // Unlock the command register.
204 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); 188 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
205 189
206 // Select PG3 190 // Select PG3
207 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_FUNCTION); 191 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_FUNCTION);
208 // Set de-ghost pull-up resistors (SWx) 192 // Set de-ghost pull-up resistors (SWx)
209 is31fl3733_write_register(addr, IS31FL3733_REG_SW_PULLUP, IS31FL3733_SW_PULLUP); 193 is31fl3733_write_register(addr, IS31FL3733_FUNCTION_REG_SW_PULLUP, IS31FL3733_SW_PULLUP);
210 // Set de-ghost pull-down resistors (CSx) 194 // Set de-ghost pull-down resistors (CSx)
211 is31fl3733_write_register(addr, IS31FL3733_REG_CS_PULLDOWN, IS31FL3733_CS_PULLDOWN); 195 is31fl3733_write_register(addr, IS31FL3733_FUNCTION_REG_CS_PULLDOWN, IS31FL3733_CS_PULLDOWN);
212 // Set global current to maximum. 196 // Set global current to maximum.
213 is31fl3733_write_register(addr, IS31FL3733_REG_GLOBALCURRENT, IS31FL3733_GLOBALCURRENT); 197 is31fl3733_write_register(addr, IS31FL3733_FUNCTION_REG_GLOBAL_CURRENT, IS31FL3733_GLOBAL_CURRENT);
214 // Disable software shutdown. 198 // Disable software shutdown.
215 is31fl3733_write_register(addr, IS31FL3733_REG_CONFIGURATION, ((sync & 0b11) << 6) | ((IS31FL3733_PWM_FREQUENCY & 0b111) << 3) | 0x01); 199 is31fl3733_write_register(addr, IS31FL3733_FUNCTION_REG_CONFIGURATION, ((sync & 0b11) << 6) | ((IS31FL3733_PWM_FREQUENCY & 0b111) << 3) | 0x01);
216 200
217 // Wait 10ms to ensure the device has woken up. 201 // Wait 10ms to ensure the device has woken up.
218 wait_ms(10); 202 wait_ms(10);
@@ -256,8 +240,8 @@ void is31fl3733_set_led_control_register(uint8_t index, bool value) {
256void is31fl3733_update_pwm_buffers(uint8_t addr, uint8_t index) { 240void is31fl3733_update_pwm_buffers(uint8_t addr, uint8_t index) {
257 if (g_pwm_buffer_update_required[index]) { 241 if (g_pwm_buffer_update_required[index]) {
258 // Firstly we need to unlock the command register and select PG1. 242 // Firstly we need to unlock the command register and select PG1.
259 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); 243 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
260 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_PWM); 244 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_PWM);
261 245
262 // If any of the transactions fail we risk writing dirty PG0, 246 // If any of the transactions fail we risk writing dirty PG0,
263 // refresh page 0 just in case. 247 // refresh page 0 just in case.
@@ -271,8 +255,8 @@ void is31fl3733_update_pwm_buffers(uint8_t addr, uint8_t index) {
271void is31fl3733_update_led_control_registers(uint8_t addr, uint8_t index) { 255void is31fl3733_update_led_control_registers(uint8_t addr, uint8_t index) {
272 if (g_led_control_registers_update_required[index]) { 256 if (g_led_control_registers_update_required[index]) {
273 // Firstly we need to unlock the command register and select PG0 257 // Firstly we need to unlock the command register and select PG0
274 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); 258 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
275 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_LEDCONTROL); 259 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_LED_CONTROL);
276 for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) { 260 for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) {
277 is31fl3733_write_register(addr, i, g_led_control_registers[index][i]); 261 is31fl3733_write_register(addr, i, g_led_control_registers[index][i]);
278 } 262 }
diff --git a/drivers/led/issi/is31fl3733-simple.h b/drivers/led/issi/is31fl3733-simple.h
index 201d3ff788..c37b1fe5f2 100644
--- a/drivers/led/issi/is31fl3733-simple.h
+++ b/drivers/led/issi/is31fl3733-simple.h
@@ -42,7 +42,7 @@
42# define IS31FL3733_CS_PULLDOWN ISSI_CSPULLUP 42# define IS31FL3733_CS_PULLDOWN ISSI_CSPULLUP
43#endif 43#endif
44#ifdef ISSI_GLOBALCURRENT 44#ifdef ISSI_GLOBALCURRENT
45# define IS31FL3733_GLOBALCURRENT ISSI_GLOBALCURRENT 45# define IS31FL3733_GLOBAL_CURRENT ISSI_GLOBALCURRENT
46#endif 46#endif
47 47
48#define is31_led is31fl3733_led_t 48#define is31_led is31fl3733_led_t
@@ -57,6 +57,25 @@
57#define PUR_32KR IS31FL3733_PUR_32K_OHM 57#define PUR_32KR IS31FL3733_PUR_32K_OHM
58// ======== 58// ========
59 59
60#define IS31FL3733_REG_INTERRUPT_MASK 0xF0
61#define IS31FL3733_REG_INTERRUPT_STATUS 0xF1
62
63#define IS31FL3733_REG_COMMAND 0xFD
64
65#define IS31FL3733_COMMAND_LED_CONTROL 0x00
66#define IS31FL3733_COMMAND_PWM 0x01
67#define IS31FL3733_COMMAND_AUTO_BREATH 0x02
68#define IS31FL3733_COMMAND_FUNCTION 0x03
69
70#define IS31FL3733_FUNCTION_REG_CONFIGURATION 0x00
71#define IS31FL3733_FUNCTION_REG_GLOBAL_CURRENT 0x01
72#define IS31FL3733_FUNCTION_REG_SW_PULLUP 0x0F
73#define IS31FL3733_FUNCTION_REG_CS_PULLDOWN 0x10
74#define IS31FL3733_FUNCTION_REG_RESET 0x11
75
76#define IS31FL3733_REG_COMMAND_WRITE_LOCK 0xFE
77#define IS31FL3733_COMMAND_WRITE_LOCK_MAGIC 0xC5
78
60#define IS31FL3733_I2C_ADDRESS_GND_GND 0x50 79#define IS31FL3733_I2C_ADDRESS_GND_GND 0x50
61#define IS31FL3733_I2C_ADDRESS_GND_SCL 0x51 80#define IS31FL3733_I2C_ADDRESS_GND_SCL 0x51
62#define IS31FL3733_I2C_ADDRESS_GND_SDA 0x52 81#define IS31FL3733_I2C_ADDRESS_GND_SDA 0x52
diff --git a/drivers/led/issi/is31fl3733.c b/drivers/led/issi/is31fl3733.c
index 5a5f352a6a..5857a800d7 100644
--- a/drivers/led/issi/is31fl3733.c
+++ b/drivers/led/issi/is31fl3733.c
@@ -22,22 +22,6 @@
22#include "i2c_master.h" 22#include "i2c_master.h"
23#include "wait.h" 23#include "wait.h"
24 24
25#define IS31FL3733_COMMANDREGISTER 0xFD
26#define IS31FL3733_COMMANDREGISTER_WRITELOCK 0xFE
27#define IS31FL3733_INTERRUPTMASKREGISTER 0xF0
28#define IS31FL3733_INTERRUPTSTATUSREGISTER 0xF1
29
30#define IS31FL3733_PAGE_LEDCONTROL 0x00 // PG0
31#define IS31FL3733_PAGE_PWM 0x01 // PG1
32#define IS31FL3733_PAGE_AUTOBREATH 0x02 // PG2
33#define IS31FL3733_PAGE_FUNCTION 0x03 // PG3
34
35#define IS31FL3733_REG_CONFIGURATION 0x00 // PG3
36#define IS31FL3733_REG_GLOBALCURRENT 0x01 // PG3
37#define IS31FL3733_REG_RESET 0x11 // PG3
38#define IS31FL3733_REG_SW_PULLUP 0x0F // PG3
39#define IS31FL3733_REG_CS_PULLDOWN 0x10 // PG3
40
41#define IS31FL3733_PWM_REGISTER_COUNT 192 25#define IS31FL3733_PWM_REGISTER_COUNT 192
42#define IS31FL3733_LED_CONTROL_REGISTER_COUNT 24 26#define IS31FL3733_LED_CONTROL_REGISTER_COUNT 24
43 27
@@ -61,8 +45,8 @@
61# define IS31FL3733_CS_PULLDOWN IS31FL3733_PDR_0_OHM 45# define IS31FL3733_CS_PULLDOWN IS31FL3733_PDR_0_OHM
62#endif 46#endif
63 47
64#ifndef IS31FL3733_GLOBALCURRENT 48#ifndef IS31FL3733_GLOBAL_CURRENT
65# define IS31FL3733_GLOBALCURRENT 0xFF 49# define IS31FL3733_GLOBAL_CURRENT 0xFF
66#endif 50#endif
67 51
68#ifndef IS31FL3733_SYNC_1 52#ifndef IS31FL3733_SYNC_1
@@ -179,20 +163,20 @@ void is31fl3733_init(uint8_t addr, uint8_t sync) {
179 // Sync is passed so set it according to the datasheet. 163 // Sync is passed so set it according to the datasheet.
180 164
181 // Unlock the command register. 165 // Unlock the command register.
182 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); 166 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
183 167
184 // Select PG0 168 // Select PG0
185 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_LEDCONTROL); 169 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_LED_CONTROL);
186 // Turn off all LEDs. 170 // Turn off all LEDs.
187 for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) { 171 for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) {
188 is31fl3733_write_register(addr, i, 0x00); 172 is31fl3733_write_register(addr, i, 0x00);
189 } 173 }
190 174
191 // Unlock the command register. 175 // Unlock the command register.
192 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); 176 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
193 177
194 // Select PG1 178 // Select PG1
195 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_PWM); 179 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_PWM);
196 // Set PWM on all LEDs to 0 180 // Set PWM on all LEDs to 0
197 // No need to setup Breath registers to PWM as that is the default. 181 // No need to setup Breath registers to PWM as that is the default.
198 for (int i = 0; i < IS31FL3733_PWM_REGISTER_COUNT; i++) { 182 for (int i = 0; i < IS31FL3733_PWM_REGISTER_COUNT; i++) {
@@ -200,18 +184,18 @@ void is31fl3733_init(uint8_t addr, uint8_t sync) {
200 } 184 }
201 185
202 // Unlock the command register. 186 // Unlock the command register.
203 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); 187 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
204 188
205 // Select PG3 189 // Select PG3
206 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_FUNCTION); 190 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_FUNCTION);
207 // Set de-ghost pull-up resistors (SWx) 191 // Set de-ghost pull-up resistors (SWx)
208 is31fl3733_write_register(addr, IS31FL3733_REG_SW_PULLUP, IS31FL3733_SW_PULLUP); 192 is31fl3733_write_register(addr, IS31FL3733_FUNCTION_REG_SW_PULLUP, IS31FL3733_SW_PULLUP);
209 // Set de-ghost pull-down resistors (CSx) 193 // Set de-ghost pull-down resistors (CSx)
210 is31fl3733_write_register(addr, IS31FL3733_REG_CS_PULLDOWN, IS31FL3733_CS_PULLDOWN); 194 is31fl3733_write_register(addr, IS31FL3733_FUNCTION_REG_CS_PULLDOWN, IS31FL3733_CS_PULLDOWN);
211 // Set global current to maximum. 195 // Set global current to maximum.
212 is31fl3733_write_register(addr, IS31FL3733_REG_GLOBALCURRENT, IS31FL3733_GLOBALCURRENT); 196 is31fl3733_write_register(addr, IS31FL3733_FUNCTION_REG_GLOBAL_CURRENT, IS31FL3733_GLOBAL_CURRENT);
213 // Disable software shutdown. 197 // Disable software shutdown.
214 is31fl3733_write_register(addr, IS31FL3733_REG_CONFIGURATION, ((sync & 0b11) << 6) | ((IS31FL3733_PWM_FREQUENCY & 0b111) << 3) | 0x01); 198 is31fl3733_write_register(addr, IS31FL3733_FUNCTION_REG_CONFIGURATION, ((sync & 0b11) << 6) | ((IS31FL3733_PWM_FREQUENCY & 0b111) << 3) | 0x01);
215 199
216 // Wait 10ms to ensure the device has woken up. 200 // Wait 10ms to ensure the device has woken up.
217 wait_ms(10); 201 wait_ms(10);
@@ -271,8 +255,8 @@ void is31fl3733_set_led_control_register(uint8_t index, bool red, bool green, bo
271void is31fl3733_update_pwm_buffers(uint8_t addr, uint8_t index) { 255void is31fl3733_update_pwm_buffers(uint8_t addr, uint8_t index) {
272 if (g_pwm_buffer_update_required[index]) { 256 if (g_pwm_buffer_update_required[index]) {
273 // Firstly we need to unlock the command register and select PG1. 257 // Firstly we need to unlock the command register and select PG1.
274 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); 258 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
275 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_PWM); 259 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_PWM);
276 260
277 // If any of the transactions fail we risk writing dirty PG0, 261 // If any of the transactions fail we risk writing dirty PG0,
278 // refresh page 0 just in case. 262 // refresh page 0 just in case.
@@ -286,8 +270,8 @@ void is31fl3733_update_pwm_buffers(uint8_t addr, uint8_t index) {
286void is31fl3733_update_led_control_registers(uint8_t addr, uint8_t index) { 270void is31fl3733_update_led_control_registers(uint8_t addr, uint8_t index) {
287 if (g_led_control_registers_update_required[index]) { 271 if (g_led_control_registers_update_required[index]) {
288 // Firstly we need to unlock the command register and select PG0 272 // Firstly we need to unlock the command register and select PG0
289 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); 273 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
290 is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_LEDCONTROL); 274 is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_LED_CONTROL);
291 for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) { 275 for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) {
292 is31fl3733_write_register(addr, i, g_led_control_registers[index][i]); 276 is31fl3733_write_register(addr, i, g_led_control_registers[index][i]);
293 } 277 }
diff --git a/drivers/led/issi/is31fl3733.h b/drivers/led/issi/is31fl3733.h
index c86aa9ee1e..20804b016b 100644
--- a/drivers/led/issi/is31fl3733.h
+++ b/drivers/led/issi/is31fl3733.h
@@ -65,7 +65,7 @@
65# define IS31FL3733_CS_PULLDOWN ISSI_CSPULLUP 65# define IS31FL3733_CS_PULLDOWN ISSI_CSPULLUP
66#endif 66#endif
67#ifdef ISSI_GLOBALCURRENT 67#ifdef ISSI_GLOBALCURRENT
68# define IS31FL3733_GLOBALCURRENT ISSI_GLOBALCURRENT 68# define IS31FL3733_GLOBAL_CURRENT ISSI_GLOBALCURRENT
69#endif 69#endif
70 70
71#define is31_led is31fl3733_led_t 71#define is31_led is31fl3733_led_t
@@ -80,6 +80,25 @@
80#define PUR_32KR IS31FL3733_PUR_32K_OHM 80#define PUR_32KR IS31FL3733_PUR_32K_OHM
81// ======== 81// ========
82 82
83#define IS31FL3733_REG_INTERRUPT_MASK 0xF0
84#define IS31FL3733_REG_INTERRUPT_STATUS 0xF1
85
86#define IS31FL3733_REG_COMMAND 0xFD
87
88#define IS31FL3733_COMMAND_LED_CONTROL 0x00
89#define IS31FL3733_COMMAND_PWM 0x01
90#define IS31FL3733_COMMAND_AUTO_BREATH 0x02
91#define IS31FL3733_COMMAND_FUNCTION 0x03
92
93#define IS31FL3733_FUNCTION_REG_CONFIGURATION 0x00
94#define IS31FL3733_FUNCTION_REG_GLOBAL_CURRENT 0x01
95#define IS31FL3733_FUNCTION_REG_SW_PULLUP 0x0F
96#define IS31FL3733_FUNCTION_REG_CS_PULLDOWN 0x10
97#define IS31FL3733_FUNCTION_REG_RESET 0x11
98
99#define IS31FL3733_REG_COMMAND_WRITE_LOCK 0xFE
100#define IS31FL3733_COMMAND_WRITE_LOCK_MAGIC 0xC5
101
83#define IS31FL3733_I2C_ADDRESS_GND_GND 0x50 102#define IS31FL3733_I2C_ADDRESS_GND_GND 0x50
84#define IS31FL3733_I2C_ADDRESS_GND_SCL 0x51 103#define IS31FL3733_I2C_ADDRESS_GND_SCL 0x51
85#define IS31FL3733_I2C_ADDRESS_GND_SDA 0x52 104#define IS31FL3733_I2C_ADDRESS_GND_SDA 0x52
diff --git a/drivers/led/issi/is31fl3736-simple.c b/drivers/led/issi/is31fl3736-simple.c
index e0d76d07c6..e1cce3c48a 100644
--- a/drivers/led/issi/is31fl3736-simple.c
+++ b/drivers/led/issi/is31fl3736-simple.c
@@ -20,22 +20,6 @@
20#include "i2c_master.h" 20#include "i2c_master.h"
21#include "wait.h" 21#include "wait.h"
22 22
23#define IS31FL3736_COMMANDREGISTER 0xFD
24#define IS31FL3736_COMMANDREGISTER_WRITELOCK 0xFE
25#define IS31FL3736_INTERRUPTMASKREGISTER 0xF0
26#define IS31FL3736_INTERRUPTSTATUSREGISTER 0xF1
27
28#define IS31FL3736_PAGE_LEDCONTROL 0x00 // PG0
29#define IS31FL3736_PAGE_PWM 0x01 // PG1
30#define IS31FL3736_PAGE_AUTOBREATH 0x02 // PG2
31#define IS31FL3736_PAGE_FUNCTION 0x03 // PG3
32
33#define IS31FL3736_REG_CONFIGURATION 0x00 // PG3
34#define IS31FL3736_REG_GLOBALCURRENT 0x01 // PG3
35#define IS31FL3736_REG_RESET 0x11 // PG3
36#define IS31FL3736_REG_SW_PULLUP 0x0F // PG3
37#define IS31FL3736_REG_CS_PULLDOWN 0x10 // PG3
38
39#define IS31FL3736_PWM_REGISTER_COUNT 192 // actually 96 23#define IS31FL3736_PWM_REGISTER_COUNT 192 // actually 96
40#define IS31FL3736_LED_CONTROL_REGISTER_COUNT 24 24#define IS31FL3736_LED_CONTROL_REGISTER_COUNT 24
41 25
@@ -59,8 +43,8 @@
59# define IS31FL3736_CS_PULLDOWN IS31FL3736_PDR_0_OHM 43# define IS31FL3736_CS_PULLDOWN IS31FL3736_PDR_0_OHM
60#endif 44#endif
61 45
62#ifndef IS31FL3736_GLOBALCURRENT 46#ifndef IS31FL3736_GLOBAL_CURRENT
63# define IS31FL3736_GLOBALCURRENT 0xFF 47# define IS31FL3736_GLOBAL_CURRENT 0xFF
64#endif 48#endif
65 49
66// Transfer buffer for TWITransmitData() 50// Transfer buffer for TWITransmitData()
@@ -152,20 +136,20 @@ void is31fl3736_init(uint8_t addr) {
152 // then disable software shutdown. 136 // then disable software shutdown.
153 137
154 // Unlock the command register. 138 // Unlock the command register.
155 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); 139 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITE_LOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
156 140
157 // Select PG0 141 // Select PG0
158 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_LEDCONTROL); 142 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_COMMAND_LED_CONTROL);
159 // Turn off all LEDs. 143 // Turn off all LEDs.
160 for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) { 144 for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) {
161 is31fl3736_write_register(addr, i, 0x00); 145 is31fl3736_write_register(addr, i, 0x00);
162 } 146 }
163 147
164 // Unlock the command register. 148 // Unlock the command register.
165 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); 149 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITE_LOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
166 150
167 // Select PG1 151 // Select PG1
168 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_PWM); 152 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_COMMAND_PWM);
169 // Set PWM on all LEDs to 0 153 // Set PWM on all LEDs to 0
170 // No need to setup Breath registers to PWM as that is the default. 154 // No need to setup Breath registers to PWM as that is the default.
171 for (int i = 0; i < IS31FL3736_PWM_REGISTER_COUNT; i++) { 155 for (int i = 0; i < IS31FL3736_PWM_REGISTER_COUNT; i++) {
@@ -173,18 +157,18 @@ void is31fl3736_init(uint8_t addr) {
173 } 157 }
174 158
175 // Unlock the command register. 159 // Unlock the command register.
176 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); 160 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITE_LOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
177 161
178 // Select PG3 162 // Select PG3
179 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_FUNCTION); 163 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_COMMAND_FUNCTION);
180 // Set de-ghost pull-up resistors (SWx) 164 // Set de-ghost pull-up resistors (SWx)
181 is31fl3736_write_register(addr, IS31FL3736_REG_SW_PULLUP, IS31FL3736_SW_PULLUP); 165 is31fl3736_write_register(addr, IS31FL3736_FUNCTION_REG_SW_PULLUP, IS31FL3736_SW_PULLUP);
182 // Set de-ghost pull-down resistors (CSx) 166 // Set de-ghost pull-down resistors (CSx)
183 is31fl3736_write_register(addr, IS31FL3736_REG_CS_PULLDOWN, IS31FL3736_CS_PULLDOWN); 167 is31fl3736_write_register(addr, IS31FL3736_FUNCTION_REG_CS_PULLDOWN, IS31FL3736_CS_PULLDOWN);
184 // Set global current to maximum. 168 // Set global current to maximum.
185 is31fl3736_write_register(addr, IS31FL3736_REG_GLOBALCURRENT, IS31FL3736_GLOBALCURRENT); 169 is31fl3736_write_register(addr, IS31FL3736_FUNCTION_REG_GLOBAL_CURRENT, IS31FL3736_GLOBAL_CURRENT);
186 // Disable software shutdown. 170 // Disable software shutdown.
187 is31fl3736_write_register(addr, IS31FL3736_REG_CONFIGURATION, ((IS31FL3736_PWM_FREQUENCY & 0b111) << 3) | 0x01); 171 is31fl3736_write_register(addr, IS31FL3736_FUNCTION_REG_CONFIGURATION, ((IS31FL3736_PWM_FREQUENCY & 0b111) << 3) | 0x01);
188 172
189 // Wait 10ms to ensure the device has woken up. 173 // Wait 10ms to ensure the device has woken up.
190 wait_ms(10); 174 wait_ms(10);
@@ -234,8 +218,8 @@ void is31fl3736_set_led_control_register(uint8_t index, bool value) {
234void is31fl3736_update_pwm_buffers(uint8_t addr, uint8_t index) { 218void is31fl3736_update_pwm_buffers(uint8_t addr, uint8_t index) {
235 if (g_pwm_buffer_update_required[index]) { 219 if (g_pwm_buffer_update_required[index]) {
236 // Firstly we need to unlock the command register and select PG1 220 // Firstly we need to unlock the command register and select PG1
237 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); 221 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITE_LOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
238 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_PWM); 222 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_COMMAND_PWM);
239 223
240 is31fl3736_write_pwm_buffer(addr, g_pwm_buffer[index]); 224 is31fl3736_write_pwm_buffer(addr, g_pwm_buffer[index]);
241 g_pwm_buffer_update_required[index] = false; 225 g_pwm_buffer_update_required[index] = false;
@@ -245,8 +229,8 @@ void is31fl3736_update_pwm_buffers(uint8_t addr, uint8_t index) {
245void is31fl3736_update_led_control_registers(uint8_t addr, uint8_t index) { 229void is31fl3736_update_led_control_registers(uint8_t addr, uint8_t index) {
246 if (g_led_control_registers_update_required[index]) { 230 if (g_led_control_registers_update_required[index]) {
247 // Firstly we need to unlock the command register and select PG0 231 // Firstly we need to unlock the command register and select PG0
248 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); 232 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITE_LOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
249 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_LEDCONTROL); 233 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_COMMAND_LED_CONTROL);
250 for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) { 234 for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) {
251 is31fl3736_write_register(addr, i, g_led_control_registers[index][i]); 235 is31fl3736_write_register(addr, i, g_led_control_registers[index][i]);
252 } 236 }
diff --git a/drivers/led/issi/is31fl3736-simple.h b/drivers/led/issi/is31fl3736-simple.h
index 9ff9c650aa..a73a872545 100644
--- a/drivers/led/issi/is31fl3736-simple.h
+++ b/drivers/led/issi/is31fl3736-simple.h
@@ -36,7 +36,7 @@
36# define IS31FL3736_CS_PULLDOWN ISSI_CSPULLUP 36# define IS31FL3736_CS_PULLDOWN ISSI_CSPULLUP
37#endif 37#endif
38#ifdef ISSI_GLOBALCURRENT 38#ifdef ISSI_GLOBALCURRENT
39# define IS31FL3736_GLOBALCURRENT ISSI_GLOBALCURRENT 39# define IS31FL3736_GLOBAL_CURRENT ISSI_GLOBALCURRENT
40#endif 40#endif
41 41
42#define is31_led is31fl3736_led_t 42#define is31_led is31fl3736_led_t
@@ -52,6 +52,25 @@
52#define PUR_32KR IS31FL3736_PUR_32K_OHM 52#define PUR_32KR IS31FL3736_PUR_32K_OHM
53// ======== 53// ========
54 54
55#define IS31FL3736_REG_INTERRUPT_MASK 0xF0
56#define IS31FL3736_REG_INTERRUPT_STATUS 0xF1
57
58#define IS31FL3736_REG_COMMAND 0xFD
59
60#define IS31FL3736_COMMAND_LED_CONTROL 0x00
61#define IS31FL3736_COMMAND_PWM 0x01
62#define IS31FL3736_COMMAND_AUTO_BREATH 0x02
63#define IS31FL3736_COMMAND_FUNCTION 0x03
64
65#define IS31FL3736_FUNCTION_REG_CONFIGURATION 0x00
66#define IS31FL3736_FUNCTION_REG_GLOBAL_CURRENT 0x01
67#define IS31FL3736_FUNCTION_REG_SW_PULLUP 0x0F
68#define IS31FL3736_FUNCTION_REG_CS_PULLDOWN 0x10
69#define IS31FL3736_FUNCTION_REG_RESET 0x11
70
71#define IS31FL3736_REG_COMMAND_WRITE_LOCK 0xFE
72#define IS31FL3736_COMMAND_WRITE_LOCK_MAGIC 0xC5
73
55#define IS31FL3736_I2C_ADDRESS_GND_GND 0x50 74#define IS31FL3736_I2C_ADDRESS_GND_GND 0x50
56#define IS31FL3736_I2C_ADDRESS_GND_SCL 0x51 75#define IS31FL3736_I2C_ADDRESS_GND_SCL 0x51
57#define IS31FL3736_I2C_ADDRESS_GND_SDA 0x52 76#define IS31FL3736_I2C_ADDRESS_GND_SDA 0x52
diff --git a/drivers/led/issi/is31fl3736.c b/drivers/led/issi/is31fl3736.c
index 0e3205f19b..30ab796f3e 100644
--- a/drivers/led/issi/is31fl3736.c
+++ b/drivers/led/issi/is31fl3736.c
@@ -20,22 +20,6 @@
20#include "i2c_master.h" 20#include "i2c_master.h"
21#include "wait.h" 21#include "wait.h"
22 22
23#define IS31FL3736_COMMANDREGISTER 0xFD
24#define IS31FL3736_COMMANDREGISTER_WRITELOCK 0xFE
25#define IS31FL3736_INTERRUPTMASKREGISTER 0xF0
26#define IS31FL3736_INTERRUPTSTATUSREGISTER 0xF1
27
28#define IS31FL3736_PAGE_LEDCONTROL 0x00 // PG0
29#define IS31FL3736_PAGE_PWM 0x01 // PG1
30#define IS31FL3736_PAGE_AUTOBREATH 0x02 // PG2
31#define IS31FL3736_PAGE_FUNCTION 0x03 // PG3
32
33#define IS31FL3736_REG_CONFIGURATION 0x00 // PG3
34#define IS31FL3736_REG_GLOBALCURRENT 0x01 // PG3
35#define IS31FL3736_REG_RESET 0x11 // PG3
36#define IS31FL3736_REG_SW_PULLUP 0x0F // PG3
37#define IS31FL3736_REG_CS_PULLDOWN 0x10 // PG3
38
39#define IS31FL3736_PWM_REGISTER_COUNT 192 // actually 96 23#define IS31FL3736_PWM_REGISTER_COUNT 192 // actually 96
40#define IS31FL3736_LED_CONTROL_REGISTER_COUNT 24 24#define IS31FL3736_LED_CONTROL_REGISTER_COUNT 24
41 25
@@ -59,8 +43,8 @@
59# define IS31FL3736_CS_PULLDOWN IS31FL3736_PDR_0_OHM 43# define IS31FL3736_CS_PULLDOWN IS31FL3736_PDR_0_OHM
60#endif 44#endif
61 45
62#ifndef IS31FL3736_GLOBALCURRENT 46#ifndef IS31FL3736_GLOBAL_CURRENT
63# define IS31FL3736_GLOBALCURRENT 0xFF 47# define IS31FL3736_GLOBAL_CURRENT 0xFF
64#endif 48#endif
65 49
66// Transfer buffer for TWITransmitData() 50// Transfer buffer for TWITransmitData()
@@ -152,20 +136,20 @@ void is31fl3736_init(uint8_t addr) {
152 // then disable software shutdown. 136 // then disable software shutdown.
153 137
154 // Unlock the command register. 138 // Unlock the command register.
155 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); 139 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITE_LOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
156 140
157 // Select PG0 141 // Select PG0
158 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_LEDCONTROL); 142 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_REG_LED_CONTROL);
159 // Turn off all LEDs. 143 // Turn off all LEDs.
160 for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) { 144 for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) {
161 is31fl3736_write_register(addr, i, 0x00); 145 is31fl3736_write_register(addr, i, 0x00);
162 } 146 }
163 147
164 // Unlock the command register. 148 // Unlock the command register.
165 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); 149 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITELOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
166 150
167 // Select PG1 151 // Select PG1
168 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_PWM); 152 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_COMMAND_PWM);
169 // Set PWM on all LEDs to 0 153 // Set PWM on all LEDs to 0
170 // No need to setup Breath registers to PWM as that is the default. 154 // No need to setup Breath registers to PWM as that is the default.
171 for (int i = 0; i < IS31FL3736_PWM_REGISTER_COUNT; i++) { 155 for (int i = 0; i < IS31FL3736_PWM_REGISTER_COUNT; i++) {
@@ -173,18 +157,18 @@ void is31fl3736_init(uint8_t addr) {
173 } 157 }
174 158
175 // Unlock the command register. 159 // Unlock the command register.
176 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); 160 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITE_LOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
177 161
178 // Select PG3 162 // Select PG3
179 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_FUNCTION); 163 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_COMMAND_FUNCTION);
180 // Set de-ghost pull-up resistors (SWx) 164 // Set de-ghost pull-up resistors (SWx)
181 is31fl3736_write_register(addr, IS31FL3736_REG_SW_PULLUP, IS31FL3736_SW_PULLUP); 165 is31fl3736_write_register(addr, IS31FL3736_FUNCTION_REG_SW_PULLUP, IS31FL3736_SW_PULLUP);
182 // Set de-ghost pull-down resistors (CSx) 166 // Set de-ghost pull-down resistors (CSx)
183 is31fl3736_write_register(addr, IS31FL3736_REG_CS_PULLDOWN, IS31FL3736_CS_PULLDOWN); 167 is31fl3736_write_register(addr, IS31FL3736_FUNCTION_REG_CS_PULLDOWN, IS31FL3736_CS_PULLDOWN);
184 // Set global current to maximum. 168 // Set global current to maximum.
185 is31fl3736_write_register(addr, IS31FL3736_REG_GLOBALCURRENT, IS31FL3736_GLOBALCURRENT); 169 is31fl3736_write_register(addr, IS31FL3736_FUNCTION_REG_GLOBAL_CURRENT, IS31FL3736_GLOBAL_CURRENT);
186 // Disable software shutdown. 170 // Disable software shutdown.
187 is31fl3736_write_register(addr, IS31FL3736_REG_CONFIGURATION, ((IS31FL3736_PWM_FREQUENCY & 0b111) << 3) | 0x01); 171 is31fl3736_write_register(addr, IS31FL3736_FUNCTION_REG_CONFIGURATION, ((IS31FL3736_PWM_FREQUENCY & 0b111) << 3) | 0x01);
188 172
189 // Wait 10ms to ensure the device has woken up. 173 // Wait 10ms to ensure the device has woken up.
190 wait_ms(10); 174 wait_ms(10);
@@ -251,8 +235,8 @@ void is31fl3736_set_led_control_register(uint8_t index, bool red, bool green, bo
251void is31fl3736_update_pwm_buffers(uint8_t addr, uint8_t index) { 235void is31fl3736_update_pwm_buffers(uint8_t addr, uint8_t index) {
252 if (g_pwm_buffer_update_required[index]) { 236 if (g_pwm_buffer_update_required[index]) {
253 // Firstly we need to unlock the command register and select PG1 237 // Firstly we need to unlock the command register and select PG1
254 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); 238 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITE_LOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
255 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_PWM); 239 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_COMMAND_PWM);
256 240
257 is31fl3736_write_pwm_buffer(addr, g_pwm_buffer[index]); 241 is31fl3736_write_pwm_buffer(addr, g_pwm_buffer[index]);
258 g_pwm_buffer_update_required[index] = false; 242 g_pwm_buffer_update_required[index] = false;
@@ -262,8 +246,8 @@ void is31fl3736_update_pwm_buffers(uint8_t addr, uint8_t index) {
262void is31fl3736_update_led_control_registers(uint8_t addr, uint8_t index) { 246void is31fl3736_update_led_control_registers(uint8_t addr, uint8_t index) {
263 if (g_led_control_registers_update_required[index]) { 247 if (g_led_control_registers_update_required[index]) {
264 // Firstly we need to unlock the command register and select PG0 248 // Firstly we need to unlock the command register and select PG0
265 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); 249 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITE_LOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
266 is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_LEDCONTROL); 250 is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_COMMAND_LED_CONTROL);
267 for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) { 251 for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) {
268 is31fl3736_write_register(addr, i, g_led_control_registers[index][i]); 252 is31fl3736_write_register(addr, i, g_led_control_registers[index][i]);
269 } 253 }
diff --git a/drivers/led/issi/is31fl3736.h b/drivers/led/issi/is31fl3736.h
index c3fa158de7..a5710d7ed4 100644
--- a/drivers/led/issi/is31fl3736.h
+++ b/drivers/led/issi/is31fl3736.h
@@ -48,7 +48,7 @@
48# define IS31FL3736_CS_PULLDOWN ISSI_CSPULLUP 48# define IS31FL3736_CS_PULLDOWN ISSI_CSPULLUP
49#endif 49#endif
50#ifdef ISSI_GLOBALCURRENT 50#ifdef ISSI_GLOBALCURRENT
51# define IS31FL3736_GLOBALCURRENT ISSI_GLOBALCURRENT 51# define IS31FL3736_GLOBAL_CURRENT ISSI_GLOBALCURRENT
52#endif 52#endif
53 53
54#define is31_led is31fl3736_led_t 54#define is31_led is31fl3736_led_t
@@ -64,6 +64,25 @@
64#define PUR_32KR IS31FL3736_PUR_32K_OHM 64#define PUR_32KR IS31FL3736_PUR_32K_OHM
65// ======== 65// ========
66 66
67#define IS31FL3736_REG_INTERRUPT_MASK 0xF0
68#define IS31FL3736_REG_INTERRUPT_STATUS 0xF1
69
70#define IS31FL3736_REG_COMMAND 0xFD
71
72#define IS31FL3736_COMMAND_LED_CONTROL 0x00
73#define IS31FL3736_COMMAND_PWM 0x01
74#define IS31FL3736_COMMAND_AUTO_BREATH 0x02
75#define IS31FL3736_COMMAND_FUNCTION 0x03
76
77#define IS31FL3736_FUNCTION_REG_CONFIGURATION 0x00
78#define IS31FL3736_FUNCTION_REG_GLOBAL_CURRENT 0x01
79#define IS31FL3736_FUNCTION_REG_SW_PULLUP 0x0F
80#define IS31FL3736_FUNCTION_REG_CS_PULLDOWN 0x10
81#define IS31FL3736_FUNCTION_REG_RESET 0x11
82
83#define IS31FL3736_REG_COMMAND_WRITE_LOCK 0xFE
84#define IS31FL3736_COMMAND_WRITE_LOCK_MAGIC 0xC5
85
67#define IS31FL3736_I2C_ADDRESS_GND_GND 0x50 86#define IS31FL3736_I2C_ADDRESS_GND_GND 0x50
68#define IS31FL3736_I2C_ADDRESS_GND_SCL 0x51 87#define IS31FL3736_I2C_ADDRESS_GND_SCL 0x51
69#define IS31FL3736_I2C_ADDRESS_GND_SDA 0x52 88#define IS31FL3736_I2C_ADDRESS_GND_SDA 0x52
diff --git a/drivers/led/issi/is31fl3737-simple.c b/drivers/led/issi/is31fl3737-simple.c
index 904b7c65bd..7f641f4ca5 100644
--- a/drivers/led/issi/is31fl3737-simple.c
+++ b/drivers/led/issi/is31fl3737-simple.c
@@ -22,22 +22,6 @@
22#include "i2c_master.h" 22#include "i2c_master.h"
23#include "wait.h" 23#include "wait.h"
24 24
25#define IS31FL3737_COMMANDREGISTER 0xFD
26#define IS31FL3737_COMMANDREGISTER_WRITELOCK 0xFE
27#define IS31FL3737_INTERRUPTMASKREGISTER 0xF0
28#define IS31FL3737_INTERRUPTSTATUSREGISTER 0xF1
29
30#define IS31FL3737_PAGE_LEDCONTROL 0x00 // PG0
31#define IS31FL3737_PAGE_PWM 0x01 // PG1
32#define IS31FL3737_PAGE_AUTOBREATH 0x02 // PG2
33#define IS31FL3737_PAGE_FUNCTION 0x03 // PG3
34
35#define IS31FL3737_REG_CONFIGURATION 0x00 // PG3
36#define IS31FL3737_REG_GLOBALCURRENT 0x01 // PG3
37#define IS31FL3737_REG_RESET 0x11 // PG3
38#define IS31FL3737_REG_SW_PULLUP 0x0F // PG3
39#define IS31FL3737_REG_CS_PULLDOWN 0x10 // PG3
40
41#define IS31FL3737_PWM_REGISTER_COUNT 192 // actually 144 25#define IS31FL3737_PWM_REGISTER_COUNT 192 // actually 144
42#define IS31FL3737_LED_CONTROL_REGISTER_COUNT 24 26#define IS31FL3737_LED_CONTROL_REGISTER_COUNT 24
43 27
@@ -61,8 +45,8 @@
61# define IS31FL3737_CS_PULLDOWN IS31FL3737_PDR_0_OHM 45# define IS31FL3737_CS_PULLDOWN IS31FL3737_PDR_0_OHM
62#endif 46#endif
63 47
64#ifndef IS31FL3737_GLOBALCURRENT 48#ifndef IS31FL3737_GLOBAL_CURRENT
65# define IS31FL3737_GLOBALCURRENT 0xFF 49# define IS31FL3737_GLOBAL_CURRENT 0xFF
66#endif 50#endif
67 51
68// Transfer buffer for TWITransmitData() 52// Transfer buffer for TWITransmitData()
@@ -155,20 +139,20 @@ void is31fl3737_init(uint8_t addr) {
155 // then disable software shutdown. 139 // then disable software shutdown.
156 140
157 // Unlock the command register. 141 // Unlock the command register.
158 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); 142 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
159 143
160 // Select PG0 144 // Select PG0
161 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_LEDCONTROL); 145 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_LED_CONTROL);
162 // Turn off all LEDs. 146 // Turn off all LEDs.
163 for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) { 147 for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) {
164 is31fl3737_write_register(addr, i, 0x00); 148 is31fl3737_write_register(addr, i, 0x00);
165 } 149 }
166 150
167 // Unlock the command register. 151 // Unlock the command register.
168 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); 152 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
169 153
170 // Select PG1 154 // Select PG1
171 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_PWM); 155 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_PWM);
172 // Set PWM on all LEDs to 0 156 // Set PWM on all LEDs to 0
173 // No need to setup Breath registers to PWM as that is the default. 157 // No need to setup Breath registers to PWM as that is the default.
174 for (int i = 0; i < IS31FL3737_PWM_REGISTER_COUNT; i++) { 158 for (int i = 0; i < IS31FL3737_PWM_REGISTER_COUNT; i++) {
@@ -176,18 +160,18 @@ void is31fl3737_init(uint8_t addr) {
176 } 160 }
177 161
178 // Unlock the command register. 162 // Unlock the command register.
179 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); 163 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
180 164
181 // Select PG3 165 // Select PG3
182 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_FUNCTION); 166 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_FUNCTION);
183 // Set de-ghost pull-up resistors (SWx) 167 // Set de-ghost pull-up resistors (SWx)
184 is31fl3737_write_register(addr, IS31FL3737_REG_SW_PULLUP, IS31FL3737_SW_PULLUP); 168 is31fl3737_write_register(addr, IS31FL3737_FUNCTION_REG_SW_PULLUP, IS31FL3737_SW_PULLUP);
185 // Set de-ghost pull-down resistors (CSx) 169 // Set de-ghost pull-down resistors (CSx)
186 is31fl3737_write_register(addr, IS31FL3737_REG_CS_PULLDOWN, IS31FL3737_CS_PULLDOWN); 170 is31fl3737_write_register(addr, IS31FL3737_FUNCTION_REG_CS_PULLDOWN, IS31FL3737_CS_PULLDOWN);
187 // Set global current to maximum. 171 // Set global current to maximum.
188 is31fl3737_write_register(addr, IS31FL3737_REG_GLOBALCURRENT, IS31FL3737_GLOBALCURRENT); 172 is31fl3737_write_register(addr, IS31FL3737_FUNCTION_REG_GLOBAL_CURRENT, IS31FL3737_GLOBAL_CURRENT);
189 // Disable software shutdown. 173 // Disable software shutdown.
190 is31fl3737_write_register(addr, IS31FL3737_REG_CONFIGURATION, ((IS31FL3737_PWM_FREQUENCY & 0b111) << 3) | 0x01); 174 is31fl3737_write_register(addr, IS31FL3737_FUNCTION_REG_CONFIGURATION, ((IS31FL3737_PWM_FREQUENCY & 0b111) << 3) | 0x01);
191 175
192 // Wait 10ms to ensure the device has woken up. 176 // Wait 10ms to ensure the device has woken up.
193 wait_ms(10); 177 wait_ms(10);
@@ -231,8 +215,8 @@ void is31fl3737_set_led_control_register(uint8_t index, bool value) {
231void is31fl3737_update_pwm_buffers(uint8_t addr, uint8_t index) { 215void is31fl3737_update_pwm_buffers(uint8_t addr, uint8_t index) {
232 if (g_pwm_buffer_update_required[index]) { 216 if (g_pwm_buffer_update_required[index]) {
233 // Firstly we need to unlock the command register and select PG1 217 // Firstly we need to unlock the command register and select PG1
234 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); 218 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
235 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_PWM); 219 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_PWM);
236 220
237 is31fl3737_write_pwm_buffer(addr, g_pwm_buffer[index]); 221 is31fl3737_write_pwm_buffer(addr, g_pwm_buffer[index]);
238 g_pwm_buffer_update_required[index] = false; 222 g_pwm_buffer_update_required[index] = false;
@@ -242,8 +226,8 @@ void is31fl3737_update_pwm_buffers(uint8_t addr, uint8_t index) {
242void is31fl3737_update_led_control_registers(uint8_t addr, uint8_t index) { 226void is31fl3737_update_led_control_registers(uint8_t addr, uint8_t index) {
243 if (g_led_control_registers_update_required[index]) { 227 if (g_led_control_registers_update_required[index]) {
244 // Firstly we need to unlock the command register and select PG0 228 // Firstly we need to unlock the command register and select PG0
245 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); 229 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
246 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_LEDCONTROL); 230 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_LED_CONTROL);
247 for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) { 231 for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) {
248 is31fl3737_write_register(addr, i, g_led_control_registers[index][i]); 232 is31fl3737_write_register(addr, i, g_led_control_registers[index][i]);
249 } 233 }
diff --git a/drivers/led/issi/is31fl3737-simple.h b/drivers/led/issi/is31fl3737-simple.h
index 36125518c6..2658702b1b 100644
--- a/drivers/led/issi/is31fl3737-simple.h
+++ b/drivers/led/issi/is31fl3737-simple.h
@@ -41,7 +41,7 @@
41# define IS31FL3737_CS_PULLDOWN ISSI_CSPULLUP 41# define IS31FL3737_CS_PULLDOWN ISSI_CSPULLUP
42#endif 42#endif
43#ifdef ISSI_GLOBALCURRENT 43#ifdef ISSI_GLOBALCURRENT
44# define IS31FL3737_GLOBALCURRENT ISSI_GLOBALCURRENT 44# define IS31FL3737_GLOBAL_CURRENT ISSI_GLOBALCURRENT
45#endif 45#endif
46 46
47#define PUR_0R IS31FL3737_PUR_0_OHM 47#define PUR_0R IS31FL3737_PUR_0_OHM
@@ -54,6 +54,25 @@
54#define PUR_32KR IS31FL3737_PUR_32K_OHM 54#define PUR_32KR IS31FL3737_PUR_32K_OHM
55// ======== 55// ========
56 56
57#define IS31FL3737_REG_INTERRUPT_MASK 0xF0
58#define IS31FL3737_REG_INTERRUPT_STATUS 0xF1
59
60#define IS31FL3737_REG_COMMAND 0xFD
61
62#define IS31FL3737_COMMAND_LED_CONTROL 0x00
63#define IS31FL3737_COMMAND_PWM 0x01
64#define IS31FL3737_COMMAND_AUTO_BREATH 0x02
65#define IS31FL3737_COMMAND_FUNCTION 0x03
66
67#define IS31FL3737_FUNCTION_REG_CONFIGURATION 0x00
68#define IS31FL3737_FUNCTION_REG_GLOBAL_CURRENT 0x01
69#define IS31FL3737_FUNCTION_REG_SW_PULLUP 0x0F
70#define IS31FL3737_FUNCTION_REG_CS_PULLDOWN 0x10
71#define IS31FL3737_FUNCTION_REG_RESET 0x11
72
73#define IS31FL3737_REG_COMMAND_WRITE_LOCK 0xFE
74#define IS31FL3737_COMMAND_WRITE_LOCK_MAGIC 0xC5
75
57#define IS31FL3737_I2C_ADDRESS_GND 0x50 76#define IS31FL3737_I2C_ADDRESS_GND 0x50
58#define IS31FL3737_I2C_ADDRESS_SCL 0x55 77#define IS31FL3737_I2C_ADDRESS_SCL 0x55
59#define IS31FL3737_I2C_ADDRESS_SDA 0x5A 78#define IS31FL3737_I2C_ADDRESS_SDA 0x5A
diff --git a/drivers/led/issi/is31fl3737.c b/drivers/led/issi/is31fl3737.c
index 27860558a5..a458431952 100644
--- a/drivers/led/issi/is31fl3737.c
+++ b/drivers/led/issi/is31fl3737.c
@@ -22,22 +22,6 @@
22#include "i2c_master.h" 22#include "i2c_master.h"
23#include "wait.h" 23#include "wait.h"
24 24
25#define IS31FL3737_COMMANDREGISTER 0xFD
26#define IS31FL3737_COMMANDREGISTER_WRITELOCK 0xFE
27#define IS31FL3737_INTERRUPTMASKREGISTER 0xF0
28#define IS31FL3737_INTERRUPTSTATUSREGISTER 0xF1
29
30#define IS31FL3737_PAGE_LEDCONTROL 0x00 // PG0
31#define IS31FL3737_PAGE_PWM 0x01 // PG1
32#define IS31FL3737_PAGE_AUTOBREATH 0x02 // PG2
33#define IS31FL3737_PAGE_FUNCTION 0x03 // PG3
34
35#define IS31FL3737_REG_CONFIGURATION 0x00 // PG3
36#define IS31FL3737_REG_GLOBALCURRENT 0x01 // PG3
37#define IS31FL3737_REG_RESET 0x11 // PG3
38#define IS31FL3737_REG_SW_PULLUP 0x0F // PG3
39#define IS31FL3737_REG_CS_PULLDOWN 0x10 // PG3
40
41#define IS31FL3737_PWM_REGISTER_COUNT 192 // actually 144 25#define IS31FL3737_PWM_REGISTER_COUNT 192 // actually 144
42#define IS31FL3737_LED_CONTROL_REGISTER_COUNT 24 26#define IS31FL3737_LED_CONTROL_REGISTER_COUNT 24
43 27
@@ -61,8 +45,8 @@
61# define IS31FL3737_CS_PULLDOWN IS31FL3737_PDR_0_OHM 45# define IS31FL3737_CS_PULLDOWN IS31FL3737_PDR_0_OHM
62#endif 46#endif
63 47
64#ifndef IS31FL3737_GLOBALCURRENT 48#ifndef IS31FL3737_GLOBAL_CURRENT
65# define IS31FL3737_GLOBALCURRENT 0xFF 49# define IS31FL3737_GLOBAL_CURRENT 0xFF
66#endif 50#endif
67 51
68// Transfer buffer for TWITransmitData() 52// Transfer buffer for TWITransmitData()
@@ -155,20 +139,20 @@ void is31fl3737_init(uint8_t addr) {
155 // then disable software shutdown. 139 // then disable software shutdown.
156 140
157 // Unlock the command register. 141 // Unlock the command register.
158 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); 142 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
159 143
160 // Select PG0 144 // Select PG0
161 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_LEDCONTROL); 145 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_LED_CONTROL);
162 // Turn off all LEDs. 146 // Turn off all LEDs.
163 for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) { 147 for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) {
164 is31fl3737_write_register(addr, i, 0x00); 148 is31fl3737_write_register(addr, i, 0x00);
165 } 149 }
166 150
167 // Unlock the command register. 151 // Unlock the command register.
168 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); 152 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
169 153
170 // Select PG1 154 // Select PG1
171 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_PWM); 155 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_PWM);
172 // Set PWM on all LEDs to 0 156 // Set PWM on all LEDs to 0
173 // No need to setup Breath registers to PWM as that is the default. 157 // No need to setup Breath registers to PWM as that is the default.
174 for (int i = 0; i < IS31FL3737_PWM_REGISTER_COUNT; i++) { 158 for (int i = 0; i < IS31FL3737_PWM_REGISTER_COUNT; i++) {
@@ -176,18 +160,18 @@ void is31fl3737_init(uint8_t addr) {
176 } 160 }
177 161
178 // Unlock the command register. 162 // Unlock the command register.
179 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); 163 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
180 164
181 // Select PG3 165 // Select PG3
182 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_FUNCTION); 166 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_FUNCTION);
183 // Set de-ghost pull-up resistors (SWx) 167 // Set de-ghost pull-up resistors (SWx)
184 is31fl3737_write_register(addr, IS31FL3737_REG_SW_PULLUP, IS31FL3737_SW_PULLUP); 168 is31fl3737_write_register(addr, IS31FL3737_FUNCTION_REG_SW_PULLUP, IS31FL3737_SW_PULLUP);
185 // Set de-ghost pull-down resistors (CSx) 169 // Set de-ghost pull-down resistors (CSx)
186 is31fl3737_write_register(addr, IS31FL3737_REG_CS_PULLDOWN, IS31FL3737_CS_PULLDOWN); 170 is31fl3737_write_register(addr, IS31FL3737_FUNCTION_REG_CS_PULLDOWN, IS31FL3737_CS_PULLDOWN);
187 // Set global current to maximum. 171 // Set global current to maximum.
188 is31fl3737_write_register(addr, IS31FL3737_REG_GLOBALCURRENT, IS31FL3737_GLOBALCURRENT); 172 is31fl3737_write_register(addr, IS31FL3737_FUNCTION_REG_GLOBAL_CURRENT, IS31FL3737_GLOBAL_CURRENT);
189 // Disable software shutdown. 173 // Disable software shutdown.
190 is31fl3737_write_register(addr, IS31FL3737_REG_CONFIGURATION, ((IS31FL3737_PWM_FREQUENCY & 0b111) << 3) | 0x01); 174 is31fl3737_write_register(addr, IS31FL3737_FUNCTION_REG_CONFIGURATION, ((IS31FL3737_PWM_FREQUENCY & 0b111) << 3) | 0x01);
191 175
192 // Wait 10ms to ensure the device has woken up. 176 // Wait 10ms to ensure the device has woken up.
193 wait_ms(10); 177 wait_ms(10);
@@ -247,8 +231,8 @@ void is31fl3737_set_led_control_register(uint8_t index, bool red, bool green, bo
247void is31fl3737_update_pwm_buffers(uint8_t addr, uint8_t index) { 231void is31fl3737_update_pwm_buffers(uint8_t addr, uint8_t index) {
248 if (g_pwm_buffer_update_required[index]) { 232 if (g_pwm_buffer_update_required[index]) {
249 // Firstly we need to unlock the command register and select PG1 233 // Firstly we need to unlock the command register and select PG1
250 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); 234 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
251 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_PWM); 235 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_PWM);
252 236
253 is31fl3737_write_pwm_buffer(addr, g_pwm_buffer[index]); 237 is31fl3737_write_pwm_buffer(addr, g_pwm_buffer[index]);
254 g_pwm_buffer_update_required[index] = false; 238 g_pwm_buffer_update_required[index] = false;
@@ -258,8 +242,8 @@ void is31fl3737_update_pwm_buffers(uint8_t addr, uint8_t index) {
258void is31fl3737_update_led_control_registers(uint8_t addr, uint8_t index) { 242void is31fl3737_update_led_control_registers(uint8_t addr, uint8_t index) {
259 if (g_led_control_registers_update_required[index]) { 243 if (g_led_control_registers_update_required[index]) {
260 // Firstly we need to unlock the command register and select PG0 244 // Firstly we need to unlock the command register and select PG0
261 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); 245 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
262 is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_LEDCONTROL); 246 is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_LED_CONTROL);
263 for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) { 247 for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) {
264 is31fl3737_write_register(addr, i, g_led_control_registers[index][i]); 248 is31fl3737_write_register(addr, i, g_led_control_registers[index][i]);
265 } 249 }
diff --git a/drivers/led/issi/is31fl3737.h b/drivers/led/issi/is31fl3737.h
index 6a2f301052..8de3bf4ef5 100644
--- a/drivers/led/issi/is31fl3737.h
+++ b/drivers/led/issi/is31fl3737.h
@@ -53,7 +53,7 @@
53# define IS31FL3737_CS_PULLDOWN ISSI_CSPULLUP 53# define IS31FL3737_CS_PULLDOWN ISSI_CSPULLUP
54#endif 54#endif
55#ifdef ISSI_GLOBALCURRENT 55#ifdef ISSI_GLOBALCURRENT
56# define IS31FL3737_GLOBALCURRENT ISSI_GLOBALCURRENT 56# define IS31FL3737_GLOBAL_CURRENT ISSI_GLOBALCURRENT
57#endif 57#endif
58 58
59#define is31_led is31fl3737_led_t 59#define is31_led is31fl3737_led_t
@@ -69,6 +69,25 @@
69#define PUR_32KR IS31FL3737_PUR_32K_OHM 69#define PUR_32KR IS31FL3737_PUR_32K_OHM
70// ======== 70// ========
71 71
72#define IS31FL3737_REG_INTERRUPT_MASK 0xF0
73#define IS31FL3737_REG_INTERRUPT_STATUS 0xF1
74
75#define IS31FL3737_REG_COMMAND 0xFD
76
77#define IS31FL3737_COMMAND_LED_CONTROL 0x00
78#define IS31FL3737_COMMAND_PWM 0x01
79#define IS31FL3737_COMMAND_AUTO_BREATH 0x02
80#define IS31FL3737_COMMAND_FUNCTION 0x03
81
82#define IS31FL3737_FUNCTION_REG_CONFIGURATION 0x00
83#define IS31FL3737_FUNCTION_REG_GLOBAL_CURRENT 0x01
84#define IS31FL3737_FUNCTION_REG_SW_PULLUP 0x0F
85#define IS31FL3737_FUNCTION_REG_CS_PULLDOWN 0x10
86#define IS31FL3737_FUNCTION_REG_RESET 0x11
87
88#define IS31FL3737_REG_COMMAND_WRITE_LOCK 0xFE
89#define IS31FL3737_COMMAND_WRITE_LOCK_MAGIC 0xC5
90
72#define IS31FL3737_I2C_ADDRESS_GND 0x50 91#define IS31FL3737_I2C_ADDRESS_GND 0x50
73#define IS31FL3737_I2C_ADDRESS_SCL 0x55 92#define IS31FL3737_I2C_ADDRESS_SCL 0x55
74#define IS31FL3737_I2C_ADDRESS_SDA 0x5A 93#define IS31FL3737_I2C_ADDRESS_SDA 0x5A
diff --git a/drivers/led/issi/is31fl3741-simple.c b/drivers/led/issi/is31fl3741-simple.c
index 582551c05e..f7009853ba 100644
--- a/drivers/led/issi/is31fl3741-simple.c
+++ b/drivers/led/issi/is31fl3741-simple.c
@@ -22,24 +22,6 @@
22#include "i2c_master.h" 22#include "i2c_master.h"
23#include "wait.h" 23#include "wait.h"
24 24
25#define IS31FL3741_COMMANDREGISTER 0xFD
26#define IS31FL3741_COMMANDREGISTER_WRITELOCK 0xFE
27#define IS31FL3741_INTERRUPTMASKREGISTER 0xF0
28#define IS31FL3741_INTERRUPTSTATUSREGISTER 0xF1
29#define IS31FL3741_IDREGISTER 0xFC
30
31#define IS31FL3741_PAGE_PWM0 0x00 // PG0
32#define IS31FL3741_PAGE_PWM1 0x01 // PG1
33#define IS31FL3741_PAGE_SCALING_0 0x02 // PG2
34#define IS31FL3741_PAGE_SCALING_1 0x03 // PG3
35#define IS31FL3741_PAGE_FUNCTION 0x04 // PG4
36
37#define IS31FL3741_REG_CONFIGURATION 0x00 // PG4
38#define IS31FL3741_REG_GLOBALCURRENT 0x01 // PG4
39#define IS31FL3741_REG_PULLDOWNUP 0x02 // PG4
40#define IS31FL3741_REG_PWM_FREQUENCY 0x36 // PG4
41#define IS31FL3741_REG_RESET 0x3F // PG4
42
43#define IS31FL3741_PWM_REGISTER_COUNT 351 25#define IS31FL3741_PWM_REGISTER_COUNT 351
44 26
45#ifndef IS31FL3741_I2C_TIMEOUT 27#ifndef IS31FL3741_I2C_TIMEOUT
@@ -66,8 +48,8 @@
66# define IS31FL3741_CS_PULLDOWN IS31FL3741_PDR_32K_OHM 48# define IS31FL3741_CS_PULLDOWN IS31FL3741_PDR_32K_OHM
67#endif 49#endif
68 50
69#ifndef IS31FL3741_GLOBALCURRENT 51#ifndef IS31FL3741_GLOBAL_CURRENT
70# define IS31FL3741_GLOBALCURRENT 0xFF 52# define IS31FL3741_GLOBAL_CURRENT 0xFF
71#endif 53#endif
72 54
73// Transfer buffer for TWITransmitData() 55// Transfer buffer for TWITransmitData()
@@ -104,8 +86,8 @@ bool is31fl3741_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
104 for (int i = 0; i < 342; i += 18) { 86 for (int i = 0; i < 342; i += 18) {
105 if (i == 180) { 87 if (i == 180) {
106 // unlock the command register and select PG1 88 // unlock the command register and select PG1
107 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); 89 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
108 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_PWM1); 90 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_PWM_1);
109 } 91 }
110 92
111 g_twi_transfer_buffer[0] = i % 180; 93 g_twi_transfer_buffer[0] = i % 180;
@@ -181,20 +163,20 @@ void is31fl3741_init(uint8_t addr) {
181 // Unlock the command register. 163 // Unlock the command register.
182 164
183 // Unlock the command register. 165 // Unlock the command register.
184 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); 166 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
185 167
186 // Select PG4 168 // Select PG4
187 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_FUNCTION); 169 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_FUNCTION);
188 170
189 // Set to Normal operation 171 // Set to Normal operation
190 is31fl3741_write_register(addr, IS31FL3741_REG_CONFIGURATION, IS31FL3741_CONFIGURATION); 172 is31fl3741_write_register(addr, IS31FL3741_FUNCTION_REG_CONFIGURATION, IS31FL3741_CONFIGURATION);
191 173
192 // Set Golbal Current Control Register 174 // Set Golbal Current Control Register
193 is31fl3741_write_register(addr, IS31FL3741_REG_GLOBALCURRENT, IS31FL3741_GLOBALCURRENT); 175 is31fl3741_write_register(addr, IS31FL3741_FUNCTION_REG_GLOBAL_CURRENT, IS31FL3741_GLOBAL_CURRENT);
194 // Set Pull up & Down for SWx CSy 176 // Set Pull up & Down for SWx CSy
195 is31fl3741_write_register(addr, IS31FL3741_REG_PULLDOWNUP, ((IS31FL3741_CS_PULLDOWN << 4) | IS31FL3741_SW_PULLUP)); 177 is31fl3741_write_register(addr, IS31FL3741_FUNCTION_REG_PULLDOWNUP, ((IS31FL3741_CS_PULLDOWN << 4) | IS31FL3741_SW_PULLUP));
196 // Set PWM frequency 178 // Set PWM frequency
197 is31fl3741_write_register(addr, IS31FL3741_REG_PWM_FREQUENCY, (IS31FL3741_PWM_FREQUENCY & 0b1111)); 179 is31fl3741_write_register(addr, IS31FL3741_FUNCTION_REG_PWM_FREQUENCY, (IS31FL3741_PWM_FREQUENCY & 0b1111));
198 180
199 // is31fl3741_update_led_scaling_registers(addr, 0xFF, 0xFF, 0xFF); 181 // is31fl3741_update_led_scaling_registers(addr, 0xFF, 0xFF, 0xFF);
200 182
@@ -237,8 +219,8 @@ void is31fl3741_set_led_control_register(uint8_t index, bool value) {
237void is31fl3741_update_pwm_buffers(uint8_t addr, uint8_t index) { 219void is31fl3741_update_pwm_buffers(uint8_t addr, uint8_t index) {
238 if (g_pwm_buffer_update_required[index]) { 220 if (g_pwm_buffer_update_required[index]) {
239 // unlock the command register and select PG2 221 // unlock the command register and select PG2
240 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); 222 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
241 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_PWM0); 223 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_PWM_0);
242 224
243 is31fl3741_write_pwm_buffer(addr, g_pwm_buffer[index]); 225 is31fl3741_write_pwm_buffer(addr, g_pwm_buffer[index]);
244 } 226 }
@@ -255,8 +237,8 @@ void is31fl3741_set_pwm_buffer(const is31fl3741_led_t *pled, uint8_t value) {
255void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index) { 237void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index) {
256 if (g_scaling_registers_update_required[index]) { 238 if (g_scaling_registers_update_required[index]) {
257 // unlock the command register and select PG2 239 // unlock the command register and select PG2
258 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); 240 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
259 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_SCALING_0); 241 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_SCALING_0);
260 242
261 // CS1_SW1 to CS30_SW6 are on PG2 243 // CS1_SW1 to CS30_SW6 are on PG2
262 for (int i = CS1_SW1; i <= CS30_SW6; ++i) { 244 for (int i = CS1_SW1; i <= CS30_SW6; ++i) {
@@ -264,8 +246,8 @@ void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index) {
264 } 246 }
265 247
266 // unlock the command register and select PG3 248 // unlock the command register and select PG3
267 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); 249 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
268 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_SCALING_1); 250 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_SCALING_1);
269 251
270 // CS1_SW7 to CS39_SW9 are on PG3 252 // CS1_SW7 to CS39_SW9 are on PG3
271 for (int i = CS1_SW7; i <= CS39_SW9; ++i) { 253 for (int i = CS1_SW7; i <= CS39_SW9; ++i) {
diff --git a/drivers/led/issi/is31fl3741-simple.h b/drivers/led/issi/is31fl3741-simple.h
index 04f0c2793a..34608a37e0 100644
--- a/drivers/led/issi/is31fl3741-simple.h
+++ b/drivers/led/issi/is31fl3741-simple.h
@@ -41,7 +41,7 @@
41# define IS31FL3741_CS_PULLDOWN ISSI_CSPULLUP 41# define IS31FL3741_CS_PULLDOWN ISSI_CSPULLUP
42#endif 42#endif
43#ifdef ISSI_GLOBALCURRENT 43#ifdef ISSI_GLOBALCURRENT
44# define IS31FL3741_GLOBALCURRENT ISSI_GLOBALCURRENT 44# define IS31FL3741_GLOBAL_CURRENT ISSI_GLOBALCURRENT
45#endif 45#endif
46 46
47#define PUR_0R IS31FL3741_PUR_0_OHM 47#define PUR_0R IS31FL3741_PUR_0_OHM
@@ -54,6 +54,27 @@
54#define PUR_32KR IS31FL3741_PUR_32K_OHM 54#define PUR_32KR IS31FL3741_PUR_32K_OHM
55// ======== 55// ========
56 56
57#define IS31FL3741_REG_INTERRUPT_MASK 0xF0
58#define IS31FL3741_REG_INTERRUPT_STATUS 0xF1
59#define IS31FL3741_REG_ID 0xFC
60
61#define IS31FL3741_REG_COMMAND 0xFD
62
63#define IS31FL3741_COMMAND_PWM_0 0x00
64#define IS31FL3741_COMMAND_PWM_1 0x01
65#define IS31FL3741_COMMAND_SCALING_0 0x02
66#define IS31FL3741_COMMAND_SCALING_1 0x03
67#define IS31FL3741_COMMAND_FUNCTION 0x04
68
69#define IS31FL3741_FUNCTION_REG_CONFIGURATION 0x00
70#define IS31FL3741_FUNCTION_REG_GLOBAL_CURRENT 0x01
71#define IS31FL3741_FUNCTION_REG_PULLDOWNUP 0x02
72#define IS31FL3741_FUNCTION_REG_PWM_FREQUENCY 0x36
73#define IS31FL3741_FUNCTION_REG_RESET 0x3F
74
75#define IS31FL3741_REG_COMMAND_WRITE_LOCK 0xFE
76#define IS31FL3741_COMMAND_WRITE_LOCK_MAGIC 0xC5
77
57#define IS31FL3741_I2C_ADDRESS_GND 0x30 78#define IS31FL3741_I2C_ADDRESS_GND 0x30
58#define IS31FL3741_I2C_ADDRESS_SCL 0x31 79#define IS31FL3741_I2C_ADDRESS_SCL 0x31
59#define IS31FL3741_I2C_ADDRESS_SDA 0x32 80#define IS31FL3741_I2C_ADDRESS_SDA 0x32
diff --git a/drivers/led/issi/is31fl3741.c b/drivers/led/issi/is31fl3741.c
index 9925a169c3..efcfa77b46 100644
--- a/drivers/led/issi/is31fl3741.c
+++ b/drivers/led/issi/is31fl3741.c
@@ -22,24 +22,6 @@
22#include "i2c_master.h" 22#include "i2c_master.h"
23#include "wait.h" 23#include "wait.h"
24 24
25#define IS31FL3741_COMMANDREGISTER 0xFD
26#define IS31FL3741_COMMANDREGISTER_WRITELOCK 0xFE
27#define IS31FL3741_INTERRUPTMASKREGISTER 0xF0
28#define IS31FL3741_INTERRUPTSTATUSREGISTER 0xF1
29#define IS31FL3741_IDREGISTER 0xFC
30
31#define IS31FL3741_PAGE_PWM0 0x00 // PG0
32#define IS31FL3741_PAGE_PWM1 0x01 // PG1
33#define IS31FL3741_PAGE_SCALING_0 0x02 // PG2
34#define IS31FL3741_PAGE_SCALING_1 0x03 // PG3
35#define IS31FL3741_PAGE_FUNCTION 0x04 // PG4
36
37#define IS31FL3741_REG_CONFIGURATION 0x00 // PG4
38#define IS31FL3741_REG_GLOBALCURRENT 0x01 // PG4
39#define IS31FL3741_REG_PULLDOWNUP 0x02 // PG4
40#define IS31FL3741_REG_PWM_FREQUENCY 0x36 // PG4
41#define IS31FL3741_REG_RESET 0x3F // PG4
42
43#define IS31FL3741_PWM_REGISTER_COUNT 351 25#define IS31FL3741_PWM_REGISTER_COUNT 351
44 26
45#ifndef IS31FL3741_I2C_TIMEOUT 27#ifndef IS31FL3741_I2C_TIMEOUT
@@ -66,8 +48,8 @@
66# define IS31FL3741_CS_PULLDOWN IS31FL3741_PDR_32K_OHM 48# define IS31FL3741_CS_PULLDOWN IS31FL3741_PDR_32K_OHM
67#endif 49#endif
68 50
69#ifndef IS31FL3741_GLOBALCURRENT 51#ifndef IS31FL3741_GLOBAL_CURRENT
70# define IS31FL3741_GLOBALCURRENT 0xFF 52# define IS31FL3741_GLOBAL_CURRENT 0xFF
71#endif 53#endif
72 54
73// Transfer buffer for TWITransmitData() 55// Transfer buffer for TWITransmitData()
@@ -104,8 +86,8 @@ bool is31fl3741_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
104 for (int i = 0; i < 342; i += 18) { 86 for (int i = 0; i < 342; i += 18) {
105 if (i == 180) { 87 if (i == 180) {
106 // unlock the command register and select PG1 88 // unlock the command register and select PG1
107 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); 89 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
108 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_PWM1); 90 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_PWM_1);
109 } 91 }
110 92
111 g_twi_transfer_buffer[0] = i % 180; 93 g_twi_transfer_buffer[0] = i % 180;
@@ -181,20 +163,20 @@ void is31fl3741_init(uint8_t addr) {
181 // Unlock the command register. 163 // Unlock the command register.
182 164
183 // Unlock the command register. 165 // Unlock the command register.
184 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); 166 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
185 167
186 // Select PG4 168 // Select PG4
187 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_FUNCTION); 169 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_FUNCTION);
188 170
189 // Set to Normal operation 171 // Set to Normal operation
190 is31fl3741_write_register(addr, IS31FL3741_REG_CONFIGURATION, IS31FL3741_CONFIGURATION); 172 is31fl3741_write_register(addr, IS31FL3741_FUNCTION_REG_CONFIGURATION, IS31FL3741_CONFIGURATION);
191 173
192 // Set Golbal Current Control Register 174 // Set Golbal Current Control Register
193 is31fl3741_write_register(addr, IS31FL3741_REG_GLOBALCURRENT, IS31FL3741_GLOBALCURRENT); 175 is31fl3741_write_register(addr, IS31FL3741_FUNCTION_REG_GLOBAL_CURRENT, IS31FL3741_GLOBAL_CURRENT);
194 // Set Pull up & Down for SWx CSy 176 // Set Pull up & Down for SWx CSy
195 is31fl3741_write_register(addr, IS31FL3741_REG_PULLDOWNUP, ((IS31FL3741_CS_PULLDOWN << 4) | IS31FL3741_SW_PULLUP)); 177 is31fl3741_write_register(addr, IS31FL3741_FUNCTION_REG_PULLDOWNUP, ((IS31FL3741_CS_PULLDOWN << 4) | IS31FL3741_SW_PULLUP));
196 // Set PWM frequency 178 // Set PWM frequency
197 is31fl3741_write_register(addr, IS31FL3741_REG_PWM_FREQUENCY, (IS31FL3741_PWM_FREQUENCY & 0b1111)); 179 is31fl3741_write_register(addr, IS31FL3741_FUNCTION_REG_PWM_FREQUENCY, (IS31FL3741_PWM_FREQUENCY & 0b1111));
198 180
199 // is31fl3741_update_led_scaling_registers(addr, 0xFF, 0xFF, 0xFF); 181 // is31fl3741_update_led_scaling_registers(addr, 0xFF, 0xFF, 0xFF);
200 182
@@ -251,8 +233,8 @@ void is31fl3741_set_led_control_register(uint8_t index, bool red, bool green, bo
251void is31fl3741_update_pwm_buffers(uint8_t addr, uint8_t index) { 233void is31fl3741_update_pwm_buffers(uint8_t addr, uint8_t index) {
252 if (g_pwm_buffer_update_required[index]) { 234 if (g_pwm_buffer_update_required[index]) {
253 // unlock the command register and select PG2 235 // unlock the command register and select PG2
254 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); 236 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
255 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_PWM0); 237 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_PWM_0);
256 238
257 is31fl3741_write_pwm_buffer(addr, g_pwm_buffer[index]); 239 is31fl3741_write_pwm_buffer(addr, g_pwm_buffer[index]);
258 } 240 }
@@ -271,8 +253,8 @@ void is31fl3741_set_pwm_buffer(const is31fl3741_led_t *pled, uint8_t red, uint8_
271void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index) { 253void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index) {
272 if (g_scaling_registers_update_required[index]) { 254 if (g_scaling_registers_update_required[index]) {
273 // unlock the command register and select PG2 255 // unlock the command register and select PG2
274 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); 256 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
275 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_SCALING_0); 257 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_SCALING_0);
276 258
277 // CS1_SW1 to CS30_SW6 are on PG2 259 // CS1_SW1 to CS30_SW6 are on PG2
278 for (int i = CS1_SW1; i <= CS30_SW6; ++i) { 260 for (int i = CS1_SW1; i <= CS30_SW6; ++i) {
@@ -280,8 +262,8 @@ void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index) {
280 } 262 }
281 263
282 // unlock the command register and select PG3 264 // unlock the command register and select PG3
283 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); 265 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
284 is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_SCALING_1); 266 is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_SCALING_1);
285 267
286 // CS1_SW7 to CS39_SW9 are on PG3 268 // CS1_SW7 to CS39_SW9 are on PG3
287 for (int i = CS1_SW7; i <= CS39_SW9; ++i) { 269 for (int i = CS1_SW7; i <= CS39_SW9; ++i) {
diff --git a/drivers/led/issi/is31fl3741.h b/drivers/led/issi/is31fl3741.h
index 0c3f7d3d18..6466696b60 100644
--- a/drivers/led/issi/is31fl3741.h
+++ b/drivers/led/issi/is31fl3741.h
@@ -53,7 +53,7 @@
53# define IS31FL3741_CS_PULLDOWN ISSI_CSPULLUP 53# define IS31FL3741_CS_PULLDOWN ISSI_CSPULLUP
54#endif 54#endif
55#ifdef ISSI_GLOBALCURRENT 55#ifdef ISSI_GLOBALCURRENT
56# define IS31FL3741_GLOBALCURRENT ISSI_GLOBALCURRENT 56# define IS31FL3741_GLOBAL_CURRENT ISSI_GLOBALCURRENT
57#endif 57#endif
58 58
59#define is31_led is31fl3741_led_t 59#define is31_led is31fl3741_led_t
@@ -69,6 +69,27 @@
69#define PUR_32KR IS31FL3741_PUR_32K_OHM 69#define PUR_32KR IS31FL3741_PUR_32K_OHM
70// ======== 70// ========
71 71
72#define IS31FL3741_REG_INTERRUPT_MASK 0xF0
73#define IS31FL3741_REG_INTERRUPT_STATUS 0xF1
74#define IS31FL3741_REG_ID 0xFC
75
76#define IS31FL3741_REG_COMMAND 0xFD
77
78#define IS31FL3741_COMMAND_PWM_0 0x00
79#define IS31FL3741_COMMAND_PWM_1 0x01
80#define IS31FL3741_COMMAND_SCALING_0 0x02
81#define IS31FL3741_COMMAND_SCALING_1 0x03
82#define IS31FL3741_COMMAND_FUNCTION 0x04
83
84#define IS31FL3741_FUNCTION_REG_CONFIGURATION 0x00
85#define IS31FL3741_FUNCTION_REG_GLOBAL_CURRENT 0x01
86#define IS31FL3741_FUNCTION_REG_PULLDOWNUP 0x02
87#define IS31FL3741_FUNCTION_REG_PWM_FREQUENCY 0x36
88#define IS31FL3741_FUNCTION_REG_RESET 0x3F
89
90#define IS31FL3741_REG_COMMAND_WRITE_LOCK 0xFE
91#define IS31FL3741_COMMAND_WRITE_LOCK_MAGIC 0xC5
92
72#define IS31FL3741_I2C_ADDRESS_GND 0x30 93#define IS31FL3741_I2C_ADDRESS_GND 0x30
73#define IS31FL3741_I2C_ADDRESS_SCL 0x31 94#define IS31FL3741_I2C_ADDRESS_SCL 0x31
74#define IS31FL3741_I2C_ADDRESS_SDA 0x32 95#define IS31FL3741_I2C_ADDRESS_SDA 0x32
diff --git a/drivers/led/snled27351-simple.c b/drivers/led/snled27351-simple.c
index 6d504794a9..b2054c96d5 100644
--- a/drivers/led/snled27351-simple.c
+++ b/drivers/led/snled27351-simple.c
@@ -29,7 +29,7 @@
29#endif 29#endif
30 30
31#ifndef SNLED27351_PHASE_CHANNEL 31#ifndef SNLED27351_PHASE_CHANNEL
32# define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_12CHANNEL 32# define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_12_CHANNEL
33#endif 33#endif
34 34
35#ifndef SNLED27351_CURRENT_TUNE 35#ifndef SNLED27351_CURRENT_TUNE
@@ -134,48 +134,48 @@ void snled27351_init_drivers(void) {
134 134
135void snled27351_init(uint8_t addr) { 135void snled27351_init(uint8_t addr) {
136 // Select to function page 136 // Select to function page
137 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE); 137 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_FUNCTION);
138 // Setting LED driver to shutdown mode 138 // Setting LED driver to shutdown mode
139 snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_SHUT_DOWN_MODE); 139 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN, SNLED27351_SOFTWARE_SHUTDOWN_SSD_SHUTDOWN);
140 // Setting internal channel pulldown/pullup 140 // Setting internal channel pulldown/pullup
141 snled27351_write_register(addr, SNLED27351_REG_PDU, SNLED27351_MSKSET_CA_CB_CHANNEL); 141 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_PULLDOWNUP, SNLED27351_PULLDOWNUP_ALL_ENABLED);
142 // Select number of scan phase 142 // Select number of scan phase
143 snled27351_write_register(addr, SNLED27351_REG_SCAN_PHASE, SNLED27351_PHASE_CHANNEL); 143 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SCAN_PHASE, SNLED27351_PHASE_CHANNEL);
144 // Setting PWM Delay Phase 144 // Setting PWM Delay Phase
145 snled27351_write_register(addr, SNLED27351_REG_SLEW_RATE_CONTROL_MODE1, SNLED27351_MSKPWM_DELAY_PHASE_ENABLE); 145 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SLEW_RATE_CONTROL_MODE_1, SNLED27351_SLEW_RATE_CONTROL_MODE_1_PDP_ENABLE);
146 // Setting Driving/Sinking Channel Slew Rate 146 // Setting Driving/Sinking Channel Slew Rate
147 snled27351_write_register(addr, SNLED27351_REG_SLEW_RATE_CONTROL_MODE2, SNLED27351_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_ENABLE); 147 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SLEW_RATE_CONTROL_MODE_2, SNLED27351_SLEW_RATE_CONTROL_MODE_2_DSL_ENABLE | SNLED27351_SLEW_RATE_CONTROL_MODE_2_SSL_ENABLE);
148 // Setting Iref 148 // Setting Iref
149 snled27351_write_register(addr, SNLED27351_REG_SOFTWARE_SLEEP, SNLED27351_MSKSLEEP_DISABLE); 149 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SLEEP, 0);
150 // Set LED CONTROL PAGE (Page 0) 150 // Set LED CONTROL PAGE (Page 0)
151 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_CONTROL_PAGE); 151 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_LED_CONTROL);
152 for (int i = 0; i < SNLED27351_LED_CONTROL_ON_OFF_LENGTH; i++) { 152 for (int i = 0; i < SNLED27351_LED_CONTROL_ON_OFF_LENGTH; i++) {
153 snled27351_write_register(addr, i, 0x00); 153 snled27351_write_register(addr, i, 0x00);
154 } 154 }
155 155
156 // Set PWM PAGE (Page 1) 156 // Set PWM PAGE (Page 1)
157 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_PWM_PAGE); 157 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_PWM);
158 for (int i = 0; i < SNLED27351_LED_CURRENT_TUNE_LENGTH; i++) { 158 for (int i = 0; i < SNLED27351_LED_CURRENT_TUNE_LENGTH; i++) {
159 snled27351_write_register(addr, i, 0x00); 159 snled27351_write_register(addr, i, 0x00);
160 } 160 }
161 161
162 // Set CURRENT PAGE (Page 4) 162 // Set CURRENT PAGE (Page 4)
163 uint8_t current_tune_reg_list[SNLED27351_LED_CURRENT_TUNE_LENGTH] = SNLED27351_CURRENT_TUNE; 163 uint8_t current_tune_reg_list[SNLED27351_LED_CURRENT_TUNE_LENGTH] = SNLED27351_CURRENT_TUNE;
164 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_CURRENT_TUNE_PAGE); 164 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_CURRENT_TUNE);
165 for (int i = 0; i < SNLED27351_LED_CURRENT_TUNE_LENGTH; i++) { 165 for (int i = 0; i < SNLED27351_LED_CURRENT_TUNE_LENGTH; i++) {
166 snled27351_write_register(addr, i, current_tune_reg_list[i]); 166 snled27351_write_register(addr, i, current_tune_reg_list[i]);
167 } 167 }
168 168
169 // Enable LEDs ON/OFF 169 // Enable LEDs ON/OFF
170 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_CONTROL_PAGE); 170 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_LED_CONTROL);
171 for (int i = 0; i < SNLED27351_LED_CONTROL_ON_OFF_LENGTH; i++) { 171 for (int i = 0; i < SNLED27351_LED_CONTROL_ON_OFF_LENGTH; i++) {
172 snled27351_write_register(addr, i, 0xFF); 172 snled27351_write_register(addr, i, 0xFF);
173 } 173 }
174 174
175 // Select to function page 175 // Select to function page
176 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE); 176 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_FUNCTION);
177 // Setting LED driver to normal mode 177 // Setting LED driver to normal mode
178 snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_NORMAL_MODE); 178 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN, SNLED27351_SOFTWARE_SHUTDOWN_SSD_NORMAL);
179} 179}
180 180
181void snled27351_set_value(int index, uint8_t value) { 181void snled27351_set_value(int index, uint8_t value) {
@@ -215,7 +215,7 @@ void snled27351_set_led_control_register(uint8_t index, bool value) {
215 215
216void snled27351_update_pwm_buffers(uint8_t addr, uint8_t index) { 216void snled27351_update_pwm_buffers(uint8_t addr, uint8_t index) {
217 if (g_pwm_buffer_update_required[index]) { 217 if (g_pwm_buffer_update_required[index]) {
218 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_PWM_PAGE); 218 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_PWM);
219 219
220 // If any of the transactions fail we risk writing dirty PG0, 220 // If any of the transactions fail we risk writing dirty PG0,
221 // refresh page 0 just in case. 221 // refresh page 0 just in case.
@@ -228,7 +228,7 @@ void snled27351_update_pwm_buffers(uint8_t addr, uint8_t index) {
228 228
229void snled27351_update_led_control_registers(uint8_t addr, uint8_t index) { 229void snled27351_update_led_control_registers(uint8_t addr, uint8_t index) {
230 if (g_led_control_registers_update_required[index]) { 230 if (g_led_control_registers_update_required[index]) {
231 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_CONTROL_PAGE); 231 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_LED_CONTROL);
232 for (int i = 0; i < SNLED27351_LED_CONTROL_REGISTER_COUNT; i++) { 232 for (int i = 0; i < SNLED27351_LED_CONTROL_REGISTER_COUNT; i++) {
233 snled27351_write_register(addr, i, g_led_control_registers[index][i]); 233 snled27351_write_register(addr, i, g_led_control_registers[index][i]);
234 } 234 }
@@ -251,16 +251,16 @@ void snled27351_flush(void) {
251 251
252void snled27351_sw_return_normal(uint8_t addr) { 252void snled27351_sw_return_normal(uint8_t addr) {
253 // Select to function page 253 // Select to function page
254 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE); 254 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_FUNCTION);
255 // Setting LED driver to normal mode 255 // Setting LED driver to normal mode
256 snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_NORMAL_MODE); 256 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN, SNLED27351_SOFTWARE_SHUTDOWN_SSD_NORMAL);
257} 257}
258 258
259void snled27351_sw_shutdown(uint8_t addr) { 259void snled27351_sw_shutdown(uint8_t addr) {
260 // Select to function page 260 // Select to function page
261 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE); 261 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_FUNCTION);
262 // Setting LED driver to shutdown mode 262 // Setting LED driver to shutdown mode
263 snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_SHUT_DOWN_MODE); 263 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN, SNLED27351_SOFTWARE_SHUTDOWN_SSD_SHUTDOWN);
264 // Write SW Sleep Register 264 // Write SW Sleep Register
265 snled27351_write_register(addr, SNLED27351_REG_SOFTWARE_SLEEP, SNLED27351_MSKSLEEP_ENABLE); 265 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SLEEP, SNLED27351_SOFTWARE_SLEEP_ENABLE);
266} 266}
diff --git a/drivers/led/snled27351-simple.h b/drivers/led/snled27351-simple.h
index 66e5d162d0..2fc62a6f0a 100644
--- a/drivers/led/snled27351-simple.h
+++ b/drivers/led/snled27351-simple.h
@@ -35,23 +35,98 @@
35# define SNLED27351_CURRENT_TUNE CKLED2001_CURRENT_TUNE 35# define SNLED27351_CURRENT_TUNE CKLED2001_CURRENT_TUNE
36#endif 36#endif
37 37
38#define MSKPHASE_12CHANNEL SNLED27351_MSKPHASE_12CHANNEL 38#define MSKPHASE_12CHANNEL SNLED27351_SCAN_PHASE_12_CHANNEL
39#define MSKPHASE_11CHANNEL SNLED27351_MSKPHASE_11CHANNEL 39#define MSKPHASE_11CHANNEL SNLED27351_SCAN_PHASE_11_CHANNEL
40#define MSKPHASE_10CHANNEL SNLED27351_MSKPHASE_10CHANNEL 40#define MSKPHASE_10CHANNEL SNLED27351_SCAN_PHASE_10_CHANNEL
41#define MSKPHASE_9CHANNEL SNLED27351_MSKPHASE_9CHANNEL 41#define MSKPHASE_9CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
42#define MSKPHASE_8CHANNEL SNLED27351_MSKPHASE_8CHANNEL 42#define MSKPHASE_8CHANNEL SNLED27351_SCAN_PHASE_8_CHANNEL
43#define MSKPHASE_7CHANNEL SNLED27351_MSKPHASE_7CHANNEL 43#define MSKPHASE_7CHANNEL SNLED27351_SCAN_PHASE_7_CHANNEL
44#define MSKPHASE_6CHANNEL SNLED27351_MSKPHASE_6CHANNEL 44#define MSKPHASE_6CHANNEL SNLED27351_SCAN_PHASE_6_CHANNEL
45#define MSKPHASE_5CHANNEL SNLED27351_MSKPHASE_5CHANNEL 45#define MSKPHASE_5CHANNEL SNLED27351_SCAN_PHASE_5_CHANNEL
46#define MSKPHASE_4CHANNEL SNLED27351_MSKPHASE_4CHANNEL 46#define MSKPHASE_4CHANNEL SNLED27351_SCAN_PHASE_4_CHANNEL
47#define MSKPHASE_3CHANNEL SNLED27351_MSKPHASE_3CHANNEL 47#define MSKPHASE_3CHANNEL SNLED27351_SCAN_PHASE_3_CHANNEL
48#define MSKPHASE_2CHANNEL SNLED27351_MSKPHASE_2CHANNEL 48#define MSKPHASE_2CHANNEL SNLED27351_SCAN_PHASE_2_CHANNEL
49#define MSKPHASE_1CHANNEL SNLED27351_MSKPHASE_1CHANNEL 49#define MSKPHASE_1CHANNEL SNLED27351_SCAN_PHASE_1_CHANNEL
50 50
51#define ckled2001_led snled27351_led_t 51#define ckled2001_led snled27351_led_t
52#define g_ckled2001_leds g_snled27351_leds 52#define g_ckled2001_leds g_snled27351_leds
53// ======== 53// ========
54 54
55#define SNLED27351_REG_COMMAND 0xFD
56#define SNLED27351_COMMAND_LED_CONTROL 0x00
57#define SNLED27351_COMMAND_PWM 0x01
58#define SNLED27351_COMMAND_FUNCTION 0x03
59#define SNLED27351_COMMAND_CURRENT_TUNE 0x04
60
61#define SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN 0x00
62#define SNLED27351_SOFTWARE_SHUTDOWN_SSD_SHUTDOWN (0x0 << 0)
63#define SNLED27351_SOFTWARE_SHUTDOWN_SSD_NORMAL (0x1 << 0)
64
65#define SNLED27351_FUNCTION_REG_ID 0x11
66#define SNLED27351_DRIVER_ID 0x8A
67
68#define SNLED27351_FUNCTION_REG_PULLDOWNUP 0x13
69#define SNLED27351_PULLDOWNUP_ALL_ENABLED 0xAA
70
71#define SNLED27351_FUNCTION_REG_SCAN_PHASE 0x14
72#define SNLED27351_SCAN_PHASE_12_CHANNEL 0x00
73#define SNLED27351_SCAN_PHASE_11_CHANNEL 0x01
74#define SNLED27351_SCAN_PHASE_10_CHANNEL 0x02
75#define SNLED27351_SCAN_PHASE_9_CHANNEL 0x03
76#define SNLED27351_SCAN_PHASE_8_CHANNEL 0x04
77#define SNLED27351_SCAN_PHASE_7_CHANNEL 0x05
78#define SNLED27351_SCAN_PHASE_6_CHANNEL 0x06
79#define SNLED27351_SCAN_PHASE_5_CHANNEL 0x07
80#define SNLED27351_SCAN_PHASE_4_CHANNEL 0x08
81#define SNLED27351_SCAN_PHASE_3_CHANNEL 0x09
82#define SNLED27351_SCAN_PHASE_2_CHANNEL 0x0A
83#define SNLED27351_SCAN_PHASE_1_CHANNEL 0x0B
84
85#define SNLED27351_FUNCTION_REG_SLEW_RATE_CONTROL_MODE_1 0x15
86#define SNLED27351_SLEW_RATE_CONTROL_MODE_1_PDP_ENABLE (0b1 << 2)
87
88#define SNLED27351_FUNCTION_REG_SLEW_RATE_CONTROL_MODE_2 0x16
89#define SNLED27351_SLEW_RATE_CONTROL_MODE_2_SSL_ENABLE (0b1 << 6)
90#define SNLED27351_SLEW_RATE_CONTROL_MODE_2_DSL_ENABLE (0b1 << 7)
91
92#define SNLED27351_FUNCTION_REG_OPEN_SHORT_ENABLE 0x17
93#define SNLED27351_OPEN_SHORT_ENABLE_SDS_ENABLE (0b1 << 6)
94#define SNLED27351_OPEN_SHORT_ENABLE_ODS_ENABLE (0b1 << 7)
95
96#define SNLED27351_FUNCTION_REG_OPEN_SHORT_DUTY 0x18
97
98#define SNLED27351_FUNCTION_REG_OPEN_SHORT_FLAG 0x19
99#define SNLED27351_OPEN_SHORT_FLAG_OSINT_ENABLE (0b1 << 6)
100#define SNLED27351_OPEN_SHORT_FLAG_ODINT_ENABLE (0b1 << 7)
101
102#define SNLED27351_FUNCTION_REG_SOFTWARE_SLEEP 0x1A
103#define SNLED27351_SOFTWARE_SLEEP_ENABLE (0b1 << 1)
104
105// LED Control Registers
106#define SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR 0x0
107#define SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR 0x17
108#define SNLED27351_LED_CONTROL_ON_OFF_LENGTH ((SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR - SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR) + 1)
109
110#define SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR 0x18
111#define SNLED27351_LED_CONTROL_OPEN_LAST_ADDR 0x2F
112#define SNLED27351_LED_CONTROL_OPEN_LENGTH ((SNLED27351_LED_CONTROL_OPEN_LAST_ADDR - SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR) + 1)
113
114#define SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR 0x30
115#define SNLED27351_LED_CONTROL_SHORT_LAST_ADDR 0x47
116#define SNLED27351_LED_CONTROL_SHORT_LENGTH ((SNLED27351_LED_CONTROL_SHORT_LAST_ADDR - SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR) + 1)
117
118#define SNLED27351_LED_CONTROL_PAGE_LENGTH 0x48
119
120// LED Control Registers
121#define SNLED27351_LED_PWM_FIRST_ADDR 0x00
122#define SNLED27351_LED_PWM_LAST_ADDR 0xBF
123#define SNLED27351_LED_PWM_LENGTH 0xC0
124
125// Current Tune Registers
126#define SNLED27351_LED_CURRENT_TUNE_FIRST_ADDR 0x00
127#define SNLED27351_LED_CURRENT_TUNE_LAST_ADDR 0x0B
128#define SNLED27351_LED_CURRENT_TUNE_LENGTH 0x0C
129
55#define SNLED27351_I2C_ADDRESS_GND 0x74 130#define SNLED27351_I2C_ADDRESS_GND 0x74
56#define SNLED27351_I2C_ADDRESS_SCL 0x75 131#define SNLED27351_I2C_ADDRESS_SCL 0x75
57#define SNLED27351_I2C_ADDRESS_SDA 0x76 132#define SNLED27351_I2C_ADDRESS_SDA 0x76
@@ -100,92 +175,6 @@ void snled27351_flush(void);
100void snled27351_sw_return_normal(uint8_t addr); 175void snled27351_sw_return_normal(uint8_t addr);
101void snled27351_sw_shutdown(uint8_t addr); 176void snled27351_sw_shutdown(uint8_t addr);
102 177
103// Registers Page Define
104#define SNLED27351_REG_CONFIGURE_CMD_PAGE 0xFD
105#define SNLED27351_LED_CONTROL_PAGE 0x00
106#define SNLED27351_LED_PWM_PAGE 0x01
107#define SNLED27351_FUNCTION_PAGE 0x03
108#define SNLED27351_CURRENT_TUNE_PAGE 0x04
109
110// Function Register: address 0x00
111#define SNLED27351_REG_CONFIGURATION 0x00
112#define SNLED27351_MSKSW_SHUT_DOWN_MODE (0x0 << 0)
113#define SNLED27351_MSKSW_NORMAL_MODE (0x1 << 0)
114
115#define SNLED27351_REG_DRIVER_ID 0x11
116#define SNLED27351_DRIVER_ID 0x8A
117
118#define SNLED27351_REG_PDU 0x13
119#define SNLED27351_MSKSET_CA_CB_CHANNEL 0xAA
120#define SNLED27351_MSKCLR_CA_CB_CHANNEL 0x00
121
122#define SNLED27351_REG_SCAN_PHASE 0x14
123#define SNLED27351_MSKPHASE_12CHANNEL 0x00
124#define SNLED27351_MSKPHASE_11CHANNEL 0x01
125#define SNLED27351_MSKPHASE_10CHANNEL 0x02
126#define SNLED27351_MSKPHASE_9CHANNEL 0x03
127#define SNLED27351_MSKPHASE_8CHANNEL 0x04
128#define SNLED27351_MSKPHASE_7CHANNEL 0x05
129#define SNLED27351_MSKPHASE_6CHANNEL 0x06
130#define SNLED27351_MSKPHASE_5CHANNEL 0x07
131#define SNLED27351_MSKPHASE_4CHANNEL 0x08
132#define SNLED27351_MSKPHASE_3CHANNEL 0x09
133#define SNLED27351_MSKPHASE_2CHANNEL 0x0A
134#define SNLED27351_MSKPHASE_1CHANNEL 0x0B
135
136#define SNLED27351_REG_SLEW_RATE_CONTROL_MODE1 0x15
137#define SNLED27351_MSKPWM_DELAY_PHASE_ENABLE 0x04
138#define SNLED27351_MSKPWM_DELAY_PHASE_DISABLE 0x00
139
140#define SNLED27351_REG_SLEW_RATE_CONTROL_MODE2 0x16
141#define SNLED27351_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_ENABLE 0xC0
142#define SNLED27351_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_DISABLE 0x00
143
144#define SNLED27351_REG_OPEN_SHORT_ENABLE 0x17
145#define SNLED27351_MSKOPEN_DETECTION_ENABLE (0x01 << 7)
146#define SNLED27351_MSKOPEN_DETECTION_DISABLE (0x00)
147
148#define SNLED27351_MSKSHORT_DETECTION_ENABLE (0x01 << 6)
149#define SNLED27351_MSKSHORT_DETECTION_DISABLE (0x00)
150
151#define SNLED27351_REG_OPEN_SHORT_DUTY 0x18
152#define SNLED27351_REG_OPEN_SHORT_FLAG 0x19
153
154#define SNLED27351_MSKOPEN_DETECTION_INTERRUPT_ENABLE (0x01 << 7)
155#define SNLED27351_MSKOPEN_DETECTION_INTERRUPT_DISABLE (0x00)
156
157#define SNLED27351_MSKSHORT_DETECTION_INTERRUPT_ENABLE (0x01 << 6)
158#define SNLED27351_MSKSHORT_DETECTION_INTERRUPT_DISABLE (0x00)
159
160#define SNLED27351_REG_SOFTWARE_SLEEP 0x1A
161#define SNLED27351_MSKSLEEP_ENABLE 0x02
162#define SNLED27351_MSKSLEEP_DISABLE 0x00
163
164// LED Control Registers
165#define SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR 0x0
166#define SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR 0x17
167#define SNLED27351_LED_CONTROL_ON_OFF_LENGTH ((SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR - SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR) + 1)
168
169#define SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR 0x18
170#define SNLED27351_LED_CONTROL_OPEN_LAST_ADDR 0x2F
171#define SNLED27351_LED_CONTROL_OPEN_LENGTH ((SNLED27351_LED_CONTROL_OPEN_LAST_ADDR - SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR) + 1)
172
173#define SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR 0x30
174#define SNLED27351_LED_CONTROL_SHORT_LAST_ADDR 0x47
175#define SNLED27351_LED_CONTROL_SHORT_LENGTH ((SNLED27351_LED_CONTROL_SHORT_LAST_ADDR - SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR) + 1)
176
177#define SNLED27351_LED_CONTROL_PAGE_LENGTH 0x48
178
179// LED Control Registers
180#define SNLED27351_LED_PWM_FIRST_ADDR 0x00
181#define SNLED27351_LED_PWM_LAST_ADDR 0xBF
182#define SNLED27351_LED_PWM_LENGTH 0xC0
183
184// Current Tune Registers
185#define SNLED27351_LED_CURRENT_TUNE_FIRST_ADDR 0x00
186#define SNLED27351_LED_CURRENT_TUNE_LAST_ADDR 0x0B
187#define SNLED27351_LED_CURRENT_TUNE_LENGTH 0x0C
188
189#define A_1 0x00 178#define A_1 0x00
190#define A_2 0x01 179#define A_2 0x01
191#define A_3 0x02 180#define A_3 0x02
diff --git a/drivers/led/snled27351.c b/drivers/led/snled27351.c
index 4e4067854e..71992b7322 100644
--- a/drivers/led/snled27351.c
+++ b/drivers/led/snled27351.c
@@ -29,7 +29,7 @@
29#endif 29#endif
30 30
31#ifndef SNLED27351_PHASE_CHANNEL 31#ifndef SNLED27351_PHASE_CHANNEL
32# define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_12CHANNEL 32# define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_12_CHANNEL
33#endif 33#endif
34 34
35#ifndef SNLED27351_CURRENT_TUNE 35#ifndef SNLED27351_CURRENT_TUNE
@@ -133,48 +133,48 @@ void snled27351_init_drivers(void) {
133 133
134void snled27351_init(uint8_t addr) { 134void snled27351_init(uint8_t addr) {
135 // Select to function page 135 // Select to function page
136 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE); 136 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_FUNCTION);
137 // Setting LED driver to shutdown mode 137 // Setting LED driver to shutdown mode
138 snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_SHUT_DOWN_MODE); 138 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN, SNLED27351_SOFTWARE_SHUTDOWN_SSD_SHUTDOWN);
139 // Setting internal channel pulldown/pullup 139 // Setting internal channel pulldown/pullup
140 snled27351_write_register(addr, SNLED27351_REG_PDU, SNLED27351_MSKSET_CA_CB_CHANNEL); 140 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_PULLDOWNUP, SNLED27351_PULLDOWNUP_ALL_ENABLED);
141 // Select number of scan phase 141 // Select number of scan phase
142 snled27351_write_register(addr, SNLED27351_REG_SCAN_PHASE, SNLED27351_PHASE_CHANNEL); 142 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SCAN_PHASE, SNLED27351_PHASE_CHANNEL);
143 // Setting PWM Delay Phase 143 // Setting PWM Delay Phase
144 snled27351_write_register(addr, SNLED27351_REG_SLEW_RATE_CONTROL_MODE1, SNLED27351_MSKPWM_DELAY_PHASE_ENABLE); 144 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SLEW_RATE_CONTROL_MODE_1, SNLED27351_SLEW_RATE_CONTROL_MODE_1_PDP_ENABLE);
145 // Setting Driving/Sinking Channel Slew Rate 145 // Setting Driving/Sinking Channel Slew Rate
146 snled27351_write_register(addr, SNLED27351_REG_SLEW_RATE_CONTROL_MODE2, SNLED27351_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_ENABLE); 146 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SLEW_RATE_CONTROL_MODE_2, SNLED27351_SLEW_RATE_CONTROL_MODE_2_DSL_ENABLE | SNLED27351_SLEW_RATE_CONTROL_MODE_2_SSL_ENABLE);
147 // Setting Iref 147 // Setting Iref
148 snled27351_write_register(addr, SNLED27351_REG_SOFTWARE_SLEEP, SNLED27351_MSKSLEEP_DISABLE); 148 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SLEEP, 0);
149 // Set LED CONTROL PAGE (Page 0) 149 // Set LED CONTROL PAGE (Page 0)
150 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_CONTROL_PAGE); 150 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_LED_CONTROL);
151 for (int i = 0; i < SNLED27351_LED_CONTROL_ON_OFF_LENGTH; i++) { 151 for (int i = 0; i < SNLED27351_LED_CONTROL_ON_OFF_LENGTH; i++) {
152 snled27351_write_register(addr, i, 0x00); 152 snled27351_write_register(addr, i, 0x00);
153 } 153 }
154 154
155 // Set PWM PAGE (Page 1) 155 // Set PWM PAGE (Page 1)
156 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_PWM_PAGE); 156 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_PWM);
157 for (int i = 0; i < SNLED27351_LED_CURRENT_TUNE_LENGTH; i++) { 157 for (int i = 0; i < SNLED27351_LED_CURRENT_TUNE_LENGTH; i++) {
158 snled27351_write_register(addr, i, 0x00); 158 snled27351_write_register(addr, i, 0x00);
159 } 159 }
160 160
161 // Set CURRENT PAGE (Page 4) 161 // Set CURRENT PAGE (Page 4)
162 uint8_t current_tune_reg_list[SNLED27351_LED_CURRENT_TUNE_LENGTH] = SNLED27351_CURRENT_TUNE; 162 uint8_t current_tune_reg_list[SNLED27351_LED_CURRENT_TUNE_LENGTH] = SNLED27351_CURRENT_TUNE;
163 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_CURRENT_TUNE_PAGE); 163 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_CURRENT_TUNE);
164 for (int i = 0; i < SNLED27351_LED_CURRENT_TUNE_LENGTH; i++) { 164 for (int i = 0; i < SNLED27351_LED_CURRENT_TUNE_LENGTH; i++) {
165 snled27351_write_register(addr, i, current_tune_reg_list[i]); 165 snled27351_write_register(addr, i, current_tune_reg_list[i]);
166 } 166 }
167 167
168 // Enable LEDs ON/OFF 168 // Enable LEDs ON/OFF
169 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_CONTROL_PAGE); 169 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_LED_CONTROL);
170 for (int i = 0; i < SNLED27351_LED_CONTROL_ON_OFF_LENGTH; i++) { 170 for (int i = 0; i < SNLED27351_LED_CONTROL_ON_OFF_LENGTH; i++) {
171 snled27351_write_register(addr, i, 0xFF); 171 snled27351_write_register(addr, i, 0xFF);
172 } 172 }
173 173
174 // Select to function page 174 // Select to function page
175 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE); 175 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_FUNCTION);
176 // Setting LED driver to normal mode 176 // Setting LED driver to normal mode
177 snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_NORMAL_MODE); 177 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN, SNLED27351_SOFTWARE_SHUTDOWN_SSD_NORMAL);
178} 178}
179 179
180void snled27351_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { 180void snled27351_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) {
@@ -230,7 +230,7 @@ void snled27351_set_led_control_register(uint8_t index, bool red, bool green, bo
230 230
231void snled27351_update_pwm_buffers(uint8_t addr, uint8_t index) { 231void snled27351_update_pwm_buffers(uint8_t addr, uint8_t index) {
232 if (g_pwm_buffer_update_required[index]) { 232 if (g_pwm_buffer_update_required[index]) {
233 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_PWM_PAGE); 233 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_PWM);
234 234
235 // If any of the transactions fail we risk writing dirty PG0, 235 // If any of the transactions fail we risk writing dirty PG0,
236 // refresh page 0 just in case. 236 // refresh page 0 just in case.
@@ -243,7 +243,7 @@ void snled27351_update_pwm_buffers(uint8_t addr, uint8_t index) {
243 243
244void snled27351_update_led_control_registers(uint8_t addr, uint8_t index) { 244void snled27351_update_led_control_registers(uint8_t addr, uint8_t index) {
245 if (g_led_control_registers_update_required[index]) { 245 if (g_led_control_registers_update_required[index]) {
246 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_CONTROL_PAGE); 246 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_LED_CONTROL);
247 for (int i = 0; i < SNLED27351_LED_CONTROL_REGISTER_COUNT; i++) { 247 for (int i = 0; i < SNLED27351_LED_CONTROL_REGISTER_COUNT; i++) {
248 snled27351_write_register(addr, i, g_led_control_registers[index][i]); 248 snled27351_write_register(addr, i, g_led_control_registers[index][i]);
249 } 249 }
@@ -266,16 +266,16 @@ void snled27351_flush(void) {
266 266
267void snled27351_sw_return_normal(uint8_t addr) { 267void snled27351_sw_return_normal(uint8_t addr) {
268 // Select to function page 268 // Select to function page
269 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE); 269 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_FUNCTION);
270 // Setting LED driver to normal mode 270 // Setting LED driver to normal mode
271 snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_NORMAL_MODE); 271 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN, SNLED27351_SOFTWARE_SHUTDOWN_SSD_NORMAL);
272} 272}
273 273
274void snled27351_sw_shutdown(uint8_t addr) { 274void snled27351_sw_shutdown(uint8_t addr) {
275 // Select to function page 275 // Select to function page
276 snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE); 276 snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_FUNCTION);
277 // Setting LED driver to shutdown mode 277 // Setting LED driver to shutdown mode
278 snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_SHUT_DOWN_MODE); 278 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN, SNLED27351_SOFTWARE_SHUTDOWN_SSD_SHUTDOWN);
279 // Write SW Sleep Register 279 // Write SW Sleep Register
280 snled27351_write_register(addr, SNLED27351_REG_SOFTWARE_SLEEP, SNLED27351_MSKSLEEP_ENABLE); 280 snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SLEEP, SNLED27351_SOFTWARE_SLEEP_ENABLE);
281} 281}
diff --git a/drivers/led/snled27351.h b/drivers/led/snled27351.h
index 77837d36aa..77337f177b 100644
--- a/drivers/led/snled27351.h
+++ b/drivers/led/snled27351.h
@@ -47,23 +47,98 @@
47# define SNLED27351_CURRENT_TUNE CKLED2001_CURRENT_TUNE 47# define SNLED27351_CURRENT_TUNE CKLED2001_CURRENT_TUNE
48#endif 48#endif
49 49
50#define MSKPHASE_12CHANNEL SNLED27351_MSKPHASE_12CHANNEL 50#define MSKPHASE_12CHANNEL SNLED27351_SCAN_PHASE_12_CHANNEL
51#define MSKPHASE_11CHANNEL SNLED27351_MSKPHASE_11CHANNEL 51#define MSKPHASE_11CHANNEL SNLED27351_SCAN_PHASE_11_CHANNEL
52#define MSKPHASE_10CHANNEL SNLED27351_MSKPHASE_10CHANNEL 52#define MSKPHASE_10CHANNEL SNLED27351_SCAN_PHASE_10_CHANNEL
53#define MSKPHASE_9CHANNEL SNLED27351_MSKPHASE_9CHANNEL 53#define MSKPHASE_9CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
54#define MSKPHASE_8CHANNEL SNLED27351_MSKPHASE_8CHANNEL 54#define MSKPHASE_8CHANNEL SNLED27351_SCAN_PHASE_8_CHANNEL
55#define MSKPHASE_7CHANNEL SNLED27351_MSKPHASE_7CHANNEL 55#define MSKPHASE_7CHANNEL SNLED27351_SCAN_PHASE_7_CHANNEL
56#define MSKPHASE_6CHANNEL SNLED27351_MSKPHASE_6CHANNEL 56#define MSKPHASE_6CHANNEL SNLED27351_SCAN_PHASE_6_CHANNEL
57#define MSKPHASE_5CHANNEL SNLED27351_MSKPHASE_5CHANNEL 57#define MSKPHASE_5CHANNEL SNLED27351_SCAN_PHASE_5_CHANNEL
58#define MSKPHASE_4CHANNEL SNLED27351_MSKPHASE_4CHANNEL 58#define MSKPHASE_4CHANNEL SNLED27351_SCAN_PHASE_4_CHANNEL
59#define MSKPHASE_3CHANNEL SNLED27351_MSKPHASE_3CHANNEL 59#define MSKPHASE_3CHANNEL SNLED27351_SCAN_PHASE_3_CHANNEL
60#define MSKPHASE_2CHANNEL SNLED27351_MSKPHASE_2CHANNEL 60#define MSKPHASE_2CHANNEL SNLED27351_SCAN_PHASE_2_CHANNEL
61#define MSKPHASE_1CHANNEL SNLED27351_MSKPHASE_1CHANNEL 61#define MSKPHASE_1CHANNEL SNLED27351_SCAN_PHASE_1_CHANNEL
62 62
63#define ckled2001_led snled27351_led_t 63#define ckled2001_led snled27351_led_t
64#define g_ckled2001_leds g_snled27351_leds 64#define g_ckled2001_leds g_snled27351_leds
65// ======== 65// ========
66 66
67#define SNLED27351_REG_COMMAND 0xFD
68#define SNLED27351_COMMAND_LED_CONTROL 0x00
69#define SNLED27351_COMMAND_PWM 0x01
70#define SNLED27351_COMMAND_FUNCTION 0x03
71#define SNLED27351_COMMAND_CURRENT_TUNE 0x04
72
73#define SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN 0x00
74#define SNLED27351_SOFTWARE_SHUTDOWN_SSD_SHUTDOWN (0x0 << 0)
75#define SNLED27351_SOFTWARE_SHUTDOWN_SSD_NORMAL (0x1 << 0)
76
77#define SNLED27351_FUNCTION_REG_ID 0x11
78#define SNLED27351_DRIVER_ID 0x8A
79
80#define SNLED27351_FUNCTION_REG_PULLDOWNUP 0x13
81#define SNLED27351_PULLDOWNUP_ALL_ENABLED 0xAA
82
83#define SNLED27351_FUNCTION_REG_SCAN_PHASE 0x14
84#define SNLED27351_SCAN_PHASE_12_CHANNEL 0x00
85#define SNLED27351_SCAN_PHASE_11_CHANNEL 0x01
86#define SNLED27351_SCAN_PHASE_10_CHANNEL 0x02
87#define SNLED27351_SCAN_PHASE_9_CHANNEL 0x03
88#define SNLED27351_SCAN_PHASE_8_CHANNEL 0x04
89#define SNLED27351_SCAN_PHASE_7_CHANNEL 0x05
90#define SNLED27351_SCAN_PHASE_6_CHANNEL 0x06
91#define SNLED27351_SCAN_PHASE_5_CHANNEL 0x07
92#define SNLED27351_SCAN_PHASE_4_CHANNEL 0x08
93#define SNLED27351_SCAN_PHASE_3_CHANNEL 0x09
94#define SNLED27351_SCAN_PHASE_2_CHANNEL 0x0A
95#define SNLED27351_SCAN_PHASE_1_CHANNEL 0x0B
96
97#define SNLED27351_FUNCTION_REG_SLEW_RATE_CONTROL_MODE_1 0x15
98#define SNLED27351_SLEW_RATE_CONTROL_MODE_1_PDP_ENABLE (0b1 << 2)
99
100#define SNLED27351_FUNCTION_REG_SLEW_RATE_CONTROL_MODE_2 0x16
101#define SNLED27351_SLEW_RATE_CONTROL_MODE_2_SSL_ENABLE (0b1 << 6)
102#define SNLED27351_SLEW_RATE_CONTROL_MODE_2_DSL_ENABLE (0b1 << 7)
103
104#define SNLED27351_FUNCTION_REG_OPEN_SHORT_ENABLE 0x17
105#define SNLED27351_OPEN_SHORT_ENABLE_SDS_ENABLE (0b1 << 6)
106#define SNLED27351_OPEN_SHORT_ENABLE_ODS_ENABLE (0b1 << 7)
107
108#define SNLED27351_FUNCTION_REG_OPEN_SHORT_DUTY 0x18
109
110#define SNLED27351_FUNCTION_REG_OPEN_SHORT_FLAG 0x19
111#define SNLED27351_OPEN_SHORT_FLAG_OSINT_ENABLE (0b1 << 6)
112#define SNLED27351_OPEN_SHORT_FLAG_ODINT_ENABLE (0b1 << 7)
113
114#define SNLED27351_FUNCTION_REG_SOFTWARE_SLEEP 0x1A
115#define SNLED27351_SOFTWARE_SLEEP_ENABLE (0b1 << 1)
116
117// LED Control Registers
118#define SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR 0x0
119#define SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR 0x17
120#define SNLED27351_LED_CONTROL_ON_OFF_LENGTH ((SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR - SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR) + 1)
121
122#define SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR 0x18
123#define SNLED27351_LED_CONTROL_OPEN_LAST_ADDR 0x2F
124#define SNLED27351_LED_CONTROL_OPEN_LENGTH ((SNLED27351_LED_CONTROL_OPEN_LAST_ADDR - SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR) + 1)
125
126#define SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR 0x30
127#define SNLED27351_LED_CONTROL_SHORT_LAST_ADDR 0x47
128#define SNLED27351_LED_CONTROL_SHORT_LENGTH ((SNLED27351_LED_CONTROL_SHORT_LAST_ADDR - SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR) + 1)
129
130#define SNLED27351_LED_CONTROL_PAGE_LENGTH 0x48
131
132// LED Control Registers
133#define SNLED27351_LED_PWM_FIRST_ADDR 0x00
134#define SNLED27351_LED_PWM_LAST_ADDR 0xBF
135#define SNLED27351_LED_PWM_LENGTH 0xC0
136
137// Current Tune Registers
138#define SNLED27351_LED_CURRENT_TUNE_FIRST_ADDR 0x00
139#define SNLED27351_LED_CURRENT_TUNE_LAST_ADDR 0x0B
140#define SNLED27351_LED_CURRENT_TUNE_LENGTH 0x0C
141
67#define SNLED27351_I2C_ADDRESS_GND 0x74 142#define SNLED27351_I2C_ADDRESS_GND 0x74
68#define SNLED27351_I2C_ADDRESS_SCL 0x75 143#define SNLED27351_I2C_ADDRESS_SCL 0x75
69#define SNLED27351_I2C_ADDRESS_SDA 0x76 144#define SNLED27351_I2C_ADDRESS_SDA 0x76
@@ -114,92 +189,6 @@ void snled27351_flush(void);
114void snled27351_sw_return_normal(uint8_t addr); 189void snled27351_sw_return_normal(uint8_t addr);
115void snled27351_sw_shutdown(uint8_t addr); 190void snled27351_sw_shutdown(uint8_t addr);
116 191
117// Registers Page Define
118#define SNLED27351_REG_CONFIGURE_CMD_PAGE 0xFD
119#define SNLED27351_LED_CONTROL_PAGE 0x00
120#define SNLED27351_LED_PWM_PAGE 0x01
121#define SNLED27351_FUNCTION_PAGE 0x03
122#define SNLED27351_CURRENT_TUNE_PAGE 0x04
123
124// Function Register: address 0x00
125#define SNLED27351_REG_CONFIGURATION 0x00
126#define SNLED27351_MSKSW_SHUT_DOWN_MODE (0x0 << 0)
127#define SNLED27351_MSKSW_NORMAL_MODE (0x1 << 0)
128
129#define SNLED27351_REG_DRIVER_ID 0x11
130#define SNLED27351_DRIVER_ID 0x8A
131
132#define SNLED27351_REG_PDU 0x13
133#define SNLED27351_MSKSET_CA_CB_CHANNEL 0xAA
134#define SNLED27351_MSKCLR_CA_CB_CHANNEL 0x00
135
136#define SNLED27351_REG_SCAN_PHASE 0x14
137#define SNLED27351_MSKPHASE_12CHANNEL 0x00
138#define SNLED27351_MSKPHASE_11CHANNEL 0x01
139#define SNLED27351_MSKPHASE_10CHANNEL 0x02
140#define SNLED27351_MSKPHASE_9CHANNEL 0x03
141#define SNLED27351_MSKPHASE_8CHANNEL 0x04
142#define SNLED27351_MSKPHASE_7CHANNEL 0x05
143#define SNLED27351_MSKPHASE_6CHANNEL 0x06
144#define SNLED27351_MSKPHASE_5CHANNEL 0x07
145#define SNLED27351_MSKPHASE_4CHANNEL 0x08
146#define SNLED27351_MSKPHASE_3CHANNEL 0x09
147#define SNLED27351_MSKPHASE_2CHANNEL 0x0A
148#define SNLED27351_MSKPHASE_1CHANNEL 0x0B
149
150#define SNLED27351_REG_SLEW_RATE_CONTROL_MODE1 0x15
151#define SNLED27351_MSKPWM_DELAY_PHASE_ENABLE 0x04
152#define SNLED27351_MSKPWM_DELAY_PHASE_DISABLE 0x00
153
154#define SNLED27351_REG_SLEW_RATE_CONTROL_MODE2 0x16
155#define SNLED27351_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_ENABLE 0xC0
156#define SNLED27351_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_DISABLE 0x00
157
158#define SNLED27351_REG_OPEN_SHORT_ENABLE 0x17
159#define SNLED27351_MSKOPEN_DETECTION_ENABLE (0x01 << 7)
160#define SNLED27351_MSKOPEN_DETECTION_DISABLE (0x00)
161
162#define SNLED27351_MSKSHORT_DETECTION_ENABLE (0x01 << 6)
163#define SNLED27351_MSKSHORT_DETECTION_DISABLE (0x00)
164
165#define SNLED27351_REG_OPEN_SHORT_DUTY 0x18
166#define SNLED27351_REG_OPEN_SHORT_FLAG 0x19
167
168#define SNLED27351_MSKOPEN_DETECTION_INTERRUPT_ENABLE (0x01 << 7)
169#define SNLED27351_MSKOPEN_DETECTION_INTERRUPT_DISABLE (0x00)
170
171#define SNLED27351_MSKSHORT_DETECTION_INTERRUPT_ENABLE (0x01 << 6)
172#define SNLED27351_MSKSHORT_DETECTION_INTERRUPT_DISABLE (0x00)
173
174#define SNLED27351_REG_SOFTWARE_SLEEP 0x1A
175#define SNLED27351_MSKSLEEP_ENABLE 0x02
176#define SNLED27351_MSKSLEEP_DISABLE 0x00
177
178// LED Control Registers
179#define SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR 0x0
180#define SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR 0x17
181#define SNLED27351_LED_CONTROL_ON_OFF_LENGTH ((SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR - SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR) + 1)
182
183#define SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR 0x18
184#define SNLED27351_LED_CONTROL_OPEN_LAST_ADDR 0x2F
185#define SNLED27351_LED_CONTROL_OPEN_LENGTH ((SNLED27351_LED_CONTROL_OPEN_LAST_ADDR - SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR) + 1)
186
187#define SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR 0x30
188#define SNLED27351_LED_CONTROL_SHORT_LAST_ADDR 0x47
189#define SNLED27351_LED_CONTROL_SHORT_LENGTH ((SNLED27351_LED_CONTROL_SHORT_LAST_ADDR - SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR) + 1)
190
191#define SNLED27351_LED_CONTROL_PAGE_LENGTH 0x48
192
193// LED Control Registers
194#define SNLED27351_LED_PWM_FIRST_ADDR 0x00
195#define SNLED27351_LED_PWM_LAST_ADDR 0xBF
196#define SNLED27351_LED_PWM_LENGTH 0xC0
197
198// Current Tune Registers
199#define SNLED27351_LED_CURRENT_TUNE_FIRST_ADDR 0x00
200#define SNLED27351_LED_CURRENT_TUNE_LAST_ADDR 0x0B
201#define SNLED27351_LED_CURRENT_TUNE_LENGTH 0x0C
202
203#define A_1 0x00 192#define A_1 0x00
204#define A_2 0x01 193#define A_2 0x01
205#define A_3 0x02 194#define A_3 0x02
generated by cgit v1.2.3 (git 2.25.1) at 2026-09-03 07:14:36 +0000