Commit Graph

  • e14776a473 add basic implementation of ppu write registers master vin 2024-09-01 19:44:40 -0400
  • 2084552c53 add basic ppu register reading vin 2024-09-01 15:39:32 -0400
  • f591b4adf2 start working on ppu vin 2024-08-31 22:25:12 -0400
  • 279478f16f add preliminary apu register support vin 2024-08-31 22:24:33 -0400
  • c0679b404d add shell.nix to get dependencies easily vin 2024-08-31 22:24:05 -0400
  • 27b9d4c120 added snippet explaining the NES's 6502 variant and long-term goal for the project vin 2024-08-21 17:46:30 -0400
  • 97332c8a38 update README vin 2024-08-21 13:31:29 -0400
  • 362341eac3 rename struct Rom to struct rom vin 2024-07-21 14:48:29 -0400
  • 7d148924e2 start implementing PPU vin 2024-07-21 13:53:04 -0400
  • 2df7df5f5b add CFLAGS vin 2024-07-21 13:52:48 -0400
  • 85c6a414f9 fix rest of logging format issues vin 2024-07-20 21:39:04 -0400
  • 81575946ae fix status flag bug in ASL and ROL vin 2024-07-20 21:18:11 -0400
  • 70937cd61f replace tabs with spaces to better match nestest.log vin 2024-07-20 20:27:55 -0400
  • ca5a09cd94 fix warnings and move cpu registers+flags to header vin 2024-07-07 13:04:10 -0400
  • 3e0563ce05 add nestest.nes and log that was used for testing the CPU vin 2024-07-04 15:19:45 -0400
  • e1cdd73868 implement all of the nestest unofficial opcodes and fix branch cycles vin 2024-07-04 15:06:15 -0400
  • 4ccf9f5cee add preliminary implementation of the unofficial opcodes vin 2024-07-04 14:17:40 -0400
  • c4fc40a036 start implementing unofficial opcodes vin 2024-07-04 12:11:53 -0400
  • 5cd467eaf6 achieve cycle accuracy for official opcodes vin 2024-07-04 11:18:38 -0400
  • d57acb77c7 finalize trace logging to match nestest.log minus PPU cycles vin 2024-07-03 21:02:34 -0400
  • 4fcc8d48f4 improve branching cycle accuracy vin 2024-07-03 20:40:57 -0400
  • 2236e79556 fix SBC bug in the rewrite and improve logging vin 2024-07-03 19:49:21 -0400
  • d8bb5a5ccf call opcode function pointer instead of using switch case vin 2024-07-03 18:52:15 -0400
  • a4b39966ae start refactoring opcode defs into an array vin 2024-06-30 19:10:29 -0400
  • f28733401e combine macro for updating N and Z status flags vin 2024-06-30 15:46:18 -0400
  • 47b8fac273 fix alignment of logging with ABS_X and ZP_X vin 2024-06-30 15:19:52 -0400
  • 4525490beb fix indirect JMP bug where the high byte does not increment out of page vin 2024-06-30 15:14:38 -0400
  • 718f89c9c5 fix incorrect argument for INC vin 2024-06-30 09:54:05 -0400
  • 30fe238d42 rename README to README.md vin 2024-06-30 09:37:31 -0400
  • 45c2312976 fix incorrect argument for ASL and LSR vin 2024-06-30 08:58:06 -0400
  • 99082b5528 fix JSR, RTS, and RTI vin 2024-06-30 07:56:08 -0400
  • 5535e5de70 change SBC to be ADC with one's complement instead of two's vin 2024-06-30 06:28:41 -0400
  • 4b7fae0010 fix status flag ordering shenanigans vin 2024-06-29 09:51:49 -0400
  • 5d36aeb885 fix ADC bug where V is calculated with new A instead of old A vin 2024-06-29 09:51:12 -0400
  • f16ab6cb6d fix status register to match nestest vin 2024-06-28 14:44:16 -0400
  • 3977ab2a5d improve logging and JMP indirect vin 2024-06-28 14:33:47 -0400
  • c1a42045e6 fix more bugs vin 2024-06-28 10:28:53 -0400
  • 09692f45f6 fix JSR and RTS bug vin 2024-06-28 10:18:01 -0400
  • 3ebdeab784 start logging instructions as nestest.log has done vin 2024-06-28 09:51:55 -0400
  • 6a5b0b728e start fixing bugs with memory access vin 2024-06-17 15:11:45 +0530
  • 77d37dd455 implement basic iNES and Mapper 0 ROM loading vin 2024-06-17 14:46:00 +0530
  • 1f6e3b054c replace bit comparisons with 0 from greater than to not equal vin 2024-06-16 17:11:51 +0530
  • 745496ccd1 add memory mirroring for system and ppu memory vin 2024-06-11 15:38:58 +0530
  • 44273e69b9 add separate implied/accumulator functions for certain opcodes vin 2024-06-11 15:08:53 +0530
  • 142e35ff69 remove opcode json converter helper scripts vin 2024-06-11 14:43:41 +0530
  • a3189d90af add jsr, rti, rts vin 2024-06-10 23:25:49 +0530
  • 3412a03a5e implement untested most of stack-related opcodes vin 2024-06-10 22:56:06 +0530
  • dbb952a52b add lsr, rol, ror vin 2024-06-10 14:27:53 +0530
  • ebdf50cdf3 implement tay, txa, tya vin 2024-06-10 12:55:40 +0530
  • 454276a50c implement sta, stx, sty vin 2024-06-10 12:54:05 +0530
  • e07d5917a1 implement se?() opcodes and remove extra 65c02 opcodes vin 2024-06-10 12:50:00 +0530
  • 23008662ce implement more instructions vin 2024-06-09 22:50:33 +0530
  • 68ecbce235 add opcode_mem() function to return memory address and not pre-peek vin 2024-06-09 22:15:21 +0530
  • c417bf2276 add memory writing functions vin 2024-06-09 16:07:09 +0530
  • 4db0a8163e implement some more instructions and branching? vin 2024-06-09 16:02:04 +0530
  • 858cbfba48 fix potential adc overflow flag bug vin 2024-06-09 15:35:31 +0530
  • 76b9059b2e add blank todo opcode functions based on opcode json vin 2024-06-09 13:11:05 +0530
  • 207c6903f5 programmatically create switch cases for opcodes based on opcode json vin 2024-06-09 12:56:13 +0530
  • 72e29b3d25 move addressing mode parsing into separate function vin 2024-06-08 22:08:51 +0530
  • 1ac30a026b add adc and actually fix peek/16 vin 2024-06-08 17:41:06 +0530
  • bd85b80ba7 fix peek vin 2024-06-04 17:48:34 +0530
  • 36a8eefd00 shorten addressing mode enum names vin 2024-06-04 16:16:11 +0530
  • 7245191e86 add peek(), peek16(), and finish lda() vin 2024-06-04 15:54:09 +0530
  • 10567e0be8 load program rom into proper offset in memory vin 2024-05-24 12:55:44 +0530
  • 8493837ef9 implement tax and inx and print status each time vin 2024-05-24 12:20:04 +0530
  • 24ca08a83d add lda immediate and brk vin 2024-05-24 11:50:08 +0530
  • dd757c4324 start working on 6502 cpu vin 2024-05-20 19:39:19 +0530
  • 5fcf579ad4 initial commit vin 2024-05-20 18:51:56 +0530