eel3792c_rv32i

RV32I implementation on a DE10-Lite FPGA for the EEL3792C course.
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commit 341ffb58d33ed5f0ce4743ec0881e11964589966
parent ef452571894a1c75805cfa9f58f8ccde28cd76e6
Author: jg0 <yyj9ob3v@anonaddy.com>
Date:   Tue, 25 Mar 2025 16:21:44 -0400

fibonacci with blt and bne


Diffstat:
Mfibonacci.s | 7+++----
Mriscvtest_rom_image.txt | 5++---
2 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/fibonacci.s b/fibonacci.s @@ -12,6 +12,5 @@ loop: addi x5, x5, 4 lw x29, 0(x7) add x30, x28, x29 sw x30, 0(x5) - beq x5, x9, done - beq x5, x5 loop -done: beq x5, x5 done -\ No newline at end of file + blt x5, x9, loop +done: bne x5, x9 done +\ No newline at end of file diff --git a/riscvtest_rom_image.txt b/riscvtest_rom_image.txt @@ -11,6 +11,5 @@ ff828393 0003ae83 01de0f33 01e2a023 -00928463 -fe5280e3 -00528063 +fe92c2e3 +00929063