eel3792c_rv32i

RV32I implementation on a DE10-Lite FPGA for the EEL3792C course.
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commit 92d16b841168f044536636179ad4a4364f5ba29a
parent fa0b37e4e90eed92766273e354d6f7b6d01d3554
Author: vin <git@vineetk.net>
Date:   Thu, 17 Apr 2025 16:14:41 -0400

increase RAM size to 0xff

Diffstat:
Aram_large.c | 5+++++
Mriscvsingle.sv | 2+-
2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/ram_large.c b/ram_large.c @@ -0,0 +1,5 @@ +void +_start(void) +{ + *(unsigned int *)0xf0 = 500; +} diff --git a/riscvsingle.sv b/riscvsingle.sv @@ -149,7 +149,7 @@ module dmem(input logic clk, we, input logic [ 7:0] my_sw, output logic [31:0] my_rd); - logic [31:0] RAM[127:0]; + logic [31:0] RAM[255:0]; assign rd = RAM[a[31:2]]; // word aligned