eel3792c_rv32i

commit c7a70e1962a7b6d8dfd524d39f42a7f31261450f
parent 011da633434a7506fac317abcbbe07ef8a7277ab
Author: vin <git@vineetk.net>
Date:   Mon, 10 Mar 2025 16:20:23 -0400

use relative filepath for ROM and RAM

Diffstat:
M
riscvsingle.sv
 | 
4
++--

1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/riscvsingle.sv b/riscvsingle.sv
@@ -135,7 +135,7 @@ module imem(input  logic [31:0] a,
   // Simulator : ok
   // Hardware  : For FPGA ok, non-FPGA we need a 3rd party solution to program the FLASH memory (ROM)
   initial
-      $readmemh("C:\\Users\\onur\\Desktop\\CE_Lab2\\CEL_PROJECT\\riscvtest_rom_image.txt", ROM);
+      $readmemh("riscvtest_rom_image.txt", ROM);
 
   assign rd = ROM[a[31:2]]; // word aligned
 endmodule
@@ -169,7 +169,7 @@ module dmem(input  logic        clk, we,
   // Simulator : ok
   // Hardware  : For FPGA ok, non-FPGA we need a 3rd party solution to program the DATA memory (RAM)
   initial
-      $readmemh("C:\\Users\\onur\\Desktop\\CE_Lab2\\CEL_PROJECT\\riscvtest_ram_image.txt", RAM);  
+      $readmemh("riscvtest_ram_image.txt", RAM);  
   
 endmodule