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authorvin <git@vineetk.net>2024-07-04 14:17:40 -0400
committervin <git@vineetk.net>2024-07-04 14:17:40 -0400
commit4ccf9f5cee97c8c2191660a5632ab2da60757f97 (patch)
treefd7c3668d904c3c9024401c396e9ca905d932971 /cpu.c
parentc4fc40a036293a8f5899800ad3ecb1d24ba77bc4 (diff)
add preliminary implementation of the unofficial opcodes
Diffstat (limited to 'cpu.c')
-rw-r--r--cpu.c91
1 files changed, 57 insertions, 34 deletions
diff --git a/cpu.c b/cpu.c
index e3bb7d5..039337f 100644
--- a/cpu.c
+++ b/cpu.c
@@ -128,8 +128,8 @@ opcode_mem(enum addressing_mode mode)
128 break; 128 break;
129 case AM_REL: 129 case AM_REL:
130 val = arg + regs.pc; 130 val = arg + regs.pc;
131 if ((regs.pc + 1) & 0xFF00 != val & 0xFF00) 131 if (((regs.pc + 1) & 0xFF00) != (val & 0xFF00))
132 page_crossed = true; 132 val -= 0x0100;
133 break; 133 break;
134 case AM_IMM: 134 case AM_IMM:
135 case AM_ABS: 135 case AM_ABS:
@@ -703,133 +703,158 @@ TYA(uint16_t arg)
703void 703void
704AAC(uint16_t arg) 704AAC(uint16_t arg)
705{ 705{
706 NOP(0); 706 AND(arg);
707
708 regs.status.carry = regs.status.negative;
707} 709}
708 710
709void 711void
710AAX(uint16_t arg) 712SAX(uint16_t arg)
711{ 713{
712 NOP(0); 714 uint8_t tmp = regs.x & regs.a;
715 memwrite(arg, tmp);
713} 716}
714 717
715void 718void
716ARR(uint16_t arg) 719ARR(uint16_t arg)
717{ 720{
718 NOP(0); 721 uint8_t tmp = arg & regs.a;
722
723 AND(arg);
724 ROR_acc(0);
725
726 if ((tmp & (1 << 5)) != 0 && (tmp & (1 << 6)) != 0)
727 SEC(0), CLV(0);
728 else if ((tmp & (1 << 5)) == 0 && (tmp & (1 << 6)) == 0)
729 CLC(0), CLV(0);
730 else if ((tmp & (1 << 5)) != 0)
731 CLC(0), regs.status.overflow = 1;
732 else if ((tmp & (1 << 6)) != 0)
733 SEC(0), regs.status.overflow = 1;
719} 734}
720 735
721void 736void
722ASR(uint16_t arg) 737ASR(uint16_t arg)
723{ 738{
724 NOP(0); 739 AND(arg);
740 LSR_acc(0);
725} 741}
726 742
727void 743void
728ATX(uint16_t arg) 744ATX(uint16_t arg)
729{ 745{
730 NOP(0); 746 AND(arg);
747 TAX(0);
731} 748}
732 749
733void 750void
734AXA(uint16_t arg) 751AXA(uint16_t arg)
735{ 752{
736 NOP(0); 753 uint8_t tmp = regs.x & regs.a & 7;
754 memwrite(arg, tmp);
737} 755}
738 756
739void 757void
740AXS(uint16_t arg) 758AXS(uint16_t arg)
741{ 759{
742 NOP(0); 760 regs.x &= regs.a;
761 regs.x -= arg;
762
763 regs.status.carry = arg <= regs.x;
764 STATUS_UPDATE_NZ(regs.x);
743} 765}
744 766
745void 767void
746DCP(uint16_t arg) 768DCP(uint16_t arg)
747{ 769{
748 NOP(0); 770 uint8_t tmp = peek(arg) - 1;
749} 771 memwrite(arg, tmp);
750 772
751void 773 regs.status.carry = tmp <= regs.a;
752DOP(uint16_t arg) 774 STATUS_UPDATE_NZ(tmp);
753{
754 NOP(0);
755} 775}
756 776
757void 777void
758ISC(uint16_t arg) 778ISC(uint16_t arg)
759{ 779{
760 NOP(0); 780 INC(arg);
781 SBC(peek(arg));
761} 782}
762 783
763void 784void
764KIL(uint16_t arg) 785KIL(uint16_t arg)
765{ 786{
787 /* TODO: figure out how to stop interpret(), I guess with global bool */
766 NOP(0); 788 NOP(0);
767} 789}
768 790
769void 791void
770LAR(uint16_t arg) 792LAR(uint16_t arg)
771{ 793{
772 NOP(0); 794 regs.a = regs.x = regs.sp = regs.a & regs.sp;
795
796 STATUS_UPDATE_NZ(regs.a);
773} 797}
774 798
775void 799void
776LAX(uint16_t arg) 800LAX(uint16_t arg)
777{ 801{
778 NOP(0); 802 LDA(arg);
803 LDX(arg);
779} 804}
780 805
781void 806void
782RLA(uint16_t arg) 807RLA(uint16_t arg)
783{ 808{
784 NOP(0); 809 ROL(arg);
810 AND(arg);
785} 811}
786 812
787void 813void
788RRA(uint16_t arg) 814RRA(uint16_t arg)
789{ 815{
790 NOP(0); 816 ROR(arg);
817 ADC(peek(arg));
791} 818}
792 819
793void 820void
794SLO(uint16_t arg) 821SLO(uint16_t arg)
795{ 822{
796 NOP(0); 823 ASL(arg);
824 ORA(arg);
797} 825}
798 826
799void 827void
800SRE(uint16_t arg) 828SRE(uint16_t arg)
801{ 829{
802 NOP(0); 830 LSR(arg);
831 EOR(arg);
803} 832}
804 833
805void 834void
806SXA(uint16_t arg) 835SXA(uint16_t arg)
807{ 836{
808 NOP(0); 837 memwrite(arg, regs.x & ((arg & 0xFF00) + 1));
809} 838}
810 839
811void 840void
812SYA(uint16_t arg) 841SYA(uint16_t arg)
813{ 842{
814 NOP(0); 843 memwrite(arg, regs.x & ((arg & 0xFF00) + 1));
815}
816
817void
818TOP(uint16_t arg)
819{
820 NOP(0);
821} 844}
822 845
823void 846void
824XAA(uint16_t arg) 847XAA(uint16_t arg)
825{ 848{
849 /* TODO: apparently the exact operation is unknown */
826 NOP(0); 850 NOP(0);
827} 851}
828 852
829void 853void
830XAS(uint16_t arg) 854XAS(uint16_t arg)
831{ 855{
832 NOP(0); 856 regs.sp = regs.a & regs.x;
857 memwrite(arg, regs.sp & ((arg & 0xFF00) + 1));
833} 858}
834 859
835static void 860static void
@@ -877,8 +902,6 @@ interpret(void)
877 printf("$%02X,Y", arg); 902 printf("$%02X,Y", arg);
878 break; 903 break;
879 case AM_REL: 904 case AM_REL:
880 printf("$%04X", regs.pc + arg);
881 break;
882 case AM_ABS: 905 case AM_ABS:
883 printf("$%04X", arg); 906 printf("$%04X", arg);
884 break; 907 break;