eel3792c_rv32i

RV32I implementation on a DE10-Lite FPGA for the EEL3792C course.
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commit 70477dad47f985f68ce05668911939b0374ea364
parent 341ffb58d33ed5f0ce4743ec0881e11964589966
Author: vin <git@vineetk.net>
Date:   Mon, 24 Mar 2025 16:46:05 -0400

refactor PCSrc assignment and add bne instruction

Diffstat:
Mriscvsingle.sv | 11++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/riscvsingle.sv b/riscvsingle.sv @@ -229,7 +229,16 @@ module controller(input logic [6:0] op, ALUSrc, RegWrite, Jump, ImmSrc, ALUOp); aludec ad(op[5], funct3, funct7b5, ALUOp, ALUControl); - assign PCSrc = Branch & Zero | Jump; +// assign PCSrc = Branch & Zero | Jump; + always_comb + if (Branch) + case (funct3) + 3'b000: PCSrc = Zero; + 3'b001: PCSrc = ~Zero; + default: PCSrc = 1'bx; + endcase + else + PCSrc = Jump; endmodule module maindec(input logic [6:0] op,