eel3792c_rv32i

RV32I implementation on a DE10-Lite FPGA for the EEL3792C course.
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commit d3efcc03a79d53fd33be6287ffd314821feeb957
parent 398f047bac2b89026dcb09ce21b4683ff49d4f35
Author: vin <git@vineetk.net>
Date:   Tue, 25 Mar 2025 16:40:01 -0400

increase test bench length

Diffstat:
Mfibonacci.s | 3+--
Mmy_computer_tb.v | 5++---
2 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/fibonacci.s b/fibonacci.s @@ -13,4 +13,4 @@ loop: addi x5, x5, 4 add x30, x28, x29 sw x30, 0(x5) blt x5, x9, loop -done: bne x5, x9 done -\ No newline at end of file +done: bne x5, x9 done diff --git a/my_computer_tb.v b/my_computer_tb.v @@ -16,8 +16,8 @@ module my_computer_tb(); begin reset <= 1; clk = 1; #22; reset <= 0; - #1000; + #3000; $stop; end -endmodule -\ No newline at end of file +endmodule