| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2024-09-01 | add basic ppu register reading | vin | |
| 2024-09-01 | add preliminary apu register support | vin | |
| 2024-07-21 | rename struct Rom to struct rom | vin | |
| 2024-07-21 | start implementing PPU | vin | |
| 2024-07-20 | fix rest of logging format issues | vin | |
| Now the format perfectly matches nestest.log. The only mismatch is now at the unimplemented APU memory addresses. | |||
| 2024-07-20 | fix status flag bug in ASL and ROL | vin | |
| 2024-07-20 | replace tabs with spaces to better match nestest.log | vin | |
| 2024-07-07 | fix warnings and move cpu registers+flags to header | vin | |
| 2024-07-04 | implement all of the nestest unofficial opcodes and fix branch cycles | vin | |
| 2024-07-04 | add preliminary implementation of the unofficial opcodes | vin | |
| 2024-07-04 | start implementing unofficial opcodes | vin | |
| 2024-07-04 | achieve cycle accuracy for official opcodes | vin | |
| Now, the unofficial opcodes can be implemented, and then the PPU and APU. | |||
| 2024-07-03 | finalize trace logging to match nestest.log minus PPU cycles | vin | |
| 2024-07-03 | improve branching cycle accuracy | vin | |
| 2024-07-03 | fix SBC bug in the rewrite and improve logging | vin | |
| 2024-07-03 | call opcode function pointer instead of using switch case | vin | |
| Also improve logging. | |||
| 2024-06-30 | start refactoring opcode defs into an array | vin | |
| 2024-06-30 | combine macro for updating N and Z status flags | vin | |
| 2024-06-30 | fix alignment of logging with ABS_X and ZP_X | vin | |
| 2024-06-30 | fix indirect JMP bug where the high byte does not increment out of page | vin | |
| https://old.reddit.com/r/EmuDev/comments/15plfes/having_an_issue_with_nestest_on_my_6502_emulator/jvyck7k/ With this, it seems that all official opcodes run as nestest expects. Now, it's the unofficial opcodes that need to be implemented. | |||
| 2024-06-30 | fix incorrect argument for INC | vin | |
| Perhaps a refactor is in order for the arguments to the opcodes. | |||
| 2024-06-30 | fix incorrect argument for ASL and LSR | vin | |
| 2024-06-30 | fix JSR, RTS, and RTI | vin | |
| JSR was pushing 1 too high PC and RTS was 1 too low RTI was only pulling the low byte of PC | |||
| 2024-06-30 | change SBC to be ADC with one's complement instead of two's | vin | |
| It seems that is what was expected when run with nestest. | |||
| 2024-06-29 | fix status flag ordering shenanigans | vin | |
| 2024-06-29 | fix ADC bug where V is calculated with new A instead of old A | vin | |
| 2024-06-28 | fix status register to match nestest | vin | |
| 2024-06-28 | improve logging and JMP indirect | vin | |
| 2024-06-28 | fix more bugs | vin | |
| 2024-06-28 | fix JSR and RTS bug | vin | |
| The stack's PUSH and PULL weren't proper and JSR was reading wrong argument it seems. | |||
| 2024-06-28 | start logging instructions as nestest.log has done | vin | |
| 2024-06-17 | start fixing bugs with memory access | vin | |
| So this is why tests should be written while writing the program and instructions instead of all at once later. If this were all to be rewritten (which it probably will), I should add tests for each opcode instead of waiting until the end for ROM loading support. | |||
| 2024-06-17 | implement basic iNES and Mapper 0 ROM loading | vin | |
| It seems like the test ROM loads fine but the instructions are not, but that's exactly what the test ROM is for I suppose. | |||
| 2024-06-16 | replace bit comparisons with 0 from greater than to not equal | vin | |
| They're both the same and the compiler might have already optimized it away. It also conveys the message better in my opinion. | |||
| 2024-06-11 | add memory mirroring for system and ppu memory | vin | |
| 2024-06-11 | add separate implied/accumulator functions for certain opcodes | vin | |
| 2024-06-10 | add jsr, rti, rts | vin | |
| 2024-06-10 | implement untested most of stack-related opcodes | vin | |
| 2024-06-10 | add lsr, rol, ror | vin | |
| 2024-06-10 | implement tay, txa, tya | vin | |
| 2024-06-10 | implement sta, stx, sty | vin | |
| 2024-06-10 | implement se?() opcodes and remove extra 65c02 opcodes | vin | |
| 2024-06-09 | implement more instructions | vin | |
| 2024-06-09 | add opcode_mem() function to return memory address and not pre-peek | vin | |
| Of course all of these opcodes need to be tested later... | |||
| 2024-06-09 | add memory writing functions | vin | |
| 2024-06-09 | implement some more instructions and branching? | vin | |
| 2024-06-09 | fix potential adc overflow flag bug | vin | |
| 2024-06-09 | add blank todo opcode functions based on opcode json | vin | |
| 2024-06-09 | programmatically create switch cases for opcodes based on opcode json | vin | |
| The JSON is from https://github.com/ericTheEchidna/65C02-JSON/ and saved me a lot of time from writing the cases for each opcode by hand. | |||
| 2024-06-08 | move addressing mode parsing into separate function | vin | |
 |
index : emu_nes.git | |
| A Nintendo Entertainment System (NES) emulator written for the purpose of understanding how the NES and similar 8-bit computers of that era worked. |
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