rv32g-core

commit 84f8e967e9967417469d344beba129e4d2cc21aa
parent c0570886bd05ba4405a31e00b4140b46150202e1
Author: Vineet Kumar <git@vineetk.net>
Date:   Thu, 11 Jun 2026 16:52:42 -0400

make it easy to enable/disable i-cache when fetching (synth-time)

Diffstat:
M
rtl/stage_fetch.sv
 | 
10
++++++++++

1 file changed, 10 insertions(+), 0 deletions(-)
diff --git a/rtl/stage_fetch.sv b/rtl/stage_fetch.sv
@@ -7,6 +7,9 @@ module stage_fetch
    output logic [31:0] imem_addr,
    output logic [31:0] inst);
 
+`define USE_ICACHE // TODO ifdef can be removed once pipelined with BSRAM
+`ifdef USE_ICACHE
+
    localparam		 CACHE_SIZE = 256; // words
    localparam		 IDX_WIDTH = $clog2(CACHE_SIZE);
    localparam		 TAG_WIDTH = 32 - IDX_WIDTH - 2; // only be byte offset
@@ -41,4 +44,11 @@ module stage_fetch
      end
    end
 
+`else
+
+   assign imem_addr = pc;
+   assign inst = imem_data;
+
+`endif
+
 endmodule: stage_fetch