rv32g-core

commit f9320e371da369ef1b75e072dee542f86c6c12f4
parent 34a9291bb58c54a908fd48f3f69abc9fd5ff62d6
Author: Vineet Kumar <git@vineetk.net>
Date:   Mon,  8 Jun 2026 16:14:24 -0400

remove the temporary inst opcode decoding debug message

Diffstat:
M
rtl/stage_decode.sv
 | 
2
--

1 file changed, 0 insertions(+), 2 deletions(-)
diff --git a/rtl/stage_decode.sv b/rtl/stage_decode.sv
@@ -127,8 +127,6 @@ module stage_decode
 	      wbsrc:     WB_NONE,
 	      exception: EXC_NONE};
 
-     $display("inst[6:0]: %b, opcode: %b %s", inst[6:0], opcode, opcode.name());
-
      // the major opcodes share the same signals, just operation varies based on funct
      unique case (opcode)
        OPCODE_LUI: ctrl.wbsrc = WB_IMM;