rv32g-core

commit 7efe51f2eeacbb4b6b0d533e3384317b3fed7585
parent 005a8afbb9eeaa3bda780697485b6b8b244102c3
Author: Vineet Kumar <git@vineetk.net>
Date:   Sat, 30 May 2026 15:21:45 -0400

fix regfile declaration to be an unpacked array

Diffstat:
M
rtl/rv32g_hart.sv
 | 
10
+++++-----

1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/rtl/rv32g_hart.sv b/rtl/rv32g_hart.sv
@@ -12,11 +12,11 @@ module rv32g_hart
    output logic	       dmem_we);
 
    // x0 to x31
-   logic [31:0][31:0] regfile;
-   logic [31:0]	      pc;
-   logic [31:0]	      next_pc;
-   logic [31:0]	      inst;
-   logic	      ctrl;	// TODO change to struct
+   logic [31:0] regfile [0:31];
+   logic [31:0]	pc;
+   logic [31:0] next_pc;
+   logic [31:0] inst;
+   logic	ctrl;	// TODO change to struct
    
    assign regfile[0] = 'd0;
    always_ff @(posedge clk or negedge rstN) begin