rv32g-core

commit 9923ef798058d98b7ac10e83812c8081abdc465a
parent ad9c2331c5cac454638c37f5cfaa7a8e21fe5636
Author: Vineet Kumar <git@vineetk.net>
Date:   Sun, 26 Jul 2026 16:27:19 +0530

fix wrong pipeline register being used in next_pc calculation

Diffstat:
M
rtl/rv32g_hart.sv
 | 
4
++--

1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/rtl/rv32g_hart.sv b/rtl/rv32g_hart.sv
@@ -196,11 +196,11 @@ module rv32g_hart
        PC_SEQ: next_pc = exmem_reg.pc + 4;
        // branch or jal
        PC_IMM: begin
-	 if ((exmem_reg.branchop != BRANCH_NONE) ? exmem_reg.branch_taken : 1'b1) next_pc = exmem_reg.pc + memwb_reg.imm;
+	 if ((exmem_reg.branchop != BRANCH_NONE) ? exmem_reg.branch_taken : 1'b1) next_pc = exmem_reg.pc + exmem_reg.imm;
 	 else next_pc = exmem_reg.pc + 4;
        end
        // jalr
-       PC_ALU: next_pc = memwb_reg.alu_out & ~32'b1; // spec says to clear LSB and /may/ raise an exception
+       PC_ALU: next_pc = exmem_reg.alu_out & ~32'b1; // spec says to clear LSB and /may/ raise an exception
      endcase
    end