rv32g-core

commit a5c4877aa2e01078002f5d1d3ed3fbe73578e005
parent e430c49fa9aa74e23e9aaea96bb9a88ede26115b
Author: Vineet Kumar <git@vineetk.net>
Date:   Sat, 11 Jul 2026 18:16:03 +0530

make pnr make target depend on synth

Diffstat:
M
Makefile
 | 
2
+-

1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
@@ -32,7 +32,7 @@ lint: $(PKG_SRC) $(SV_SRCS)
 synth:
 	yosys -m slang -p 'read_slang $(PKG_SRC) $(SV_SRCS) $(TOP_SRC); synth_gowin -family gw5a -top rv32g_hart_top -json design.json'
 
-pnr:
+pnr: synth
 	nextpnr-himbaechel-gowin --json design.json --write design_pnr.json --freq 300 --device ${NEXTPNR_DEV} --vopt cst=${CST_SRC}
 
 sim_compile: lint $(PKG_SRC) $(TB_SRC) $(SV_SRCS)