| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2026-02-01 | add incomplete ppuHEADmaster | Vineet Kumar | 1 | -0/+5 | |
| 2024-09-01 | add basic ppu register reading | vin | 1 | -3/+1 | |
| 2024-09-01 | add preliminary apu register support | vin | 1 | -3/+10 | |
| 2024-07-21 | rename struct Rom to struct rom | vin | 1 | -1/+2 | |
| 2024-07-21 | start implementing PPU | vin | 1 | -6/+21 | |
| 2024-07-20 | fix rest of logging format issues | vin | 1 | -3/+7 | |
| Now the format perfectly matches nestest.log. The only mismatch is now at the unimplemented APU memory addresses. | |||||
| 2024-07-20 | fix status flag bug in ASL and ROL | vin | 1 | -2/+3 | |
| 2024-07-20 | replace tabs with spaces to better match nestest.log | vin | 1 | -20/+43 | |
| 2024-07-07 | fix warnings and move cpu registers+flags to header | vin | 1 | -23/+2 | |
| 2024-07-04 | implement all of the nestest unofficial opcodes and fix branch cycles | vin | 1 | -9/+10 | |
| 2024-07-04 | add preliminary implementation of the unofficial opcodes | vin | 1 | -34/+57 | |
| 2024-07-04 | start implementing unofficial opcodes | vin | 1 | -1/+148 | |
| 2024-07-04 | achieve cycle accuracy for official opcodes | vin | 1 | -5/+22 | |
| Now, the unofficial opcodes can be implemented, and then the PPU and APU. | |||||
| 2024-07-03 | finalize trace logging to match nestest.log minus PPU cycles | vin | 1 | -8/+12 | |
| 2024-07-03 | improve branching cycle accuracy | vin | 1 | -16/+23 | |
| 2024-07-03 | fix SBC bug in the rewrite and improve logging | vin | 1 | -60/+29 | |
| 2024-07-03 | call opcode function pointer instead of using switch case | vin | 1 | -1273/+172 | |
| Also improve logging. | |||||
| 2024-06-30 | start refactoring opcode defs into an array | vin | 1 | -16/+2 | |
| 2024-06-30 | combine macro for updating N and Z status flags | vin | 1 | -54/+30 | |
| 2024-06-30 | fix alignment of logging with ABS_X and ZP_X | vin | 1 | -2/+2 | |
| 2024-06-30 | fix indirect JMP bug where the high byte does not increment out of page | vin | 1 | -3/+4 | |
| https://old.reddit.com/r/EmuDev/comments/15plfes/having_an_issue_with_nestest_on_my_6502_emulator/jvyck7k/ With this, it seems that all official opcodes run as nestest expects. Now, it's the unofficial opcodes that need to be implemented. | |||||
| 2024-06-30 | fix incorrect argument for INC | vin | 1 | -2/+1 | |
| Perhaps a refactor is in order for the arguments to the opcodes. | |||||
| 2024-06-30 | fix incorrect argument for ASL and LSR | vin | 1 | -6/+6 | |
| 2024-06-30 | fix JSR, RTS, and RTI | vin | 1 | -3/+3 | |
| JSR was pushing 1 too high PC and RTS was 1 too low RTI was only pulling the low byte of PC | |||||
| 2024-06-30 | change SBC to be ADC with one's complement instead of two's | vin | 1 | -3/+5 | |
| It seems that is what was expected when run with nestest. | |||||
| 2024-06-29 | fix status flag ordering shenanigans | vin | 1 | -23/+33 | |
| 2024-06-29 | fix ADC bug where V is calculated with new A instead of old A | vin | 1 | -1/+2 | |
| 2024-06-28 | fix status register to match nestest | vin | 1 | -6/+8 | |
| 2024-06-28 | improve logging and JMP indirect | vin | 1 | -136/+503 | |
| 2024-06-28 | fix more bugs | vin | 1 | -46/+7 | |
| 2024-06-28 | fix JSR and RTS bug | vin | 1 | -4/+4 | |
| The stack's PUSH and PULL weren't proper and JSR was reading wrong argument it seems. | |||||
| 2024-06-28 | start logging instructions as nestest.log has done | vin | 1 | -31/+192 | |
| 2024-06-17 | start fixing bugs with memory access | vin | 1 | -10/+10 | |
| So this is why tests should be written while writing the program and instructions instead of all at once later. If this were all to be rewritten (which it probably will), I should add tests for each opcode instead of waiting until the end for ROM loading support. | |||||
| 2024-06-17 | implement basic iNES and Mapper 0 ROM loading | vin | 1 | -13/+49 | |
| It seems like the test ROM loads fine but the instructions are not, but that's exactly what the test ROM is for I suppose. | |||||
| 2024-06-16 | replace bit comparisons with 0 from greater than to not equal | vin | 1 | -13/+13 | |
| They're both the same and the compiler might have already optimized it away. It also conveys the message better in my opinion. | |||||
| 2024-06-11 | add memory mirroring for system and ppu memory | vin | 1 | -0/+14 | |
| 2024-06-11 | add separate implied/accumulator functions for certain opcodes | vin | 1 | -25/+78 | |
| 2024-06-10 | add jsr, rti, rts | vin | 1 | -7/+16 | |
| 2024-06-10 | implement untested most of stack-related opcodes | vin | 1 | -66/+57 | |
| 2024-06-10 | add lsr, rol, ror | vin | 1 | -3/+24 | |
| 2024-06-10 | implement tay, txa, tya | vin | 1 | -3/+12 | |
| 2024-06-10 | implement sta, stx, sty | vin | 1 | -20/+20 | |
| 2024-06-10 | implement se?() opcodes and remove extra 65c02 opcodes | vin | 1 | -417/+3 | |
| 2024-06-09 | implement more instructions | vin | 1 | -20/+46 | |
| 2024-06-09 | add opcode_mem() function to return memory address and not pre-peek | vin | 1 | -15/+55 | |
| Of course all of these opcodes need to be tested later... | |||||
| 2024-06-09 | add memory writing functions | vin | 1 | -4/+18 | |
| 2024-06-09 | implement some more instructions and branching? | vin | 1 | -25/+64 | |
| 2024-06-09 | fix potential adc overflow flag bug | vin | 1 | -1/+1 | |
| 2024-06-09 | add blank todo opcode functions based on opcode json | vin | 1 | -19/+406 | |
| 2024-06-09 | programmatically create switch cases for opcodes based on opcode json | vin | 1 | -35/+1011 | |
| The JSON is from https://github.com/ericTheEchidna/65C02-JSON/ and saved me a lot of time from writing the cases for each opcode by hand. | |||||
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index : emu_nes | |
| An NES emulator for learning how the 6502 and similar computers of the era worked | Vineet K |
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